JPH10209090A - Polishing method and polishing equipment of semiconductor device - Google Patents

Polishing method and polishing equipment of semiconductor device

Info

Publication number
JPH10209090A
JPH10209090A JP983397A JP983397A JPH10209090A JP H10209090 A JPH10209090 A JP H10209090A JP 983397 A JP983397 A JP 983397A JP 983397 A JP983397 A JP 983397A JP H10209090 A JPH10209090 A JP H10209090A
Authority
JP
Japan
Prior art keywords
work
polishing
polishing cloth
semiconductor
silicon wafer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP983397A
Other languages
Japanese (ja)
Inventor
Katsuki Shingu
克喜 新宮
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP983397A priority Critical patent/JPH10209090A/en
Publication of JPH10209090A publication Critical patent/JPH10209090A/en
Pending legal-status Critical Current

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  • Mechanical Treatment Of Semiconductor (AREA)

Abstract

PROBLEM TO BE SOLVED: To enable effectively flatening the surface of a work wherein step- differences are generated on the surface, with a small working amount and a short working time, by polishing the surface while electric field is generated between the abrasive cloth and the work to electrically attract abrasive grains to the abrasive cloth side. SOLUTION: The surface of a silicon wafer (work) 1 having protrusion patterns 1d on the surface is polished by supplying colloidal silica 8 in the sate of suspension to a gap between the surface and an abrasive cloth 5 which is relatively moved coming into contact with the wafer 1 and composed of polyurethane form. The colloidal silica 8 is charged to negative polarity in suspension 7 whose PH is adjusted, stably separated and levitated. Since the colloidal silica 8 is forcibly attracted to the abrasive cloth 5 with electrostatic force by a voltage applying means 22, the colloidal silica 8 does not act on the bottom of a recessed part 1e on the surface of the wafer 1, and protruding parts 1d are selectively worked. Thereby the surface of the wafer 1 on which step-differences are generated can be flatened with small working amount and short working time.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、半導体ウエハ面に
積層配線を行う工程において、配線等による回路の上に
積層形成された中間層の表面に生じた凸パターン等を研
磨して平坦化するための研磨方法と半導体の研磨装置に
関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a process for forming a laminated wiring on a semiconductor wafer surface, and polishing and flattening a convex pattern or the like generated on the surface of an intermediate layer laminated on a circuit by wiring or the like. And a polishing apparatus for semiconductors.

【0002】[0002]

【従来の技術】近年、半導体ウエハ面に形成される集積
回路は益々高密度化され、更にこの集積回路の上にも回
路を形成する立体的な積層配線が行われるようになって
きた。
2. Description of the Related Art In recent years, integrated circuits formed on the surface of a semiconductor wafer have been increasingly densified, and three-dimensional laminated wirings for forming circuits have been formed on the integrated circuits.

【0003】この積層配線を行う工程において、図4に
示すように、シリコンウエハ(ワーク)1の表面1a上
への配線等による回路1bの上に積層形成された上層1
cの表面には、その回路1bの厚みと配置とに準じた凸
パターン1dが生じる。さてこの凸パターン1dによる
段差Hのために、この上層1cの表面上に回路を形成す
る際に余り精細で高密度な回路ができないので、回路形
成の前にこのシリコンウエハ1の上層1cの表面を研磨
して平坦化している。
In the step of performing the laminated wiring, as shown in FIG. 4, the upper layer 1 formed on the circuit 1b by wiring or the like on the surface 1a of the silicon wafer (work) 1 is formed.
On the surface of c, a convex pattern 1d is formed according to the thickness and arrangement of the circuit 1b. Now, because of the step H caused by the convex pattern 1d, a very fine and high-density circuit cannot be formed when a circuit is formed on the surface of the upper layer 1c. Is polished and flattened.

【0004】従来この目的に用いられる半導体の研磨装
置の一例は、図5、図6に示すようなものであり、その
研磨方法は、表面に凸パターン1dのあるシリコンウエ
ハ1を、回転軸L回りに回転し荷重Wが印加されたチャ
ック42で保持し、回転軸Lからずれた回転軸M回りに
回転する定盤43に保持された発砲ポリウレタン製の研
磨布41に均一に押し付けて、この研磨布41とシリコ
ンウエハ1間にコロイダルシリカ等の研磨砥粒8の懸濁
液7を適宜供給して、シリコンウエハ1の表面を研磨し
て平坦化する、といったものである。なお、研磨砥粒が
接着固定された研磨紙等は、研磨砥粒の磨耗による研磨
作用力の変化や、研磨屑の排除性が悪いことによるシリ
コンウエハ1への損傷等の問題のため、一般には使用さ
れない。
An example of a conventional semiconductor polishing apparatus used for this purpose is shown in FIGS. 5 and 6. The polishing method is such that a silicon wafer 1 having a convex pattern 1d on its surface is rotated by a rotation axis L. This is held around by a chuck 42 to which a load W is applied while being rotated around, and is uniformly pressed against a foamed polyurethane polishing cloth 41 held by a platen 43 which is rotated around a rotation axis M that is offset from the rotation axis L. The suspension 7 of polishing abrasive grains 8 such as colloidal silica is appropriately supplied between the polishing cloth 41 and the silicon wafer 1 to polish and flatten the surface of the silicon wafer 1. Abrasive paper or the like on which abrasive grains are adhered and fixed is generally used because of problems such as a change in polishing action force due to abrasion of the abrasive grains and damage to the silicon wafer 1 due to poor removability of polishing debris. Is not used.

【0005】[0005]

【発明が解決しようとする課題】シリコンウエハ1等の
ワークの表面を効率よく平坦化するためには、シリコン
ウエハ1表面の凸パターン1dのみを選択的に除去すれ
ばよいのであるが、従来の研磨方法と半導体の研磨装置
では、図5〜図7に示すように、懸濁状態の研磨砥粒8
はシリコンウエハ1表面の低位部1eにも加工作用を起
こすので、シリコンウエハ1表面が平坦になるまでに
は、加工量及び加工時間が凸パターン1dの段差Hのみ
の除去相当分よりかなり多く必要となり、コスト的に不
利であると共に、研磨終了時には、シリコンウエハ1の
部分による加工量の差異が大きくなるために、その部分
によってはその後の上下層の回路1bが短絡する等の不
具合が生じ易い、といった問題がある。
In order to efficiently flatten the surface of a work such as the silicon wafer 1, only the convex pattern 1d on the surface of the silicon wafer 1 needs to be selectively removed. In the polishing method and the semiconductor polishing apparatus, as shown in FIGS.
Also causes a processing action on the lower part 1e of the surface of the silicon wafer 1, so that the processing amount and the processing time are considerably longer than the removal amount of only the step H of the convex pattern 1d before the surface of the silicon wafer 1 becomes flat. This is disadvantageous in terms of cost, and at the end of polishing, since the difference in the processing amount between the portions of the silicon wafer 1 becomes large, problems such as short-circuiting of the upper and lower layer circuits 1b are likely to occur depending on the portion. There is such a problem.

【0006】本発明は、上記問題に鑑み、表面に段差の
生じているワークの表面を、少ない加工量及び加工時間
で、効率よく平坦化することができる研磨方法と半導体
の研磨装置を提供することを目的とする。
The present invention has been made in view of the above problems, and provides a polishing method and a semiconductor polishing apparatus capable of efficiently planarizing the surface of a work having a step on the surface with a small processing amount and processing time. The purpose is to:

【0007】[0007]

【課題を解決するための手段】本発明は、上記目的を達
成するため、ワークの表面を、このワークに対して接触
しながら相対移動する研磨布とワーク間に研磨砥粒を供
給して研磨する研磨方法において、前記研磨布とワーク
間に、前記研磨砥粒が前記研磨布側に電気的に引き付け
られるような電界を発生させながら研磨することを特徴
とする。
SUMMARY OF THE INVENTION In order to achieve the above object, the present invention provides a polishing method in which abrasive grains are supplied between a polishing cloth and a workpiece which relatively moves while contacting the workpiece with the workpiece. In the polishing method, the polishing is performed while generating an electric field between the polishing cloth and the work so that the polishing grains are electrically attracted toward the polishing cloth.

【0008】又、本発明は、ワークである半導体の表面
を、この半導体に対して接触しながら相対移動する研磨
布と、この研磨布と半導体間に懸濁状態で供給され帯電
した研磨砥粒とを用いて研磨する半導体の研磨装置にお
いて、半導体を保持するワーク保持手段と、前記研磨布
を保持するツール保持手段と、前記研磨布とワーク間に
電位差を発生可能に前記ワーク保持手段と前記ツール保
持手段とに夫々配設された電極と、この一対の電極間に
直流電圧を印加する電圧印加手段とを備えたことを特徴
とする。
Further, the present invention provides a polishing cloth which moves a surface of a semiconductor as a work relative to the semiconductor while contacting the semiconductor, a charged polishing abrasive supplied in a suspended state between the polishing cloth and the semiconductor. In a semiconductor polishing apparatus for polishing using a, a work holding means for holding a semiconductor, a tool holding means for holding the polishing cloth, the work holding means capable of generating a potential difference between the polishing cloth and the work, and An electrode provided on the tool holding means and a voltage applying means for applying a DC voltage between the pair of electrodes are provided.

【0009】本発明の研磨方法と半導体の研磨装置によ
れば、懸濁状態で供給され帯電した研磨砥粒が、電圧印
加手段による静電気力によって研磨布に強制的に吸引さ
れるので、半導体等のワーク表面にある凹部の底には研
磨砥粒が作用せず、ワーク表面の凸部が選択的に加工さ
れる。従って、表面に段差の生じているワークの表面
を、少ない加工量及び加工時間で、効率よく平坦化する
ことができる。
According to the polishing method and the semiconductor polishing apparatus of the present invention, the charged polishing abrasive grains supplied in a suspended state are forcibly sucked into the polishing cloth by the electrostatic force of the voltage applying means. The abrasive grains do not act on the bottom of the concave portion on the work surface, and the convex portion on the work surface is selectively processed. Therefore, the surface of the work having a step on the surface can be efficiently planarized with a small processing amount and processing time.

【0010】本発明の研磨方法において、研磨布を、内
圧を有する袋状の弾性部材のワーク側の対面に保持さ
れ、この弾性部材をワークの表面に付勢しながらワーク
の表面を研磨するように構成すると、内圧を有する袋状
の弾性部材によって、ワークの表面の全面に均一な接触
圧力を加えながらこの表面を研磨することができるの
で、ワークの全面に渡って表面の凸部を同時に選択的に
加工することができ、保持されたワークに反りがあって
も、少ない加工量及び加工時間で、効率よくワークの全
面の凸部のみを除去することができる。
[0010] In the polishing method of the present invention, the polishing cloth is held on the opposite side of the work side of the bag-like elastic member having an internal pressure, and the work surface is polished while urging the elastic member against the work surface. With this configuration, the surface can be polished while applying a uniform contact pressure to the entire surface of the work by the bag-shaped elastic member having an internal pressure, so that the convex portions of the surface can be simultaneously selected over the entire surface of the work. Even if the held work is warped, only the protrusions on the entire surface of the work can be efficiently removed with a small processing amount and processing time.

【0011】本発明の研磨方法において、ワークをワー
ク表面に垂直なワーク回転軸回りに回転させ、かつ研磨
布を前記ワーク回転軸から離れたツール回転軸回りに回
転させながらワークの表面を研磨するように構成する
と、ワークの表面上のどの部位においても、その部位に
相対する研磨布上の部位と運動方向と運動速度とがほぼ
ランダマイズされ、同程度の加工作用を与えることがで
きるので、面積の大きなワークに対しても、ワークの表
面を均一に研磨し、効率よく平坦化することができる。
In the polishing method of the present invention, the surface of the workpiece is polished while rotating the workpiece about a workpiece rotation axis perpendicular to the workpiece surface and rotating the polishing cloth about a tool rotation axis away from the workpiece rotation axis. With such a configuration, in any part on the surface of the work, the part on the polishing cloth corresponding to the part, the movement direction and the movement speed are almost randomized, and the same processing action can be given, so that Even for a work having a large size, the surface of the work can be polished uniformly and flattened efficiently.

【0012】[0012]

【発明の実施の形態】本発明の実施形態を図面に基づい
て以下に説明する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below with reference to the drawings.

【0013】本発明の半導体の研磨装置の一実施形態
は、図1〜図3に示すように、表面に凸パターン1dの
あるシリコンウエハ(ワーク)1の表面を、このシリコ
ンウエハ1に対して接触しながら相対移動する発砲ポリ
ウレタン製の研磨布5と、この研磨布5とシリコンウエ
ハ1間に懸濁状態のコロイダルシリカ8を供給して研磨
するものに関する。なお、このコロイダルシリカ8は、
pH調整されたその懸濁液7の中で、自発的かつ安定的
に負極に帯電しており、それ故にその懸濁液7の中で安
定的に分散して浮遊しているものである。
In one embodiment of the semiconductor polishing apparatus of the present invention, as shown in FIGS. 1 to 3, the surface of a silicon wafer (work) 1 having a convex pattern 1d on its surface is The present invention relates to a polishing pad 5 made of foamed polyurethane that moves relatively while contacting with it, and a method of supplying suspended colloidal silica 8 between the polishing pad 5 and the silicon wafer 1 for polishing. In addition, this colloidal silica 8 is
In the pH-adjusted suspension 7, the negative electrode is spontaneously and stably charged to the negative electrode, and is therefore stably dispersed and suspended in the suspension 7.

【0014】この半導体の研磨装置は、図1に示すよう
に、シリコンウエハ1を保持するワーク保持手段2と、
研磨布5を保持するツール保持手段3と、このツール保
持手段3を上方向退避可能に支持する支持手段20と、
この支持手段20を水平方向Qに位置制御可能に移動さ
せる移動手段21と、研磨布5とワーク1間に電位差を
発生させる電圧印加手段(直流電源)22とを備えてい
る。
As shown in FIG. 1, the semiconductor polishing apparatus comprises a work holding means 2 for holding a silicon wafer 1;
Tool holding means 3 for holding the polishing cloth 5, support means 20 for supporting the tool holding means 3 so as to be able to retract upward,
A moving means 21 for moving the supporting means 20 in a position controllable manner in the horizontal direction Q, and a voltage applying means (DC power supply) 22 for generating a potential difference between the polishing pad 5 and the work 1 are provided.

【0015】ワーク保持手段2は、シリコンウエハ1を
吸着する金属製のチャック4と、このチャック4を支持
する回転テーブル28と、この回転テーブル28をベル
ト29を介してワーク回転軸L回りに回転させるモータ
26とを備えている。チャック4には、コロイダルシリ
カ8の懸濁液7をシリコンウエハ1が浸漬されるように
保持するパン9が備えられている。又、チャック4に
は、その円筒部側面の一か所に電圧印加手段22の負極
給電ブラシ24が当接されており、チャック4の上面4
aがシリコンウエハ1側の電極面を兼ねるようになって
いる。
The work holding means 2 comprises a metal chuck 4 for adsorbing the silicon wafer 1, a rotary table 28 for supporting the chuck 4, and a rotary table 28 for rotating the rotary table 28 around a work rotation axis L via a belt 29. And a motor 26 for driving. The chuck 4 is provided with a pan 9 for holding a suspension 7 of colloidal silica 8 so that the silicon wafer 1 is immersed therein. The negative electrode power supply brush 24 of the voltage applying means 22 is in contact with the chuck 4 at one position on the side surface of the cylindrical portion.
“a” also serves as the electrode surface on the silicon wafer 1 side.

【0016】ツール保持手段3は、シリコンウエハ1側
に対向した外面部に研磨布5を貼着したゴム製の半球殻
状の弾性部材10と、この弾性部材10の開口部を気密
して保持する樹脂製のホルダ11と、このホルダ11を
支持する金属製のスピンドル6と、このスピンドル6を
ベルト30を介してツール回転軸M回りに回転させるモ
ータ27とを備えている。
The tool holding means 3 has a rubber-made hemispherical shell-like elastic member 10 having an abrasive cloth 5 adhered to the outer surface facing the silicon wafer 1 side, and holds the opening of the elastic member 10 in an airtight manner. A holder 11 made of resin, a spindle 6 made of metal for supporting the holder 11, and a motor 27 for rotating the spindle 6 around a tool rotation axis M via a belt 30 are provided.

【0017】弾性部材10とホルダ11とは、共に絶縁
性で、両者の間に油15が充填された空間14を形成
し、電極23の電極面23a部をこれら弾性部材10と
ホルダ11とに接触させずに収納している。
The elastic member 10 and the holder 11 are both insulating and form a space 14 filled with oil 15 therebetween, and the electrode surface 23a of the electrode 23 is connected to the elastic member 10 and the holder 11. Stored without contact.

【0018】スピンドル6には、その円筒部側面の一か
所に電圧印加手段22の正極給電ブラシ25が当接され
ており、その下端に通電可能に支持した電極23へ給電
するようになっている。又、スピンドル6は、空間14
に連通した中空部19を有しており、空間14と共に前
記の油15が充填され、その中空部19の上端開口部に
は、ロータリジョイント12を介して圧力設定手段13
が接続されており、空間14の内圧を調節して、弾性部
材10を介してシリコンウエハ1の表面に所望の接触圧
力Pを加えるようになっている。
A positive electrode power supply brush 25 of a voltage applying means 22 is in contact with the spindle 6 at one position on the side surface of the cylindrical portion. I have. The spindle 6 is located in the space 14
The space 15 is filled with the oil 15 together with the space 14, and the upper end opening of the hollow part 19 is provided with a pressure setting means 13 through a rotary joint 12.
Is connected, and a desired contact pressure P is applied to the surface of the silicon wafer 1 via the elastic member 10 by adjusting the internal pressure of the space 14.

【0019】支持手段20は、シリコンウエハ1や研磨
布5を交換する時に、ツール保持手段3をガイド32に
沿って上方向に退避させるエアシリンダ31と、ガイド
32と、研磨時にツール保持手段3を下端に位置決めす
る下端ストッパ33とを備えている。
The support means 20 includes an air cylinder 31 for retracting the tool holding means 3 upward along the guide 32 when the silicon wafer 1 and the polishing cloth 5 are replaced, a guide 32, and the tool holding means 3 for polishing. And a lower end stopper 33 for positioning the lower end at the lower end.

【0020】移動手段21は、支持手段20を水平方向
Qに移動可能に保持する水平ガイド16と、支持手段2
0の水平方向Qの位置をボールネジ17を介して制御す
るサーボモータ18とを備えている。
The moving means 21 includes a horizontal guide 16 for holding the supporting means 20 so as to be movable in the horizontal direction Q, and a supporting means 2.
And a servomotor 18 for controlling the position of the horizontal direction Q of 0 through a ball screw 17.

【0021】電圧印加手段22は、シリコンウエハ1側
のチャック4に当接された給電ブラシ24を負極とし、
研磨布5側のスピンドル6に当接された給電ブラシ25
を正極として、この一対の給電ブラシ24、25間に直
流電圧を印加する直流電源22を備えている。
The voltage applying means 22 uses the power supply brush 24, which is in contact with the chuck 4 on the silicon wafer 1 side, as a negative electrode,
Power supply brush 25 abutting on spindle 6 on polishing cloth 5 side
And a DC power supply 22 for applying a DC voltage between the pair of power supply brushes 24 and 25.

【0022】上記構成による研磨方法は、以下のS1〜
S8のステップで行われる。
The polishing method according to the above-described structure includes the following S1
This is performed in step S8.

【0023】S1:支持手段20のエアシリンダ31に
よってツール保持手段3を上方に退避させ、シリコンウ
エハ1をチャック4の上面4aに吸着させる。
S1: The tool holding means 3 is retracted upward by the air cylinder 31 of the support means 20, and the silicon wafer 1 is attracted to the upper surface 4a of the chuck 4.

【0024】S2:パン9内にpH調整されたコロイダ
ルシリカ8の懸濁液7をシリコンウエハ1の研磨面より
上まで注入する。
S 2: The suspension 7 of the colloidal silica 8 whose pH has been adjusted is poured into the pan 9 above the polished surface of the silicon wafer 1.

【0025】S3:支持手段20のストッパ33によっ
てツール保持手段3を下端に位置決めする。
S3: The tool holding means 3 is positioned at the lower end by the stopper 33 of the support means 20.

【0026】S4:圧力設定手段13によって弾性部材
10内の油15の圧力を調節して、研磨布5がシリコン
ウエハ1の表面に所望の接触圧力Pを加えるようにす
る。
S4: The pressure of the oil 15 in the elastic member 10 is adjusted by the pressure setting means 13 so that the polishing cloth 5 applies a desired contact pressure P to the surface of the silicon wafer 1.

【0027】S5:電圧印加手段22によってチャック
4とスピンドル6間に直流電圧を印加して、コロイダル
シリカ8がシリコンウエハ1に反発し研磨布5側に引き
付けられるようにする。
S5: A DC voltage is applied between the chuck 4 and the spindle 6 by the voltage applying means 22 so that the colloidal silica 8 repels the silicon wafer 1 and is attracted to the polishing cloth 5 side.

【0028】S6:モータ26によってシリコンウエハ
1を回転軸L回りに回転させ、モータ27によって研磨
布5をを回転軸M回りに回転させ、移動手段21によっ
てツール保持手段3を水平方向Qに予め設定された移動
パターンに基づいて位置移動させながらシリコンウエハ
1の表面を研磨する。
S6: The silicon wafer 1 is rotated about the rotation axis L by the motor 26, the polishing pad 5 is rotated about the rotation axis M by the motor 27, and the tool holding means 3 is previously moved in the horizontal direction Q by the moving means 21. The surface of the silicon wafer 1 is polished while being moved based on the set movement pattern.

【0029】S7:1回の研磨が完了したら、上記S1
〜S6のステップを繰り返す。これらの手順は、図示し
ないロボットによって、自動運転させてもよく、上記の
ステップS2、S4は必要な場合のみ行えばよい。
S7: When one polishing is completed, the above S1
Steps S6 to S6 are repeated. These procedures may be automatically operated by a robot (not shown), and the above steps S2 and S4 may be performed only when necessary.

【0030】上記実施形態によれば、懸濁状態で供給さ
れ帯電したコロイダルシリカ8が、電圧印加手段22に
よる静電気力によって研磨布5に強制的に吸引されるの
で、シリコンウエハ1の表面にある凹部1eの底にはコ
ロイダルシリカ8が作用せず、シリコンウエハ1の表面
の凸部1dが選択的に加工される。従って、表面に段差
Hの生じているシリコンウエハ1の表面を、少ない加工
量及び加工時間で、効率よく平坦化することができる。
しかも、研磨布5は弾性部材10を介した油15の圧力
によって、シリコンウエハ1の表面に均一な接触圧力P
を加えるので、保持されたシリコンウエハ1に反りがあ
っても、効率よく平坦化することができる。又、シリコ
ンウエハ1をワーク回転軸L回りに回転させ、かつ研磨
布5をワーク回転軸Lから離れたツール回転軸M回りに
回転させながら研磨するので、シリコンウエハ1の表面
上のどの部位においても、研磨布5上のあらゆる部位が
あらゆる運動方向で接触して同程度の加工作用を与える
ことができ、面積の大きなシリコンウエハ1でも、効率
よく平坦化することができる。
According to the above-described embodiment, the charged colloidal silica 8 supplied in the suspended state is forcibly sucked into the polishing pad 5 by the electrostatic force of the voltage applying means 22, so that it is on the surface of the silicon wafer 1. The colloidal silica 8 does not act on the bottom of the concave portion 1e, and the convex portion 1d on the surface of the silicon wafer 1 is selectively processed. Therefore, the surface of the silicon wafer 1 having the step H on the surface can be efficiently planarized with a small processing amount and processing time.
In addition, the polishing pad 5 applies a uniform contact pressure P to the surface of the silicon wafer 1 by the pressure of the oil 15 via the elastic member 10.
Is added, even if the held silicon wafer 1 is warped, it can be efficiently flattened. Since the silicon wafer 1 is rotated around the work rotation axis L and the polishing pad 5 is polished while being rotated about the tool rotation axis M away from the work rotation axis L, the polishing is performed at any position on the surface of the silicon wafer 1. Also, every part on the polishing pad 5 comes into contact in every direction of movement to give the same level of processing action, and even the silicon wafer 1 having a large area can be efficiently flattened.

【0031】上記実施形態では、研磨砥粒としてコロイ
ダルシリカ8を使用したが、本発明はこれに限定され
ず、懸濁液中で帯電して研磨布5側に電気的に引き付け
られうるものであればよく、例えば酸化セリウム砥粒で
も上記と同様の作用効果を得ることができる。
In the above-described embodiment, the colloidal silica 8 is used as the abrasive grains. However, the present invention is not limited to this, and can be charged in the suspension and electrically attracted to the polishing cloth 5 side. Any effect can be obtained, for example, with cerium oxide abrasive grains, and the same operation and effect as described above can be obtained.

【0032】又、上記実施形態では、ワークをシリコン
ウエハ1としたが、以上の説明から明らかなように、本
発明はこれに限定されず、導電体、絶縁体を問わず、表
面に段差のあるワークについて、上記と同様の作用効果
を得ることができる。ワークが導電体である場合は、そ
のワーク自体がワーク側の電極を兼ねる。
Further, in the above embodiment, the work is the silicon wafer 1, but as is clear from the above description, the present invention is not limited to this, and the surface may have a step regardless of the conductor or the insulator. The same operation and effect as described above can be obtained for a certain work. When the work is a conductor, the work itself also functions as a work-side electrode.

【0033】又、上記実施形態では、研磨布5側の電極
23を、弾性部材10の上方に空間14を介して配設し
たが、本発明はこれに限定されず、研磨布5とワーク1
間に効率よく電界を発生できればよく、例えば弾性部材
10の外面に可撓性の電極を貼着して、この電極に可撓
性の絶縁部材を介して研磨布5を貼着してもよい。
In the above embodiment, the electrode 23 on the side of the polishing pad 5 is disposed above the elastic member 10 via the space 14. However, the present invention is not limited to this.
It is sufficient that an electric field can be efficiently generated therebetween. For example, a flexible electrode may be attached to the outer surface of the elastic member 10, and the polishing cloth 5 may be attached to this electrode via a flexible insulating member. .

【0034】[0034]

【発明の効果】本発明の研磨方法と半導体の研磨装置に
よれば、懸濁状態で供給され帯電した研磨砥粒が、電圧
印加手段による静電気力によって研磨布に強制的に吸引
されるので、半導体等のワーク表面にある凹部の底には
研磨砥粒が作用せず、ワーク表面の凸部が選択的に加工
される。従って、表面に段差の生じているワークの表面
を、少ない加工量及び加工時間で、効率よく平坦化する
ことができる。
According to the polishing method and the semiconductor polishing apparatus of the present invention, the charged polishing abrasive grains supplied in the suspended state are forcibly sucked into the polishing cloth by the electrostatic force of the voltage applying means. The abrasive grains do not act on the bottom of the concave portion on the surface of the work such as a semiconductor, and the convex portion on the work surface is selectively processed. Therefore, the surface of the work having a step on the surface can be efficiently planarized with a small processing amount and processing time.

【0035】本発明の研磨方法において、研磨布を、内
圧を有する袋状の弾性部材のワーク側の対面に保持さ
れ、この弾性部材をワークの表面に付勢しながらワーク
の表面を研磨するように構成すると、内圧を有する袋状
の弾性部材によって、ワークの表面の全面に均一な接触
圧力を加えながらこの表面を研磨することができるの
で、ワークの全面に渡って表面の凸部を同時に選択的に
加工することができ、保持されたワークに反りがあって
も、少ない加工量及び加工時間で、効率よくワークの全
面の凸部のみを除去することができる。
In the polishing method of the present invention, the polishing cloth is held on the opposite side of the work side of the bag-like elastic member having an internal pressure, and the work surface is polished while urging the elastic member against the work surface. With this configuration, the surface can be polished while applying a uniform contact pressure to the entire surface of the work by the bag-shaped elastic member having an internal pressure, so that the convex portions of the surface can be simultaneously selected over the entire surface of the work. Even if the held work is warped, only the protrusions on the entire surface of the work can be efficiently removed with a small processing amount and processing time.

【0036】本発明の研磨方法において、ワークをワー
ク表面に垂直なワーク回転軸回りに回転させ、かつ研磨
布を前記ワーク回転軸から離れたツール回転軸回りに回
転させながらワークの表面を研磨するように構成する
と、ワークの表面上のどの部位においても、その部位に
相対する研磨布上の部位と運動方向と運動速度とがほぼ
ランダマイズされ、同程度の加工作用を与えることがで
きるので、面積の大きなワークに対しても、ワークの表
面を均一に研磨し、効率よく平坦化することができる。
In the polishing method of the present invention, the surface of the workpiece is polished while rotating the workpiece about a workpiece rotation axis perpendicular to the workpiece surface and rotating the polishing cloth about a tool rotation axis away from the workpiece rotation axis. With such a configuration, in any part on the surface of the work, the part on the polishing cloth corresponding to the part, the movement direction and the movement speed are almost randomized, and the same processing action can be given, so that Even for a work having a large size, the surface of the work can be polished uniformly and flattened efficiently.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の半導体の研磨装置の一実施形態を示す
概略図。
FIG. 1 is a schematic view showing an embodiment of a semiconductor polishing apparatus according to the present invention.

【図2】本発明の研磨方法の一実施形態を説明する一部
拡大断面図。
FIG. 2 is a partially enlarged cross-sectional view illustrating one embodiment of the polishing method of the present invention.

【図3】本発明による研磨完了後のワークの一部断面を
示す拡大概略図。
FIG. 3 is an enlarged schematic view showing a partial cross section of a workpiece after polishing according to the present invention is completed.

【図4】ワークの一例の一部断面を示す拡大概略図。FIG. 4 is an enlarged schematic view showing a partial cross section of an example of a work.

【図5】従来例を示す概略図。FIG. 5 is a schematic diagram showing a conventional example.

【図6】従来例を上下反転して説明する一部拡大断面
図。
FIG. 6 is a partially enlarged cross-sectional view illustrating a conventional example upside down.

【図7】従来例による研磨完了後のワークの一部断面を
示す拡大概略図。
FIG. 7 is an enlarged schematic diagram showing a partial cross section of a work after polishing according to a conventional example.

【符号の説明】[Explanation of symbols]

1 表面に凸パターンのあるシリコンウエハ(ワーク) 2 ワーク保持手段 3 ツール保持手段 5 研磨布 8 コロイダルシリカ(研磨砥粒) 10 弾性部材 22 直流電源(電圧印加手段) L ワーク回転軸 M ツール回転軸 DESCRIPTION OF SYMBOLS 1 Silicon wafer (work) which has a convex pattern on the surface 2 Work holding means 3 Tool holding means 5 Polishing cloth 8 Colloidal silica (polishing abrasive) 10 Elastic member 22 DC power supply (voltage applying means) L Work rotation axis M Tool rotation axis

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 ワークの表面を、このワークに対して接
触しながら相対移動する研磨布とワーク間に研磨砥粒を
供給して研磨する研磨方法において、前記研磨布とワー
ク間に、前記研磨砥粒が前記研磨布側に電気的に引き付
けられるような電界を発生させながら研磨することを特
徴とする研磨方法。
In a polishing method for supplying and polishing abrasive grains between a polishing cloth and a work, the surface of the work relatively moving while being in contact with the work, the polishing is performed between the polishing cloth and the work. A polishing method characterized in that polishing is performed while generating an electric field such that abrasive grains are electrically attracted to the polishing cloth side.
【請求項2】 研磨布は、内圧を有する袋状の弾性部材
のワーク側の対面に保持され、この弾性部材をワークの
表面に付勢しながらワークの表面を研磨する請求項1記
載の研磨方法。
2. The polishing cloth according to claim 1, wherein the polishing cloth is held on a work-side surface of a bag-shaped elastic member having an internal pressure, and polishes the work surface while urging the elastic member against the work surface. Method.
【請求項3】 ワークをワーク表面に垂直なワーク回転
軸回りに回転させ、かつ研磨布を前記ワーク回転軸から
離れたツール回転軸回りに回転させながらワークの表面
を研磨する請求項1又は2記載の研磨方法。
3. The work surface is polished while rotating the work around a work rotation axis perpendicular to the work surface and rotating the polishing cloth about a tool rotation axis away from the work rotation axis. The polishing method as described above.
【請求項4】 ワークである半導体の表面を、この半導
体に対して接触しながら相対移動する研磨布と、この研
磨布と半導体間に懸濁状態で供給され帯電した研磨砥粒
とを用いて研磨する半導体の研磨装置において、半導体
を保持するワーク保持手段と、前記研磨布を保持するツ
ール保持手段と、前記研磨布とワーク間に電位差を発生
可能に前記ワーク保持手段と前記ツール保持手段とに夫
々配設された電極と、この一対の電極間に直流電圧を印
加する電圧印加手段とを備えたことを特徴とする半導体
の研磨装置。
4. Using a polishing cloth which relatively moves the surface of a semiconductor as a workpiece while contacting the semiconductor, and charged polishing abrasive grains supplied in a suspended state between the polishing cloth and the semiconductor. In a semiconductor polishing apparatus for polishing, a work holding means for holding a semiconductor, a tool holding means for holding the polishing cloth, and the work holding means and the tool holding means capable of generating a potential difference between the polishing cloth and the work. And a voltage applying means for applying a DC voltage between the pair of electrodes.
JP983397A 1997-01-23 1997-01-23 Polishing method and polishing equipment of semiconductor device Pending JPH10209090A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP983397A JPH10209090A (en) 1997-01-23 1997-01-23 Polishing method and polishing equipment of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP983397A JPH10209090A (en) 1997-01-23 1997-01-23 Polishing method and polishing equipment of semiconductor device

Publications (1)

Publication Number Publication Date
JPH10209090A true JPH10209090A (en) 1998-08-07

Family

ID=11731140

Family Applications (1)

Application Number Title Priority Date Filing Date
JP983397A Pending JPH10209090A (en) 1997-01-23 1997-01-23 Polishing method and polishing equipment of semiconductor device

Country Status (1)

Country Link
JP (1) JPH10209090A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004095571A1 (en) * 2003-04-22 2004-11-04 Ebara Corporation Substrate processing method and substrate processing apparatus
KR100564425B1 (en) * 1999-12-30 2006-03-28 주식회사 하이닉스반도체 Device For Polishing The Semiconductor Device Using Magnetic Field And Method Thereof

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100564425B1 (en) * 1999-12-30 2006-03-28 주식회사 하이닉스반도체 Device For Polishing The Semiconductor Device Using Magnetic Field And Method Thereof
WO2004095571A1 (en) * 2003-04-22 2004-11-04 Ebara Corporation Substrate processing method and substrate processing apparatus
JP2004327561A (en) * 2003-04-22 2004-11-18 Ebara Corp Substrate processing method and device thereof

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