JPH10201932A - Security system for game machine control chip - Google Patents

Abstract

PROBLEM TO BE SOLVED: To find an unfairness before checking by a collation device of a policeman or the like by controlling in such a manner that when the data match occurs, a route connecting signal is output, and when a mismatch occurs, a route interrupt signal is output to interrupt transmission/receiving between the CPU and the peripheral device. SOLUTION: Inquiry data is transmitted to an inquiry circuit 14 incorporated in a game control chip 1 at designated interval or at random after the power is on. The transmitted data is decoded by the inquiry circuit 14 and CPU 13, and the decoded transmit data is transmitted to an inquiry determining means 26. In the inquiry determining means 26, the returned data is again encoded, and it is determined by the determining means 26 whether the encoded data matches the transmit data or not. If a match occurs, the control chip 1 is judged to be normal, and a route connecting signal is output to a signal interrupt means 24. If a mismatch occurs, a route interrupt signal is transmitted, and the signal interrupt means 24 keeps its state until the power is again on.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention is incorporated into a microcomputer chip used for controlling a game machine such as a pachinko machine or a pachislot machine (hereinafter referred to as a chip for the sake of simplicity). Gaming machine control chip (for example, "gaming machine microprocessor"
(Japanese Unexamined Patent Application Publication No. 5-200153), a microcomputer circuit for controlling a gaming machine and a collation device for detecting illegality thereof (Japanese Unexamined Patent Application Publication No. 7-31737), and the like. BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a monitoring chip for preventing fraud such as counterfeiting a chip that connects the chip doubly.

[0002]

2. Description of the Related Art A conventional chip is disclosed in Japanese Patent Laid-Open No. 5-200.
No. 153 and Japanese Patent Application Laid-Open No. Hei 7-31737, a security check is performed by an identification circuit in a chip according to a predetermined algorithm to determine whether or not an application program stored in an external or internal ROM is legitimate. Has been invented and known in which an application program is executed, and the program is not executed when it is determined that the application program is not authorized. However, not only the modification of the program but also the imitation of the chip itself is performed, and the legitimate chip and the counterfeit chip are made to have a dual structure, the legitimate chip is activated at the time of security check, and the counterfeit chip is activated after the security check When configured, there is a problem that it does not work effectively. For this purpose, a device for checking control chips has also been developed (Japanese Patent Application Laid-Open No. Hei 7-31737) so that illegal chips can be checked.

[0003]

However, the checking of the control chip using the collating apparatus is performed by a procedure in which a police officer or the like in charge of the accident goes to the site after receiving a flash report of the fraud and performs collation inspection through the collating apparatus. Therefore, there is an inconvenience that fraud cannot be found until the inspection by the collation device is performed. In addition, there are several hundred gaming machines installed in each pachinko hall, and there is a disadvantage that it takes too much time to check all the gaming machines using the matching device. Therefore, the present invention has been made in view of the drawbacks of the related art, and it is possible to check forgery of the chip itself or a double chip structure, and when the result of the check is determined to be invalid, the gaming machine cannot be used. It is an object of the present invention to provide a security system that can detect fraud before receiving a check by a verification device such as a police officer by setting a state.

[0004]

That is, according to the present invention, there is provided a read-only memory (hereinafter referred to as a ROM) in which a built-in or external game machine control program is stored, and a control for executing the program written in the ROM. A gaming machine control chip comprising: a central processing unit (CPU) for performing a game; a verification circuit for returning a signal encrypted by a predetermined algorithm to data transmitted from the outside;
U and a gaming machine peripheral device that transmits and receives data. In the gaming machine, a signal for connecting and disconnecting a transmission / reception path between the CPU and the gaming machine peripheral device connected between the CPU and the gaming machine peripheral device. Data is transmitted at predetermined intervals or at random after power-on to the shut-off means and the matching circuit of the gaming machine control chip, and the data is compared based on the encrypted data returned from the matching circuit. When the data match, a path connection signal is output to the signal cutoff means, and when the data does not match, a path cutoff signal is output to the signal cutoff means to cut off transmission and reception between the CPU of the gaming machine control chip and the peripheral device. This object is attained by a security system for a gaming machine control chip in which a monitoring chip including a collation judging means for controlling the game machine is interposed.

According to a second aspect of the present invention, the monitoring chip collation judging means is identical to the collation circuit of the gaming machine control chip, and the collation data is supplied to both the collation circuits at predetermined intervals after the power is turned on. Or a means for randomly transmitting and comparing the encrypted data returned from each matching circuit, and a determining means for transmitting a path cutoff signal to a signal cutoff circuit when they do not match, for a gaming machine control. It is a chip security system.

A third aspect of the present invention is a security system for a gaming machine control chip, wherein the monitoring chip collation judging means is reset when power is turned on.

According to a fourth aspect of the present invention, the signal cutoff means includes:
This is a security system for a gaming machine control chip configured to cut off the path when the power is turned off.

In the gaming machine control chip according to the present invention, when the power is turned on, the signal interrupting means connects the CPU and the gaming machine peripheral device. Depending on the gaming machine control chip, a security check is performed to determine whether or not the user program written in the internal or external ROM at the beginning of power-on is legitimate (tested and passed by a third-party certification organization). If the result of the check is normal, the execution of the user program is permitted. Separately, data for verification (for example, a security information transfer command, key data, data, and dummy data) are transmitted from the verification chip determination means of the monitoring chip to the verification circuit of the gaming machine control chip at predetermined intervals after the power is turned on. I do. The data is encrypted by the matching circuit of the gaming machine control chip, and return data (for example, a data confirmation command, encrypted data, a security operation check code) is returned. It is preferable that the signal cutoff means be maintained in the cutoff state immediately after the power is turned on until the collation determination means issues a path connection signal.

By comparing the reply data with the original transmission data, the collation judging means can collate whether or not the gaming machine control chip is legitimate, and the collation result data coincides with the result data. At this time, a path connection signal is transmitted to the signal cutoff means, and the CPU of the gaming machine control chip can continue transmission and reception with peripheral devices of the gaming machine. When the result of the collation does not match, a path cutoff signal is transmitted to the signal cutoff means, and based on this signal, the signal cutoff means cuts off transmission and reception between the CPU and the peripheral device of the gaming machine. As a result, the communication between the CPU and the peripheral device is interrupted, and the operation of the gaming machine is substantially stopped.

[0010] Even after the first check of the monitoring chip is completed, the monitoring chip according to the present invention is configured to transmit the data for verification at predetermined intervals or at random. The matching circuit is checked over and over again for the chip determined to be valid. As a result, even if you cheat after switching from a legitimate chip to a counterfeit chip,
A fraud is found by the next collation check, and the substantial operation of the gaming machine is stopped. When the power is on, communication between the CPU of the gaming machine control chip and the peripheral device of the gaming machine is cut off unless the power is turned on again in order to maintain the state in which the matching determination unit determines that the device is invalid. .

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below in detail with reference to the illustrated embodiments. FIG. 1 shows a gaming machine control chip 1
FIG. 2 is a schematic block diagram showing a connection relationship between a monitoring chip 2 and a gaming machine peripheral device 3;
A built-in ROM 12 in which a user program is stored, a CPU 13 which performs a security check of the built-in ROM 12 and executes the user program stored in the ROM 12 while transmitting and receiving the user program to and from the gaming machine peripheral device 3; And a collation circuit 14 for encrypting the data transmitted from the collation determination means 24. The monitoring chip 2 includes a signal cutoff unit 24 connected to the gaming machine peripheral device 3 via the built-in input / output circuit 22.
And a collation determining means 26 for instructing the signal interrupting means 24 to connect / disconnect a path between the CPU 13 and the gaming machine peripheral device 3. The collating / determining means 26 is provided at a predetermined interval or at random after power-on. Means for transmitting data (for example, a security information transfer command, key data, data, and dummy data) for collation check to the collation circuit 14; and reply data (for example, data confirmation) encrypted and returned by the collation circuit 14 Command (encrypted data, security operation check code) for encrypting the data (comparison circuit); When the return data of the matching circuit 14 and the transmission data do not match, a path cutoff signal is output to the signal cutoff means 24. And it is configured to output a connection signal path when matched.

FIG. 2 shows another embodiment according to the present invention.
5 is stored. The security check circuit (not shown) incorporated in the gaming machine control chip 1 performs a security check using the CPU 13 on whether or not the user program written in the external ROM 15 is legitimate. Reference numeral 14 denotes a collation circuit similar to that shown in FIG. 1, and is configured to calculate the encryption of data transmitted from the monitoring chip 2 by using a CPU 13 according to a predetermined algorithm.
In the monitoring chip shown in FIG. 2, the input / output circuit 23 of the gaming machine peripheral device 3 is externally configured, and the CPU 1
Signal interrupting means 24 is interposed between the device 3 and the gaming machine peripheral device 3. Incidentally, the collation judging means 26 is constituted by the same one as in FIG.

In the above-described configuration, the security system according to the embodiment of the present invention operates as shown in the flowchart of FIG. Immediately after the power is turned on, generally, a security check is performed by an identification circuit (not shown) in the gaming machine control chip 1 on whether or not the user program stored in the ROM 12 or 15 is legitimate, and it is determined that the user program is legitimate. In this case, the user program controls the gaming machine peripheral device based on the data transmitted from the gaming machine peripheral device 3 so that the winning process is performed with a predetermined probability. At this time, the signal cutoff means 24 is in a connected state, and allows communication between the CPU 13 and the peripheral device of the gaming machine until the collation determination means 26 transmits a path cutoff signal. On the other hand, for the matching circuit 14 incorporated in the gaming machine control chip 1, data for the above-described matching (for example, security information transfer command, key data, data, dummy data) is provided at a predetermined interval or at random after power-on. Is sent. The received data is the matching circuit 1
4 and decrypted by the CPU 13, and the encrypted return data (for example, a data confirmation command, encrypted data, and a security operation check code) is transmitted to the collation determination unit 26.

The collating and judging means 26 re-encrypts the returned data, and judges whether or not the decrypted data matches the transmission data. If the transmission data matches the decrypted return data as a result of the determination, it is determined that the gaming machine control chip 1 is a legitimate one, and a path connection signal is output to the signal blocking means 24. However, when the transmission data and the decrypted return data do not match, a path cutoff signal is transmitted to the signal cutoff means 24, and the signal cutoff means 24 is turned on again.
The state is maintained until it becomes. When a predetermined time has elapsed after the first check of the matching circuit, data for new matching (for example, a security information transfer command,
Key data, data, and dummy data) are transmitted to the matching circuit 14. The collation circuit 14 encrypts the transmission data while using the CPU 13 again, and returns this to the collation determination means 26. The returned reply data is compared with the matching state of the transmission data and the reply data by the collating and judging means 26, and a path cutoff signal is output to the signal cutoff means 24 only when they do not match. In this embodiment, the signal interrupting means 24 is set to the connected state immediately after the power is turned on. However, the present invention is not limited to this. The interrupted state is maintained until the path determination signal is transmitted from the collation determining means 26. May be configured.

As described above, the transmission / reception between the CPU 13 and the gaming machine peripheral device 3 continues as long as the result of the check of the verification circuit repeated many times is determined to be normal. Will be blocked. In addition, when the signal is interrupted once, the signal interrupting unit 24 retains the state, so that it is not necessary to perform another check or the like.

Next, when the power is turned on again on the hall side after the end of the game time, the cut-off state of the signal cut-off means 24 is reset, and when the power is turned on, data exchange with the verification circuit 14 is performed again. Normality will be determined. Incidentally, in order to prevent impropriety, it is preferable that the signal cut-off means 24 be configured to cut off the path when the power is turned off.

[0017]

As described above, the security system for a gaming machine control chip according to the present invention is configured so that the verification circuit incorporated in the gaming machine control chip is checked at predetermined intervals or at random after power-on. When the game machine is not judged to be normal as a result of the check, the CPU of the game machine control chip and the peripheral device of the game machine are configured so as to cut off the mutual communication. Even if it is configured, it will not function as a gaming machine. Also, since the matching circuit of the gaming machine control chip is checked at predetermined intervals or randomly,
Even if a player or the like joins a fake chip in parallel with a legitimate chip and switches to a fake chip after verification of the legitimate chip, it will be detected by the monitoring chip, so prevent fraud. Can be. Further, in the security system according to the present invention, when the power is turned on, the collation is performed, and when the power is turned on, the command signal to the signal cutoff means is erased. , Which will lead to the use of legitimate chips.

[Brief description of the drawings]

FIG. 1 is a schematic block diagram of a first embodiment according to the present invention.

FIG. 2 is a schematic block diagram of a second embodiment according to the present invention.

FIG. 3 is a flowchart showing the operation of the security system according to the present invention.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 gaming machine control chip 2 monitoring chip 3 gaming machine peripheral device 12 built-in ROM 13 CPU 14 verification circuit 15 external ROM 22, 23 input / output circuit 24 signal blocking means 26 verification determination means

[Procedure amendment]

[Submission date] February 13, 1997

[Procedure amendment 1]

[Document name to be amended] Statement

[Correction target item name] Full text

[Correction method] Change

[Correction contents]

[Document Name] Statement

[Title of the Invention] Security system for gaming machine control chip

[Claims]

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention is incorporated into a microcomputer chip used for controlling a game machine such as a pachinko machine or a pachislot machine (hereinafter referred to as a chip for the sake of simplicity). Gaming machine control chip (for example, "gaming machine microprocessor"
(Japanese Unexamined Patent Application Publication No. 5-200153), a microcomputer circuit for controlling a gaming machine and a collation device for detecting illegality thereof (Japanese Unexamined Patent Application Publication No. 7-31737), and the like. BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a monitoring chip for preventing fraud such as counterfeiting a chip that connects the chip doubly.

[0002]

2. Description of the Related Art A conventional chip is disclosed in Japanese Patent Laid-Open No. 5-200.
No. 153 and Japanese Patent Application Laid-Open No. Hei 7-31737, a security check is performed by an identification circuit in a chip according to a predetermined algorithm to determine whether or not an application program stored in an external or internal ROM is legitimate. Has been invented and known in which an application program is executed, and the program is not executed when it is determined that the application program is not authorized. However, not only program modification but also counterfeiting of the chip itself is performed, and the legitimate chip and the counterfeit chip are made to have a dual structure, the legitimate chip is activated at the time of security check, and the counterfeit chip is activated after the security check When configured, there is a problem that it does not work effectively. For this purpose, a device for checking control chips has also been developed (Japanese Patent Application Laid-Open No. Hei 7-31737) so that illegal chips can be checked.

[0003]

However, the checking of the control chip using the collating apparatus is performed by a procedure in which a police officer or the like in charge of the accident goes to the site after receiving a flash report of the fraud and performs collation inspection through the collating apparatus. Therefore, there is an inconvenience that fraud cannot be found until the inspection by the collation device is performed. In addition, there are several hundred gaming machines installed in each pachinko hall, and there is a disadvantage that it takes too much time to check all the gaming machines using the matching device. Therefore, the present invention has been made in view of the drawbacks of the conventional technology, and it is possible to check forged or double-structured chips themselves. Accordingly, it is an object of the present invention to provide a security system capable of detecting fraud before receiving a check by a verification device such as a police officer.

[0004]

That is, according to the present invention, there is provided a read-only memory (hereinafter referred to as a ROM) in which a built-in or external game machine control program is stored, and a control for executing the program written in the ROM. A gaming machine control chip comprising a central processing unit (CPU) for performing a game, and a verification circuit for returning data encrypted by a predetermined algorithm to data transmitted from the outside;
In a gaming machine including a PU and a gaming machine peripheral device for transmitting and receiving data, a signal for connecting / disconnecting a transmission / reception path between the CPU and the gaming machine peripheral device connected between the CPU and the gaming machine peripheral device. Data is transmitted at predetermined intervals or at random after power-on to the shut-off means and the matching circuit of the gaming machine control chip, and the data is compared based on the encrypted data returned from the matching circuit. When the data match, a path connection signal is output to the signal cutoff means, and when the data does not match, a path cutoff signal is output to the signal cutoff means to cut off transmission and reception between the CPU of the gaming machine control chip and the peripheral device. This object is attained by a security system for a gaming machine control chip in which a monitoring chip including a collation judging means for controlling the game machine is interposed.

According to a second aspect of the present invention, the monitoring chip collation judging means is identical to the collation circuit of the gaming machine control chip, and the collation data is supplied to both the collation circuits at predetermined intervals after the power is turned on. Or a means for randomly transmitting and comparing the encrypted data returned from each matching circuit, and a determining means for transmitting a path cutoff signal to a signal cutoff circuit when they do not match, for a gaming machine control. It is a chip security system.

A third aspect of the present invention is a security system for a gaming machine control chip, wherein the monitoring chip collation judging means is reset when power is turned on.

According to a fourth aspect of the present invention, the signal cutoff means includes:
This is a security system for a gaming machine control chip configured to cut off the path when the power is turned off.

In the gaming machine control chip according to the present invention, when the power is turned on, the signal interrupting means connects the CPU and the gaming machine peripheral device. Depending on the gaming machine control chip, a security check is performed to determine whether or not the user program written in the internal or external ROM at the beginning of power-on is legitimate (tested and passed by a third-party certification organization). If the result of the check is normal, the execution of the user program is permitted. Separately, data for verification (for example, a security information transfer command, key data, data, and dummy data) are transmitted from the verification chip determination means of the monitoring chip to the verification circuit of the gaming machine control chip at predetermined intervals after the power is turned on. I do. The data is encrypted by the matching circuit of the gaming machine control chip, and return data (for example, a data confirmation command, encrypted data, a security operation check code) is returned. The signal interrupting means may be configured to maintain the interrupted state immediately after the power is turned on until the collation determining means issues a path connection signal.

By comparing the reply data with the original transmission data, the collation judging means can collate whether the gaming machine control chip is genuine or not, and the collation result data match. At times, a path connection signal is transmitted to the signal blocking means, and the CPU of the gaming machine control chip can transmit and receive to and from the peripheral device of the gaming machine. When the result of the collation does not match, a path cutoff signal is transmitted to the signal cutoff means, and based on this signal, the signal cutoff means cuts off transmission and reception between the CPU and the peripheral device of the gaming machine. As a result, the communication between the CPU and the peripheral device is interrupted, and the operation of the gaming machine is substantially stopped.

[0010] Even after the first check of the monitoring chip is completed, the monitoring chip according to the present invention is configured to transmit the data for verification at predetermined intervals or at random. The matching circuit is checked over and over again for the chip determined to be valid. As a result, even if you cheat after switching from a legitimate chip to a counterfeit chip,
A fraud is found by the next collation check, and the substantial operation of the gaming machine is stopped. When the power is on, communication between the CPU of the gaming machine control chip and the peripheral device of the gaming machine is cut off unless the power is turned on again in order to maintain the state in which the matching determination unit determines that the device is invalid. . In the case of random, the check is performed at random, and the check is performed only immediately after the power is turned on or only when a certain time has elapsed after the power is turned on.
It becomes difficult to take the timing of switching to an incorrect chip.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below in detail with reference to the illustrated embodiments. FIG. 1 shows a gaming machine control chip 1
And surveillance chip 2 and gaming machine peripheral device 3 such as a winning port
FIG. 3 is a schematic block diagram showing a connection relationship with a game machine control chip 1 in a built-in RO in which a user program is stored.
M12, a security check of the built-in ROM 12, and after the check, a CPU 13 for executing the user program stored in the ROM 12 while transmitting and receiving to and from the peripheral device 3 of the gaming machine, and a collation judging means 26 of the monitoring chip 2. And a matching circuit 14 for encrypting the data. The monitoring chip 2 includes a signal interrupting unit 24 connected to the gaming machine peripheral device 3 via the built-in input / output circuit 22, and a CPU 1 for the signal interrupting unit 24.
3 and a collation judging means 26 for instructing connection / disconnection of a route between the gaming machine peripheral device 3 and the collation judging means 26 for checking the collation circuit 14 at predetermined intervals or at random after power-on. (For example, a security information transfer command, key data, data, and dummy data), and return data (for example, a data confirmation command, encrypted data, and a security operation check code) which are encrypted and returned by the verification circuit 14. ), And a decision unit for comparing the return data decrypted by the encryption unit with the transmission data. The determination unit compares the return data and the transmission data of the verification circuit 14 with each other. Do not match, the signal cutoff means 24
, And outputs a path connection signal when they match.

FIG. 2 shows another embodiment according to the present invention.
5 is stored. Then, a security check is performed using the CPU 13 on whether or not the user program written in the external ROM 15 by the identification circuit (not shown) incorporated in the gaming machine control chip 1 is legitimate. Reference numeral 14 denotes a collation circuit similar to that shown in FIG. 1, and is configured to calculate the encryption of data transmitted from the monitoring chip 2 by using a CPU 13 according to a predetermined algorithm. In the monitoring chip shown in FIG. 2, the input / output circuit 23 of the gaming machine peripheral device 3 is configured externally, and the signal cutoff means 24 is interposed between the CPU 13 and the gaming machine peripheral device 3. . Incidentally, the collation judging means 26 is constituted by the same one as in FIG.

In the above-described configuration, the security system according to the embodiment of the present invention operates as shown in the flowchart of FIG. Immediately after the power is turned on, generally, a security check is performed by an identification circuit (not shown) in the gaming machine control chip 1 on whether or not the user program stored in the ROM 12 or 15 is legitimate, and it is determined that the user program is legitimate. In this case, by controlling the gaming machine device based on the user program, processing is performed so that the winning process is performed at a predetermined probability. At this time, the signal cutoff means 24 is in a connected state, and allows communication between the CPU 13 and the peripheral device of the gaming machine until the collation determination means 26 transmits a path cutoff signal. On the other hand, for the matching circuit 14 incorporated in the gaming machine control chip 1, data for the above-described matching (for example, a security information transfer command, key data,
Data and dummy data) are transmitted. The received data is encrypted by the matching circuit 14 and the CPU 13,
Encrypted reply data (for example, a data confirmation command,
The encrypted data and the security operation check code) are transmitted to the collation determination means 26.

The collating and judging means 26 re-encrypts the returned data, and judges whether or not the decrypted data matches the transmission data. If the transmission data matches the decrypted return data as a result of the determination, it is determined that the gaming machine control chip 1 is a legitimate one, and a path connection signal is output to the signal blocking means 24. However, when the transmission data and the decrypted return data do not match, a path cutoff signal is transmitted to the signal cutoff means 24, and the signal cutoff means 24 is turned on again.
The state is maintained until it becomes. When a predetermined time has elapsed after the first check of the matching circuit, data for new matching (for example, a security information transfer command,
Key data, data, and dummy data) are transmitted to the matching circuit 14. The collation circuit 14 encrypts the transmission data while using the CPU 13 again, and returns this to the collation determination means 26. The returned reply data is compared with the matching state of the transmission data and the reply data by the collating and judging means 26, and a path cutoff signal is output to the signal cutoff means 24 only when they do not match. In this embodiment, the signal interrupting means 24 is set to the connected state immediately after the power is turned on. However, the present invention is not limited to this. The interrupted state is maintained until the path determination signal is transmitted from the collation determining means 26. May be configured.

As described above, the transmission / reception between the CPU 13 and the gaming machine peripheral device 3 continues as long as the result of the check of the verification circuit repeated many times is determined to be normal. Will be blocked. In addition, when the signal is interrupted once, the signal interrupting unit 24 retains the state, so that it is not necessary to perform another check or the like. In this embodiment, data is collated at predetermined intervals. However, the present invention is not limited to this. Data may be collated at random. As a random example, data collation is performed immediately after the power is turned on, or after a lapse of a certain time after the power is turned on. Since the collation is performed at random in this manner, it is difficult to take the timing of switching to the counterfeit chip.

Next, when the power is turned on again on the hall side after the end of the game time, the cut-off state of the signal cut-off means 24 is reset, and when the power is turned on, data exchange with the verification circuit 14 is performed again. Normality will be determined. Incidentally, in order to prevent impropriety, it is preferable that the signal cut-off means 24 be configured to cut off the path when the power is turned off.

[0017]

As described above, the security system for a gaming machine control chip according to the present invention is configured so that the verification circuit incorporated in the gaming machine control chip is checked at predetermined intervals or at random after power-on. When the game machine is not judged to be normal as a result of the check, the CPU of the game machine control chip and the peripheral device of the game machine are configured so as to cut off the mutual communication. Even if it is configured, it will not function as a gaming machine. Also, since the matching circuit of the gaming machine control chip is checked at predetermined intervals or randomly,
Even if a player or the like joins a fake chip in parallel with a legitimate chip and switches to a fake chip after verification of the legitimate chip, it will be detected by the monitoring chip, so prevent fraud. Can be. Further, in the security system according to the present invention, when the power is turned on, the collation is performed, and when the power is turned on, the command signal to the signal cutoff means is erased. , Which will lead to the use of legitimate chips.

[Brief description of the drawings]

FIG. 1 is a schematic block diagram of a first embodiment according to the present invention.

FIG. 2 is a schematic block diagram of a second embodiment according to the present invention.

FIG. 3 is a flowchart showing the operation of the security system according to the present invention.

[Description of Signs] 1 gaming machine control chip 2 monitoring chip 3 gaming machine peripheral device 12 internal ROM 13 CPU 14 verification circuit 15 external ROM 22, 23 input / output circuit 24 signal blocking means 26 verification determination means

[Procedure amendment 2]

[Document name to be amended] Drawing

[Correction target item name] Figure 3

[Correction method] Change

[Correction contents]

FIG. 3

Claims (4)

[Claims] 1. A read-only memory (hereinafter referred to as a ROM) in which a built-in or external game machine control program is stored, a central processing unit (CPU) for controlling execution of a program written in the ROM, In a gaming machine comprising a gaming machine control chip comprising a verification circuit for returning a signal encrypted by a predetermined algorithm to data transmitted from the outside, and a gaming machine peripheral device for transmitting and receiving data to and from the CPU, Connect a transmission / reception path between the CPU and the gaming machine peripheral device connected between the CPU and the gaming machine peripheral device.
A signal interrupting means for interrupting, and transmitting data at predetermined intervals or at random after power-on to a verification circuit of the gaming machine control chip, and verifying the data based on the encrypted data returned from the verification circuit. When the data match, a path connection signal is output to the signal cutoff means, and when the data does not match, a path cutoff signal is output to the signal cutoff means to transmit and receive between the CPU of the gaming machine control chip and the peripheral device. A security system for a gaming machine control chip, characterized by interposing a monitoring chip comprising a collation determining means for controlling to shut off the game machine. 2. A verification circuit for the monitoring chip, comprising: a verification circuit identical to the verification circuit of the gaming machine control chip; and verification data for both of the verification circuits, at predetermined intervals after power-on or at random. 2. A transmitting means, and a judging means for comparing and collating encrypted data returned from each collating circuit and transmitting a path cutoff signal to a signal cutoff circuit when they do not match. A security system for a gaming machine control chip as described in the above. 3. The security system for a gaming machine control chip according to claim 1, wherein the monitoring chip collation determination means is configured to be reset when power is turned on. 4. The security system for a gaming machine control chip according to claim 1, wherein said signal cutoff means is configured to cut off a path when power is turned off.