JPH10190165A - Printed wiring board, semiconductor integrated circuit device and mounting method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To mount electronic parts on a monolayer in a printed wiring board and mount electronic parts in a printed wiring board in the same type of printed wiring board. SOLUTION: In a printed wiring board 1 provided with a monolayer parts mounting electrode 1a electrically connecting monolayer electronic parts to be mounted in a monolayer; and a plurality of stacked parts mounting electrode 1b electrically connecting a plurality of stacked electronic parts to be mounted in a stack in multilayer and formed according to the number of layers, the monolayer electronic parts are mounted in a monolayer, and also a plurality of stacked electronic parts are mounted in a multilayer in the same type of printed wiring board 1.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a technology for mounting electronic components, and more particularly, to a printed wiring board and a semiconductor integrated circuit that enable a multilayer mounting of electronic components such as a tape carrier package and a single-layer mounting of other electronic components. The present invention relates to a circuit device and a mounting method.

[0002]

2. Description of the Related Art The technology described below studies the present invention,
Upon completion, they were examined by the inventor, and the outline is as follows.

In a thin personal computer or the like, a thin electronic component and its high-density mounting are required.

[0004] As an example of a thin electronic component corresponding to this demand, TSOP (Thin Small Outli) has been proposed.
Ne Package) or UTSOP (Ultra T)
Hin Small Outline Packag
e) and the like.

Further, for high-density mounting, a tape carrier package (hereinafter referred to as TCP (Tape Carr)
memory package (e.g., DRAM (Dynamic R)
random Access Memory)) has been developed.

In general, small-capacity modules generally have S
OJ (Small Outline Package) is often used, and TCP is used for large-capacity modules.
Is used.

Further, since the layout of the footprints (component mounting electrodes) is different between the SOJ and the TCP, the mounting of the SOJ and the mounting of the TCP are performed by separate printed wiring boards.

Here, a module in which TCPs are stacked and stacked (multi-layered) is described in, for example, Nikkei BP, 199
Published May 31, 3rd, Susumu Kayama and Kunihiko Naruse (author), "Practical Course VLSI Packaging Technology (2)", 180-1
It is described on page 81.

[0009]

However, in the above-mentioned technology, when a large-capacity module, that is, a TCP, is to be mounted in a stacked manner, another board different from a printed circuit board for mounting a small-capacity module is used. Since it is necessary to prepare, there is a problem that the development cost of the substrate and the number of man-hours for production control increase.

An object of the present invention is to provide a printed wiring board, a semiconductor integrated circuit device, and a mounting method which enable single-layer mounting and multilayer mounting of electronic components.

The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

[0012]

SUMMARY OF THE INVENTION Among the inventions disclosed in the present application, the outline of a representative one will be briefly described.
It is as follows.

That is, the printed wiring board of the present invention comprises:
A single-layer component mounting electrode to which single-layer electronic components to be mounted are electrically connected, and a plurality of multi-layer electronic components to be stacked and mounted in a multilayer are electrically connected and a plurality of components are provided in accordance with the number of layers. The formed component mounting electrode for lamination is provided so that the electronic component for single layer can be mounted in a single layer, and a plurality of the electronic components for lamination can be stacked and mounted.

Thus, even when a large-capacity mounting is performed,
Also, when mounting with a small capacity, it can be performed with the same type of printed wiring board.

As a result, the type (number of printed wiring boards) of the printed wiring boards can be reduced, thereby facilitating the production management of the printed wiring boards and the semiconductor integrated circuit device using the same.

Further, in the semiconductor integrated circuit device of the present invention, a single-layer electronic component to be mounted in a single layer, a plurality of multilayer electronic components that can be mounted in multiple layers, and the single-layer electronic component are electrically connected. A single-layer component mounting electrode capable of being mounted on a single layer and a plurality of the electronic components for lamination are electrically connected to each other for lamination mounting, and a plurality of component mounting electrodes for lamination are provided in accordance with the number of layers. And a plurality of the electronic components for lamination are mounted on the printed wiring board in a single layer or on a plurality of layers.

The semiconductor integrated circuit device of the present invention is a tape carrier package in which the electronic component for lamination has a semiconductor chip mounted thereon.

Further, according to the mounting method of the present invention, a single-layer component mounting electrode capable of mounting a single-layer electronic component on a single layer and a plurality of electronic components for lamination are stacked and formed in a plurality according to the number of layers. Preparing a printed wiring board provided with the component mounting electrodes for lamination, and, when mounting the electronic component for single layer, mounting the electronic component for single layer on the component for single layer of the printed wiring board. When the electronic component for temporary mounting is temporarily fixed to a mounting electrode and the electronic component for laminating is mounted, the electronic component for laminating is sequentially applied to the electronic component for laminating in order from the lower electronic component for laminating in the same type of the multilayer component for the printed wiring board. Temporarily fixing the electronic component for mounting on the mounting electrode with the electrical bonding material; and electrically connecting the electronic component for single layer to the component mounting electrode for single layer of the printed wiring board or the same type of the electronic component for lamination. The stacking component mounting electrode line substrate and a step of electrically connecting.

[0019]

Embodiments of the present invention will be described below in detail with reference to the drawings.

FIG. 1 is a plan view showing an embodiment of a structure of a printed wiring board according to the present invention, and FIG. 2 is a portion showing an embodiment of the structure of a semiconductor integrated circuit device (large capacity) according to the present invention. FIG. 3 is a partial sectional view showing an example of the embodiment of the structure of the semiconductor integrated circuit device (large capacity) according to the present invention, and FIG. 4 is an embodiment of the structure of the semiconductor integrated circuit device (small capacity) according to the present invention. FIG. 5 is a partial plan view showing an example of the embodiment, and FIG. 5 is a partial sectional view showing an example of the embodiment of the structure of the semiconductor integrated circuit device (small capacity) of the present invention.

Printed wiring board 1 according to the present embodiment
Is a device on which various electronic components are mounted. The configuration of the device will be described. The single-layer component mounting electrode 1a electrically connected to the single-layer electronic component to be mounted in a single layer and the multilayer mounting are performed in multiple layers. A plurality of laminated electronic components are electrically connected and a plurality of laminated component mounting electrodes 1b are provided according to the number of the laminated electronic components, and the single-layer electronic component can be mounted in a single layer. A plurality of the electronic components for lamination can be laminated and mounted.

That is, on the front surface (or the back surface) of the printed wiring board 1 of this embodiment, a single-layer component mounting electrode 1a called a footprint and a lamination component mounting electrode 1b also called a footprint are provided. When mounting a small capacity, the component mounting electrode 1 for a single layer is provided.
When a is used and a large-capacity mounting is performed, the component mounting electrode 1b for lamination is used.

Therefore, the same type of printed wiring board 1 is used for mounting a small capacity and for mounting a large capacity.
Can be used.

In this embodiment, SOJ2 is taken as an example of a small-capacity single-layer electronic component, and TCP3 (tape carrier package) is taken as an example of a large-capacity electronic component for lamination. I do.

In other words, when the small-capacity mounting is performed, the small-capacity SOJ2 is mounted on the single-layer component mounting electrode 1a in a single layer, and when the large-capacity mounting is performed, the TCP3 is mounted on a different stacking component. They are separately mounted on the mounting electrodes 1b.

Therefore, the component mounting electrode 1a for a single layer provided on the printed wiring board 1 has the SOJ2 mounted thereon and is electrically connected thereto. Similarly, the component mounting electrode 1b for a lamination has a TCP3. It is mounted and electrically connected.

In this embodiment, since the electronic component for a single layer is SOJ2, as shown in FIG. 1, a pair of component mounting electrodes 1a for a single layer is connected to the SOJ2 shown in FIG.
2 are arranged in accordance with the number of external terminals 2a, and a plurality of S
A pair of single-layer component mounting electrodes 1a are provided in a plurality of rows so that the OJ2 can be mounted.

In the present embodiment, as an example of a large-capacity stacked mounting, a case will be described in which TCPs 3 in which external terminals 3a are arranged in two rows are stacked in two layers (two stages).

Therefore, as in the case of SOJ2, two pairs of component mounting electrodes 1b for lamination corresponding to each TCP3 to be laminated are arranged according to the number of external terminals 3a of TCP3 shown in FIG. A plurality of lamination component mounting electrodes 1b are provided in a plurality of rows so that a plurality of TCPs 3 can be mounted.

In the present embodiment, among the component mounting electrodes 1b for lamination, the component mounting electrode 1b for mounting the lower TCP3 is referred to as the lower component mounting electrode 1c, and the electrode for mounting the upper TCP3. The component mounting electrode 1b for lamination is referred to as an upper component mounting electrode 1d.

The printed wiring board 1 according to the present embodiment
, Two pairs of laminated component mounting electrodes 1b are provided outside a pair of single-layer component mounting electrodes 1a.

That is, a plurality of pairs of lower-stage component mounting electrodes 1c for mounting the lower TCP3 are provided on both outer sides of a plurality of pairs of single-layer component mounting electrodes 1a. A plurality of pairs of upper component mounting electrodes 1d are provided on both outer sides of the component mounting electrodes 1c.

Here, in the printed wiring board 1 of the present embodiment shown in FIG. 1, the single-layer component mounting electrodes 1a and the lower-stage component mounting electrodes 1c of each row are connected and provided.
The component mounting electrode 1a for a single layer and the component mounting electrode 1c for a lower layer are not necessarily required to be connected to each other and may be provided separately.

The lower component mounting electrode 1c and the upper component mounting electrode 1d are provided separately and insulated from each other, but have a common terminal that can be electrically connected to the lower TCP3 and the upper TCP3. In this case, the lower component mounting electrode 1c and the upper component mounting electrode 1d corresponding to the common terminal may not be provided separately from each other, but may be provided in a connected manner.

The printed wiring board 1 according to the present embodiment
In this case, the installation pitch between adjacent single-layer component mounting electrodes 1a is equal to the installation pitch between adjacent lamination component mounting electrodes 1b.

That is, the pitch (pin pitch) between the external terminals 2a of the SOJ2 mounted in a single layer and the T
This is the case where the pitch between the external terminals 3a of CP3 is equal.

The printed wiring board 1 of the present embodiment
Is formed of, for example, an epoxy-based resin, and has a predetermined wiring therein.

Further, the inside of the printed wiring board 1 of the present embodiment has, for example, a multilayer wiring structure.

The component mounting electrode 1a for single layer and the component mounting electrode 1b for lamination are obtained by, for example, applying a solder plating to the surface of a copper foil.

The semiconductor integrated circuit device according to the present embodiment will be described.

The semiconductor integrated circuit device uses the printed wiring board 1, and a plurality of SOJs 2, which are examples of single-layer electronic components, are mounted on the printed wiring board 1 in a single-layer or multilayer electronic component. An example is a module in which a plurality of TCP3s are stacked and mounted.

That is, the printed wiring board 1 used in the semiconductor integrated circuit device is a board on which the TCP 3 can be electrically connected and stacked and mounted.
It is also a substrate that can be mounted in a single layer by electrically connecting J2.

Here, the configuration of the semiconductor integrated circuit device (module) is a single-layer electronic component mounted on a single layer.
OJ2 is electrically connected to TCP3, which is a plurality of electronic components for lamination that can be mounted in multiple layers, and SOJ2 is electrically connected to single-layer component mounting electrode 1a that can be mounted in a single layer and multiple TCP3s. And a printed wiring board 1 provided with a plurality of component mounting electrodes 1b for lamination formed in accordance with the number of layers.

As shown in FIG. 4 and FIG.
J2 has a semiconductor chip 4 on which a semiconductor integrated circuit is formed, and its external terminal 2a is bent inward in a J-shape.
J2 has a total of 28 pins having 14 external terminals 2a on one side as an example.

The SOJ 2 includes a semiconductor chip 4 and a sealing body 2b formed by sealing the periphery of the semiconductor chip 4 with a resin and external terminals 2a as external leads.

As shown in FIGS. 2 and 3, the TCP 3 as a tape carrier package has a semiconductor chip 4 on which a semiconductor integrated circuit is formed as in the case of the SOJ 2, and is mounted on the semiconductor chip 4. It comprises an external terminal 3a which is a film-shaped external lead to be mounted, a film carrier 3b for supporting the external terminal, and a protective resin 3c for protecting the semiconductor chip 4.

Here, TCP3 in this embodiment is used.
Similarly to SOJ2, it has a total of 28 pins having 14 external terminals 3a on one side.

Further, since the semiconductor integrated circuit device of the present embodiment uses the printed wiring board 1,
In the printed wiring board 1, the component mounting electrode 1a for a single layer
Are provided on both outer sides thereof.

That is, a plurality of pairs of lower-layer TCP3 lamination component mounting electrodes 1b are provided on both outer sides of a plurality of pairs of single-layer component-mounting electrodes 1a. A plurality of pairs of upper-layer TCP3 component mounting electrodes 1b are provided on both outer sides of the component mounting electrodes 1b.

The component mounting electrode 1b for lamination includes a component mounting electrode 1c for the lower stage and a component mounting electrode 1d for the upper stage.

Thus, the semiconductor integrated circuit device
For example, in the case of a large-capacity module or the like, and a large-capacity mounting is performed, as shown in FIG. 3, the lower component mounting electrode 1c and the upper component mounting electrode 1d are each provided with a TCP3.
Are mounted in two layers (two stages).

Further, when the semiconductor integrated circuit device is a small-capacity module or the like, and a small-capacity mounting is to be performed, as shown in FIG.
J2 is implemented as a single layer.

The printed wiring board 1 is provided with a plurality of pairs of single-layer component mounting electrodes 1a and a pair of lamination component mounting electrodes 1b. Can mount a plurality of SOJs 2 in a single layer, and can stack a plurality of TCPs 3 on the same type of printed wiring board 1.

The mounting method according to the present embodiment will be described.

The above mounting method is a mounting method for mounting an electronic component such as the SOJ2 or the TCP3 on the printed wiring board 1 according to the present embodiment.
There are a case where SOJ2 which is a single-layer electronic component is mounted on the printed wiring board 1 and a case where TCP3 which is an electronic component for lamination is mounted on the printed wiring board 1 by lamination.

That is, the printed wiring board 1 used in the mounting method is a board that can be stacked and mounted by electrically connecting the TCPs 3 and is mounted in a single layer by electrically connecting the SOJs 2. It is also a possible substrate.

Thus, when the semiconductor integrated circuit device has a small capacity, SOJ2 is mounted in a single layer, and when the semiconductor integrated circuit device has a large capacity, TCP3 is mounted in a stacked manner.

First, in both cases, the single-layer component mounting electrode 1a on which the SOJ2 can be mounted in a single layer and a plurality of TCPs
3 and a plurality of component mounting electrodes 1b for lamination formed in accordance with the number of layers (here, the component mounting electrode 1b for lamination is composed of a component mounting electrode 1c for the lower stage and a component mounting electrode 1d for the upper stage). Is prepared in advance.

That is, as shown in FIG. 1, a plurality of pairs of lower-stage component mounting electrodes 1c for mounting the lower TCP3 are provided on both outer sides of a plurality of pairs of single-layer component mounting electrodes 1a, and A printed wiring board 1 having a plurality of pairs of upper component mounting electrodes 1d for mounting the upper TCP 3 on both outer sides of the plurality of lower component mounting electrodes 1c is prepared.

Subsequently, when the semiconductor integrated circuit device has a small capacity, the SOJ 2 is mounted on the printed wiring board 1 in a single layer.

At this time, an adhesive electrical bonding material such as a solder paste is applied to the predetermined single-layer component mounting electrode 1a of the printed wiring board 1, and the predetermined external terminal 2a of the SOJ 2 is connected to the printed wiring board 1. The first predetermined single-layer component mounting electrode 1a is temporarily fixed by the electric bonding material.

Thereafter, the SOJ 2 is electrically connected to the component mounting electrode 1 a for a single layer of the printed wiring board 1.

That is, the printed wiring board 1 on which the SOJ 2 is temporarily fixed is passed through a reflow furnace or the like, whereby the electrical bonding material is melted and the SOJ 2 is transferred to the printed wiring board 1.
Electrically connected to

When the semiconductor integrated circuit device has a large capacity, the TCP 3 is mounted on the same type of printed wiring board 1 by lamination.

First, a predetermined lower component mounting electrode 1c and a predetermined upper component mounting electrode 1c of the same type of printed wiring board 1
An adhesive electrical bonding material such as a solder paste is applied to both of d.

Subsequently, the TCP 3 is temporarily fixed to the lamination component mounting electrode 1b of the printed wiring board 1 in order from the lower TCP 3 with an electrical bonding material such as a solder paste.

That is, first, the lower TCP 3 is temporarily fixed to the predetermined lower component mounting electrode 1c.

Further, from the upper side of the lower TCP 3, the upper TC
P3 is temporarily fixed to a predetermined upper component mounting electrode 1d.

That is, the upper TCP is added to the upper layer of the lower TCP3.
3 are arranged, and the TCPs 3 are stacked and arranged in two layers (two stages).

Thereafter, the lower TCP 3 and the upper TCP 3 are electrically connected to the component mounting electrodes 1 b for the same type of the printed wiring board 1.

That is, the same type of printed wiring board 1 in which the lower TCP 3 and the upper TCP 3 are temporarily fixed is passed through a reflow furnace or the like, whereby the electrical bonding material is melted and
The TCP 3 stacked and mounted on the layers is electrically connected to the printed wiring board 1.

According to the printed wiring board, the semiconductor integrated circuit device, and the mounting method of the present embodiment, the following operational effects can be obtained.

That is, the SOJ2 is printed on the printed wiring board 1.
The provision of a single-layer component mounting electrode 1a for mounting a single-layer (electronic component for single layer) on a single layer and a multi-layer component mounting electrode 1b for mounting TCP3 (multi-layer electronic component) in multiple layers are provided. The same type of printed wiring board 1 can be used for mounting a capacitor and for mounting a small capacitor.

That is, since the stacked mounting can be performed using the same type of printed wiring board 1 as the printed wiring board 1 for mounting a small capacity, the capacity that can be mounted by the same type of printed wiring board 1 is increased. Can be done.

Therefore, both the large-capacity mounting and the small-capacity mounting can be performed by the same type of printed wiring board 1, so that the types (number of cases) of the printed wiring board 1 can be reduced.

As a result, the development cost of the printed wiring board 1 can be reduced, and the production management of the printed wiring board 1 and a semiconductor integrated circuit device such as a module using the printed wiring board 1 can be simplified.

Further, since the type (number of cases) of the printed wiring board 1 can be reduced, the type of development of the printed wiring board 1 and the semiconductor integrated circuit device can also be reduced, and as a result, the number of development steps can be reduced. In addition, the development time can be reduced.

In the printed wiring board 1, the component mounting electrodes 1b for lamination are provided on both outer sides of the component mounting electrodes 1a for single layer.
Is provided, it is possible to perform lamination mounting on the printed wiring board 1 that has already been developed with a small correction, and it is possible to reduce the number of development steps for mounting with a large capacity.

Further, since the electronic component for stacking is the TCP 3 on which the semiconductor chip 4 is mounted, a thin mounting can be realized even when the electronic components are stacked in multiple layers (a plurality of stages). The integrated circuit device can be formed thin.

Thus, for example, a semiconductor integrated circuit device such as a large-capacity and thin memory module in which a plurality of DRAMs are mounted can be realized.

Note that the printed wiring board 1 has two TCP3s.
By being mounted in layers, the capacity can be doubled while the semiconductor integrated circuit device is mounted thin.

Although the invention made by the inventor has been specifically described based on the embodiments of the present invention, the present invention is not limited to the above embodiments of the invention, and does not depart from the gist of the invention. It is needless to say that various changes can be made.

For example, in the above-described embodiment, the SOJ2 mounted on a single layer in a small-capacity semiconductor integrated circuit device is used.
Is the same as the pitch between the external terminals 2a and the pitch between the external terminals 3a of the TCP 3 stacked and mounted in a large-capacity semiconductor integrated circuit device, that is, the component mounting electrode 1a for the adjacent single layer in the printed wiring board 1. Although the case where the installation pitch between them and the installation pitch between adjacent component mounting electrodes 1b are equal has been described, the mounting of the component mounting electrode 1a for a single layer and the component mounting electrode 1b for a laminate on the printed wiring board 1 are described. The pitch may be different between the component mounting electrode 1a for single layer and the component mounting electrode 1b for lamination as in the other embodiments shown in FIGS.

The printed wiring board 1 shown in FIG.
This is the case where the pitch between the external terminals 2a of the SOJ2 and the pitch between the external terminals 3a of the TCP 3 are different.
The mounting pitch of the component mounting electrodes 1b for mounting the P3 is smaller than the mounting pitch of the component mounting electrodes 1a for the single layer mounting the SOJ2.

That is, the pitch between the external terminals 3a of the TCP 3 is smaller than the pitch between the external terminals 2a of the SOJ 2.

Further, in the printed wiring board 1 shown in FIG. 6, a single-layer component mounting electrode 1a for mounting the SOJ2 and a multilayer component mounting electrode 1b for mounting the TCP3 are mounted so as to effectively utilize the area. Are arranged alternately.

That is, one side of the pair of two sets of component mounting electrodes 1b for TCP3 lamination is arranged between the pair of single layer component mounting electrodes 1a for SOJ2 mounting.

However, even when the installation pitch is different between the component mounting electrode 1a for single layer and the component mounting electrode 1b for lamination, the SOJ2 mounting is performed as in the printed wiring board 1 (see FIG. 1) of the embodiment. A pair of two component mounting electrodes 1b for TCP3 lamination mounting may be provided on both outer sides of a pair of component mounting electrodes 1a for single layer.

Here, FIGS. 7 and 8 show FIGS. 6A and 6B in the case of a large-capacity semiconductor integrated circuit device (for example, a module).
1 shows a state in which the TCP 3 is mounted on the printed wiring board 1 shown in FIG.

FIGS. 9 and 10 show a state in which a single layer of SOJ2 is mounted on the printed wiring board 1 shown in FIG. 6 in the case of a small-capacity semiconductor integrated circuit device.

In the structure of the printed wiring board 1 shown in FIG. 6 and the structure and mounting method of the semiconductor integrated circuit device shown in FIGS. 7 to 10, the single-layer component mounting electrode 1a of the printed wiring board 1 The embodiment (FIG. 1) except that the installation pitch differs from that of the mounting electrode 1b.
5) are the same as those described in FIG.
The overlapping description is omitted.

Here, the function and effect obtained by the other embodiments shown in FIGS. 6 to 10 will be described.
a and the pitch of the adjacent component mounting electrodes 1
Since the installation pitches of b are different, even if the lead pitch differs between a small-capacity electronic component (for example, a semiconductor integrated circuit device such as a module) and the large-capacity electronic component, the same type of printed wiring is used. The mounting of the small-capacity electronic component and the mounting of the large-capacity electronic component on the substrate 1 can be made possible.

Further, other functions and effects obtained by the other embodiments shown in FIGS. 6 to 10 are the same as those described in the above-described embodiment, and the duplicated description will be omitted.

In the above-described embodiment and the other embodiments, the case where SOJ2 is mounted in a single layer is taken as an example of a small-capacity semiconductor integrated circuit device. TCP3 as
The electronic components mounted in a single layer and stacked are not limited to SOJ2 and TCP3, but may be replaced by other electronic components (for example, SOP (Small Outline) for single layer mounting). P
package), the TSO shown in FIG.
P5) may be implemented.

Here, a semiconductor integrated circuit device according to another embodiment shown in FIG. 11 has a TSOP 5 stacked and mounted on the printed wiring board 1 shown in FIG.

That is, in the case of a large-capacity semiconductor integrated circuit device (module or the like), the TSOP 5 is mounted on the lower component mounting electrode 1c of the printed wiring board 1 and provided on both outer sides of the lower component mounting electrode 1c. Another TSOP5 is mounted on the upper component mounting electrode 1d thus obtained.
TSO is applied to both the first layer (first stage) and the second layer (second stage).
Implement P5.

In this case, the TSOP5 of the second layer (second stage)
The length of the external terminal 5a, which is the external lead of
The SOP 5 is formed longer than the external terminal 5a.

As a result, even in the large-capacity semiconductor integrated circuit device stacked and mounted, it is possible to further increase the capacitance while realizing a reduction in thickness.

Note that the semiconductor integrated circuit device shown in FIG.
5 and SOJ2, or TSOP5 and SOP (not shown) and the like may be stacked and mounted.

In the above-described embodiment (FIGS. 1 to 5) and the other embodiments (FIGS. 6 to 11), when a large-capacity semiconductor integrated circuit device is manufactured, an electronic device such as TCP3 is used. The case where the components are stacked and mounted in two layers (two stages) has been described, but the number of layers is not limited to two layers, and two or more layers may be stacked according to the size of the capacitance. Good.

At this time, according to the number of electronic components to be laminated, the printed wiring board 1 (see FIG. 1 or FIG. 6) has a pair of single-layer component mounting electrodes 1a and a pair of laminated component mounting electrodes 1a. The component mounting electrodes 1b are provided according to the number of layers.

As a result, it is possible to realize a semiconductor integrated circuit device in which a plurality of stacked layers of two or more layers are mounted according to the size of the capacitance.

In the above-described embodiment (FIGS. 1 to 5) and the other embodiments (FIGS. 6 to 11), the external terminal 2a which is an external lead of an electronic component (SOJ2, TCP3 or TSOP5) is used. , 3a and 5a are installed in two directions, but the protruding directions of the external leads in the electronic component are not limited to two directions, but may be four directions other than the two directions. Is also good.

In this case, for example, the printed wiring board 1
(See FIG. 1 or FIG. 6). The four-direction single-layer component mounting electrode 1a and the four-direction same-layer lamination component mounting electrode 1b outside each single-layer component mounting electrode 1a are laminated with electronic components. It is provided according to the number.

Thus, when a small-capacity mounting is performed,
A QFP (Quad) in which the external leads are exposed in four directions
A single-layer electronic component such as a flat package can be mounted in a single layer. When a large-capacity mounting is to be performed, the same type of printed wiring board 1 is used so that the TQFP in which the external leads are exposed in four directions is used. (Thin Qua
d Flat Package) can be stacked and mounted. As a result, a large-capacity semiconductor integrated circuit device (for example, a module) can be realized by using the printed wiring board 1. it can.

[0106]

Advantageous effects obtained by typical ones of the inventions disclosed by the present application will be briefly described as follows.
It is as follows.

(1). A single-layer component mounting electrode that mounts a single-layer electronic component on a printed wiring board and a multi-layer component mounting electrode that allows multi-layer mounting of the multi-layer electronic component are provided. Can be stacked using a printed wiring board of the same type as the printed wiring board that performs the above-described steps, so that the type (number of cases) of the printed wiring boards can be reduced. As a result, the production management of the printed wiring board and the semiconductor integrated circuit device using the same can be facilitated.

(2). Since the number of types of printed wiring boards can be reduced, the development cost can be reduced.

(3). Since the number of types of printed wiring boards can be reduced, the types of development of printed wiring boards and semiconductor integrated circuit devices can also be reduced. As a result, development man-hours and development time can be reduced.

(4). In the printed wiring board, the component mounting electrode for lamination is provided outside the component mounting electrode for single layer, so it is possible to perform the lamination mounting with a small modification even on the developed printed wiring board, Development man-hours for large-capacity mounting can be reduced.

(5). Since the stacking electronic component is a TCP on which a semiconductor chip is mounted, a thin mounting can be realized even when the electronic components are stacked in multiple layers.
A semiconductor integrated circuit device such as a module can be formed thin.

(6). In the printed wiring board, since the installation pitch between adjacent single-layer component mounting electrodes is different from the installation pitch between adjacent lamination component mounting electrodes, small-capacity electronic components and large-capacity electronic components Thus, even if the lead pitch is different, it is possible to mount a small-capacity electronic component and a large-capacity electronic component on the same type of printed wiring board.

[Brief description of the drawings]

FIG. 1 is a plan view showing an example of an embodiment of the structure of a printed wiring board according to the present invention.

FIG. 2 is a partial plan view showing an example of the embodiment of the structure of the semiconductor integrated circuit device (large capacity) according to the present invention.

FIG. 3 is a partial cross-sectional view showing an example of an embodiment of the structure of a semiconductor integrated circuit device (large capacity) according to the present invention.

FIG. 4 is a partial plan view showing an example of the embodiment of the structure of the semiconductor integrated circuit device (small capacity) according to the present invention.

FIG. 5 is a partial sectional view showing an example of an embodiment of a structure of a semiconductor integrated circuit device (small capacity) according to the present invention.

FIG. 6 is a plan view showing a structure of a printed wiring board according to another embodiment of the present invention.

FIG. 7 is a partial plan view showing a structure of a semiconductor integrated circuit device (large capacity) according to another embodiment of the present invention.

FIG. 8 is a partial cross-sectional view showing a structure of a semiconductor integrated circuit device (large capacity) according to another embodiment of the present invention.

FIG. 9 is a partial plan view showing the structure of a semiconductor integrated circuit device (small capacity) according to another embodiment of the present invention.

FIG. 10 is a partial sectional view showing a structure of a semiconductor integrated circuit device (small capacity) according to another embodiment of the present invention;

FIG. 11 is a partial cross-sectional view showing a structure of a semiconductor integrated circuit device (large capacity) according to another embodiment of the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Printed wiring board 1a Component mounting electrode for single layer 1b Component mounting electrode for lamination 1c Component mounting electrode for lower stage 1d Component mounting electrode for upper stage 2 SOJ (electronic component for single layer) 2a External terminal 2b Sealing main body 3 TCP (layer) 3a External terminal 3b Film carrier 3c Protective resin 4 Semiconductor chip 5 TSOP 5a External terminal

──────────────────────────────────────────────────の Continued on front page (51) Int.Cl. ⁶ Identification code FI H01L 25/18

Claims (9)

[Claims] 1. A printed wiring board on which electronic components are mounted, comprising: a single-layer component mounting electrode to which a single-layer electronic component to be mounted in a single layer is electrically connected; Electronic components are electrically connected and a plurality of laminated component mounting electrodes are provided in accordance with the number of the laminated components, and the single-layer electronic component can be mounted in a single layer, and a plurality of the laminated electronic components can be mounted. A printed wiring board characterized in that electronic parts can be stacked and mounted. 2. The printed wiring board according to claim 1, wherein the electronic component for lamination is a tape carrier package having a semiconductor chip mounted thereon, and the component mounting electrode for lamination is provided with the tape carrier package mounted thereon. Printed wiring board, characterized in that it is an electrode. 3. A single-layer electronic component that is mounted in a single layer, a plurality of multilayer electronic components that can be stacked and mounted in multiple layers, and a single layer that is electrically connected to the single-layer electronic component and that can be mounted in a single layer. And a printed wiring board provided with a plurality of the electronic components for lamination and a plurality of the electronic components for lamination, which are electrically connected and stacked and mounted, and a plurality of component mounting electrodes for the lamination formed in accordance with the number of laminations. A semiconductor integrated circuit device, wherein the electronic component for lamination is mounted on the printed wiring board in a single layer or a plurality of electronic components for lamination are mounted on the printed wiring board. 4. The semiconductor integrated circuit device according to claim 3, wherein said electronic component for lamination is a tape carrier package having a semiconductor chip mounted thereon. 5. The semiconductor integrated circuit device according to claim 3, wherein said stacking electronic component is a tape carrier package having a semiconductor chip mounted thereon, and
A semiconductor integrated circuit device, wherein the tape carrier package is mounted on the printed wiring board in two layers. 6. The semiconductor integrated circuit device according to claim 3, wherein in the printed wiring board, the component mounting electrode for lamination is provided outside the component mounting electrode for single layer. A semiconductor integrated circuit device characterized by the above-mentioned. 7. The semiconductor integrated circuit device according to claim 3, wherein in the printed wiring board, an installation pitch between adjacent single-layer component mounting electrodes,
A semiconductor integrated circuit device, wherein the pitch at which adjacent component mounting electrodes for lamination are different from each other. 8. A method for mounting an electronic component, comprising: mounting a single-layer component mounting electrode capable of mounting a single-layer electronic component on a single layer; A step of preparing a printed wiring board provided with a plurality of formed component mounting electrodes; and mounting the single-layer electronic component on the printed circuit board. When the electronic component for mounting is temporarily fixed to the component mounting electrode for layer by the electric bonding material and the electronic component for lamination is mounted, the electronic component for lamination is sequentially arranged from the lower electronic component for lamination to the same type of the printed wiring board. A step of temporarily fixing the component mounting electrode for lamination with the electrical bonding material; and electrically connecting the electronic component for single layer to the component mounting electrode for single layer of the printed wiring board or the same type of the electronic component for lamination. The pre Electrically connecting to the component mounting electrodes for lamination of a printed circuit board. 9. The mounting method according to claim 8, wherein the electronic component for lamination is a tape carrier package having a semiconductor chip mounted thereon, and the tape carrier package is laminated on the printed wiring board and mounted. A mounting method characterized by that: