JPH10189963A - Simulator and simulation method for semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To facilitate parameter matching in semiconductor simulation. SOLUTION: This simulator for semiconductor device comprises means 3 for calculating required characteristics by solving a specified physical equation, while varying specified parameters for estimating dependencies on the characteristics of a semiconductor, and means 8 for controlling parameters being delivered to the means 3 with regard to the dependencies such that the results of analysis approach actual measurements. The parameter control means 8 comprises means 10 for comparing the results of analysis with actual measurements, means 11 for selecting parameters to be varied, based on the comparison results and estimating the direction and amount of variation, means 12 for altering the parameters depending on the results of estimation, and means 9 for storing a correlation data between the parameters and the specific characteristics.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an apparatus and a method for simulating a semiconductor device which automatically determines the next parameter control guideline from the result of a process or device simulation.

[0002]

2. Description of the Related Art Conventionally, semiconductor manufacturing process simulation (process simulation) such as impurity simulation, and semiconductor device characteristic simulation (device simulation) using the result of process simulation have been conducted for manufacturing, trial production and development research of semiconductor devices. Widely used for such purposes. In these simulations, the behavior of complex phenomena, impurities, charges, etc. in the actual device is replaced with a model that can be analyzed, so that the simulation results are usually based on simulation results obtained under some optimized conditions. It is necessary to perform further tuning of parameters (tuning) so as to conform to the behavior of the actual device.

[0003]

Conventionally, when adjusting the parameters, an engineer or the like examines the simulation result, and then the measured value of the device (for example, C-
(V-characteristics, etc.), an appropriate parameter is selected and sequentially changed, so that an enormous amount of work is required. Therefore, it takes a considerable amount of time to tune only one characteristic of a device having a certain characteristic. In this case, the relationship between parameters and characteristics is predicted to some extent, and the time and labor required for development and trial production are required. The result is that the effect of introducing the simulation, such as reducing the noise, is halved.

In addition, the examination of simulation parameter values largely depends on the experience and accumulation up to that point.
It was very difficult for an inexperienced technician to find the optimum parameter value.

The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a simulation apparatus and a simulation method for a semiconductor device in which parameters can be easily adjusted in a semiconductor simulation.

[0006]

SUMMARY OF THE INVENTION In order to solve the above-mentioned problems of the prior art and achieve the above object, a semiconductor device simulation apparatus according to the present invention uses a parameter in a semiconductor process or device simulation. It was decided to automate the procedure for fitting the above so as to obtain correlation with the actual measurement value. That is, the simulation apparatus is a semiconductor apparatus simulation apparatus that estimates the dependence of a predetermined parameter on a predetermined characteristic of the semiconductor device, and solves a predetermined physical equation or characteristic equation while changing the predetermined parameter. Analysis means for calculating the predetermined characteristic, and a parameter control means for controlling the parameters involved in the dependency and output to the analysis means, so that the analysis result approaches an actually measured value, I do.

Specifically, the configuration of the parameter control means for adjusting the parameters is, for example,
A comparison means for comparing the result from the analysis means with that at the time of actual measurement, a control amount determination means for estimating a parameter to be changed, a direction and an amount of the change, and a control amount based on the comparison result from the comparison means. Parameter changing means for changing a parameter input to the analyzing means according to the estimation result of the determining means. Further, it is preferable that the parameters are adjusted based on rules (for example, correlation data between parameters and characteristics) held in the apparatus. That is, the parameter control means in this case further comprises storage means for storing correlation data indicating a correlation between the parameter output to the control means and the predetermined characteristic, and the control amount determination means Another feature is that the estimation is performed for the parameter to be changed while referring to the correlation data in the storage means.

In the semiconductor device simulation apparatus of the present invention configured as described above, if correlation data such as parameters and characteristic values and measured values are given to this apparatus in advance,
The device repeats the simulation while appropriately selecting and changing the parameters. Therefore, only by setting the initial parameters and starting the apparatus, it is possible to automatically obtain the optimal parameters so that the solution closest to the actually measured value is finally obtained under the given conditions. .

The semiconductor device simulation method of the present invention is a semiconductor device simulation method for estimating the dependency of a predetermined parameter on a predetermined characteristic of the semiconductor device, wherein the predetermined parameter is changed while changing the predetermined parameter. After solving the physical equation or the characteristic equation to calculate the predetermined characteristic, the calculation result is compared with the actual measurement value, and the calculation result is actually measured for the parameter involved in the dependence and used for the characteristic calculation. Estimate the direction and amount of parameter selection and change so as to approach the value based on the result of the comparison, change the parameter used for the characteristic calculation according to the estimation result, and calculate the predetermined characteristic. Repeating the comparison, the estimation and the change until the result of the calculation approaches the measured value by a certain value or more. And butterflies.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A semiconductor device simulation apparatus and a simulation method according to the present invention will be described below in detail with reference to the drawings. The simulation apparatus relating to the present semiconductor may be a so-called process simulation apparatus, but here, a device simulation apparatus will be described as an example. FIG. 1 is a block diagram showing a schematic configuration of a simulation device of the present invention. The simulation apparatus 1 includes a preprocessor 2 that roughly performs transistor modeling and preprocessing such as processing of various data, a main processor 3 that obtains a solution by taking a predetermined basic equation,
It is composed of a post-processor 4 which converts the result of (1) into a form suitable for a predetermined output format and outputs the result, and an input / output device (not shown). In addition, the process simulator 5
It is connected to the preprocessor 2 online or offline.

The process simulator 5 is various simulators under predetermined manufacturing conditions in a semiconductor wafer process, and includes, for example, a shape simulator for a resist or a silicon oxide film, an impurity simulator for estimating an impurity distribution introduced into a semiconductor substrate, and the like. is there. An input unit 6 for inputting various parameters and temporarily storing them in the preprocessor 2.
And a condition setting unit 7 for performing modeling and setting conditions such as boundary conditions and bias. In the present invention,
As means for automatically performing parameter tuning (tuning) in the preprocessor 2, a parameter control means 8 and a database 9 in which measured data and a characteristic correlation table are stored are newly provided. The parameter control means 8 comprises a comparison means 10 and a control amount determination means 11
And parameter changing means 12. The functions and operations of these units will be described in the following simulation method.

Next, the simulation method of the present invention will be described in detail by taking the case where the simulation apparatus 1 is used as an example. In general, a semiconductor device simulation method calculates various characteristics (eg, gate threshold voltage Vth, transconductance gm, etc.) and physical quantities (mobility μ, electric potential, electric field intensity, etc.) of a semiconductor device using the results of a process simulator. It is for predicting the relationship between the process conditions and the device structure and device characteristics. The present invention is basically not limited to the characteristics and physical quantities to be sought and types of parameters used,
Here, as a specific example, a case where the reverse short channel effect is predicted from the dependence of the gate threshold voltage Vth on the gate length Lg will be described.

FIG. 2 shows an N-channel MOSFET (NMOS) having an LDD structure to be simulated in this embodiment.
FIG. 2 is a schematic cross-sectional view of the FET. In FIG. 2, reference numeral 20 is a semiconductor substrate, 21 and 22 are source regions and drain regions into which N-type impurities are introduced at high concentrations, 23 is a channel forming region, 24 is a gate insulating film, 25 is a gate electrode, and 26 is L in which N-type impurities are introduced in a relatively low concentration
A DD (Lightly Doped Drain) region, 28 is a side wall spacer, S is a source electrode terminal, D is a drain electrode terminal, and G is a gate electrode terminal. Note that this NMOSF
The following description will be made using ET as an example, but P channel MO
The same applies to SFET (PMOSFET) by reversing all conductivity types.

In the process of manufacturing the NMOSFET having such a structure, the source and drain regions 21, 22 or LD
At the time of ion implantation for introducing an N-type impurity for the purpose of forming the D region 26, a point defect (for example,
Vacancies and interrupt defects of the substrate atoms are introduced and diffused into the P-type impurity region (channel formation region 23) already introduced in the thermal process, so that the P-type impurity causes rearrangement. The current mainstream concept is that the rearrangement of the impurities does not uniformly change the channel formation region 23, or that the reverse short channel effect is caused by a kind of channel modulation. The prediction of the inverse short channel effect in this simulation is based on this idea.

FIG. 3 is a flow chart showing the overall flow of the simulation method of the present invention. First, in step ST0, impurity distribution data is created by the process simulator 5 of FIG. More specifically, the P-type impurity concentration which is introduced into the semiconductor substrate 20 shown in FIG. The relationship between the position and the concentration of N-type impurities is obtained,
The impurity distribution is parameterized and output.

When the device simulation is started, parameters are input to the input unit 6 of the preprocessor 2 and temporarily stored in step ST1. This parameter includes, in addition to the above-described impurity distribution parameter, the impurity rearrangement distribution parameter that causes the above-mentioned reverse short channel effect, the MOSFET structural parameter, and the like.

In step ST2, in the condition setting unit 7, modeling such as discretization of analysis points and setting of boundary conditions, bias conditions and the like are performed in accordance with the ordinary parameters based on the input parameters. At the same time, the initial distribution (initial parameter) of the impurity distribution is set.

FIG. 4 is a graph schematically showing the impurity concentration after the initial distribution is set. This FIG. 4 corresponds to FIG.
The horizontal axis represents the distance x along the line II, and the vertical axis represents the impurity concentration N.
Is a logarithmic scale. 4, reference numeral 30 denotes an N-type impurity concentration distribution in the source or drain regions 21 and 22 and the LDD region 26, and 31 denotes a channel forming region 2.
3 is a P-type impurity concentration distribution centered at 3. An inflection point 30a of the N-type impurity concentration distribution 30 indicates a boundary point between the source or drain regions 21 and 22 and the LDD region 26. The protruding portions 31a of the P-type impurity concentration distribution 31 on both sides in the channel forming region 23 are portions added to reflect the rearrangement of the impurity that causes the reverse short channel effect, and are caused by the diffusion of point defects. It shows the pile-up of P-type impurities to the location. Hereinafter, this protrusion is referred to as a rearrangement distribution. Symbols a to e indicate parameters, and specifically, a is the rearrangement distribution 31
a is the width in the horizontal direction to the substrate, b is the P of the rearrangement distribution 31a.
Height from the type impurity concentration distribution 31, that is, the concentration increase width by rearrangement, c is the distance between the rearrangement distribution 31a and the source or drain regions 21 and 22, d is the distance between the source region 21 and the drain region 22, and e Indicates the concentration of the P-type impurity concentration distribution 31.

Subsequently, in steps ST3 to ST5, numerical calculation is executed in the main processor 3 of FIG. 1 by using a method similar to that of a normal device simulator. That is, basic equations (physical equations) such as Poisson's equation and current continuity equation are standardized (step ST3), and after initial value setting (step ST4), numerical calculation is performed for each discrete point (step ST).
5). In this numerical calculation, a solution of the characteristic equation is finally obtained by using intermediate variables (for example, mobility and electric field strength) obtained from the basic equation. In the present embodiment, an equation of the gate threshold voltage Vth having the gate length Lg as a parameter is required as a characteristic equation. Further, an equation for calculating a physical quantity related to this characteristic equation, for example, a work function or a gate capacitance, using the structural parameter is also required.

In the next step ST6, the comparing means 10 in the preprocessor 2 compares the calculated value with the actually measured value and determines whether or not the correlation is obtained.
That is, first, the actual measurement value data in the database 9 is read, and the calculation result (simulation result) in step ST5 is compared with the read actual measurement value data.

FIG. 5 is a graph showing the dependence of the gate threshold voltage Vth on the gate length Lg, which schematically shows the relationship between the simulation result and the actually measured data. In FIG. 5, reference numeral 40 indicates a simulation result, and 41 indicates actual measurement value data. From FIG. 5, the first simulation result 40
Is that the overall value of the gate threshold voltage Vth is too low,
As shown by the measured value 41, it is found that the tendency of the inverse short channel effect (region 1 and region 2) in which the threshold voltage Vth temporarily increases as the gate length Lg becomes shorter is not well reflected in the simulation. Therefore, it is determined that the correlation has not been obtained (NG), and the flow proceeds to step ST7.
Proceed to.

In step ST7, the control amount determining means 11 in FIG. 1 selects a parameter to be changed for obtaining a correlation, and estimates the direction and amount of the change.
At the time of this estimation, the control amount determination means 11 appropriately refers to the characteristic correlation table in the database 9 and, if necessary, the parameters input to the input section 6 and the re-creation generated by the condition setting means 7. The data of the arrangement distribution 31a is referred to.

FIG. 6 is a diagram schematically showing an example of the characteristic correlation data in the database 9. This characteristic correlation data 50
Is configured so that its contents can be added or modified later. In the first layer 51, transistor characteristics that can be analyzed by the simulation model are listed. Then, for each of the characteristic items, the parameters involved, the control direction and the quantity are stored in the second hierarchy 5
It is stored separately in the second, third hierarchy 53 and fourth hierarchy 54. The relationship between the impurity distribution parameters a to e and other parameters is shown in the second hierarchy 52 of the illustrated characteristic correlation data. Here, f (x) is a predetermined function,
Each of A to G is each process or device parameter having the contents described in FIG. The third layer 53 shows the reverse short channel effect and the changing direction of the parameter for controlling Vth, and the following fourth layer 54 shows the amount of change of the parameter, although not shown in detail. It is shown.

In this embodiment, the control amount determining means 11 is
The impurity distribution is adjusted while referring to such characteristic correlation data 50, and parameters are adjusted so as to reflect the inverse short channel effect. Here, the parameters are adjusted by setting the size and position of the rearrangement distribution 31a in FIG. 4 (the description is omitted here, but the distribution shape is also possible). Decide so that the channel effect is accurately reflected, and adjust the other parameters.

In the case of FIG. 5, the simulation result 40
Is smaller than the measured value 41, the gate threshold voltage Vth
It is necessary to estimate the parameters of the simulation so that is large. For example, the third hierarchy 53 in FIG.
As shown in FIG. 5, in order to increase Vth in the regions 1 and 2 in FIG. 5, the concentration e of the P-type impurity concentration distribution 31 is increased by the amount of change indicated by the fourth hierarchy 54, or the source region 21 and the drain region It is good to make distance d between 22 large. In order to increase Vth in the region 2, it is preferable to increase the width a of the rearrangement distribution. Note that other device characteristics and the like are also taken into consideration when adjusting the parameters. For example, if the amount of change in a parameter that greatly affects other device characteristics, etc. is suppressed and the amount of change in another parameter is increased, and if the characteristics and the inverse short channel effect still do not reach the target values at the same time, Control is performed to find the optimum point between the two.

In the next step ST8, various parameters temporarily stored in the input unit 6 or the parameters a and b of the rearrangement distribution 31a set by the condition setting means 7 are determined based on the result of the step ST7. Change and the flow is returned before step ST5. Then, recalculation (ST5) using the changed parameters is performed, and the direction and amount of parameter control are determined (ST7).
Parameter change (ST8) and recalculation (ST5)
The process is repeated until it is determined in step ST6 that the correlation between the calculated value and the actual measurement is good. Thereafter, when the calculation result data is output in a predetermined format by the post processor 4 (step ST9), the simulation ends.

The simulation method and the simulation apparatus according to the present embodiment select an appropriate parameter by referring to a rule (contents of a characteristic correlation table) in a direction in which the measured value and the simulation are made to coincide with each other by comparing the simulation with the simulation. Further, the simulation, in which the simulation is performed by appropriately changing the parameter values, and the simulation result is further compared with the actual measurement value, can be efficiently and automatically performed until the actual measurement value and the simulation result match. Also, by adding a rule for transistor characteristics to the characteristic correlation table later, it is possible to deal with a detailed phenomenon of an actual device or a new transistor characteristic, thereby improving the efficiency of condition determination. As described above, even an inexperienced technician who does not have knowledge of the semiconductor device, the process simulator, the parameters, and the like can easily perform the device parameter matching operation.

[0028]

As described above, according to the present invention, it is possible to provide a simulation apparatus and a simulation method for a semiconductor device in which parameters can be easily adjusted in a semiconductor simulation.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a schematic configuration of a simulation apparatus of the present invention.

FIG. 2 shows an LDD for performing a simulation in the present embodiment.
It is a schematic sectional drawing of the N channel MOSFET (NMOS) of a structure.

FIG. 3 is a flowchart showing the overall flow of the simulation method of the present invention.

FIG. 4 is a graph schematically showing an impurity concentration after setting an initial distribution (step ST2) in FIG. 3, in which a horizontal axis indicates a distance x along a line II-II in FIG. 2, and a vertical axis indicates an impurity concentration. It is taken on a logarithmic scale of N.

FIG. 5 is a graph schematically showing a gate length Lg dependency of a gate threshold voltage Vth, schematically showing a relationship between a simulation result and measured data.

FIG. 6 is a diagram schematically showing an example of characteristic correlation data in a database.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Simulation apparatus, 2 ... Preprocessor, 3 ...
Main processor, 4 post processor, 5 process simulator (parameter generating means), 6 input unit,
7 ... Condition setting means, 8 ... Parameter control means, 9 ... Database (storage means), 10 ... Comparison means, 11 ... Control amount determination means, 12 ... Parameter changing means, 20 ... Semiconductor substrate, 21 ... Source region, 22 ... Drain region, 23 channel formation region, 24 gate insulating film, 25 gate electrode, 26 LDD region, 27 sidewall spacer, 30 N-type impurity distribution, 30a inflection point at source or drain region end, 31 ... P-type impurity distribution, 31a ...
Rearrangement distribution, 40: simulation result, 41: measured value, 50: characteristic correlation data, 51 to 54: hierarchy of characteristic correlation data, S: source electrode terminal, G: gate electrode terminal,
D ... Drain electrode terminal.

Claims (4)

[Claims] 1. A semiconductor device simulation apparatus for estimating dependence of a predetermined parameter on a predetermined characteristic of a semiconductor device, wherein a predetermined physical equation or characteristic equation is solved while changing the predetermined parameter, An analysis means for calculating a predetermined characteristic; comparing the analysis result of the analysis means with an actually measured value; controlling parameters related to the dependency and output to the analysis means so that the analysis result approaches the actually measured value; And a parameter control means for controlling the semiconductor device. 2. The parameter control means, comparing means for comparing the result from the analyzing means with that at the time of actual measurement, and based on the comparison result from the comparing means, selecting the parameter to be changed and the changing direction thereof. The simulation apparatus for a semiconductor device according to claim 1, further comprising: a control amount determining unit that estimates the amount, and a parameter changing unit that changes a parameter input to the analyzing unit according to an estimation result of the control amount determining unit. . 3. The parameter control means further comprises a storage means for storing correlation data indicating a correlation between the parameter output to the analysis means and the predetermined characteristic, and the control amount determination 3. The semiconductor device simulation apparatus according to claim 2, wherein the means estimates the parameter to be changed with reference to the correlation data in the storage means. 4. A semiconductor device simulation method for estimating the dependence of a predetermined parameter on a predetermined characteristic of a semiconductor device, the method comprising solving a predetermined physical equation or characteristic equation while changing the predetermined parameter. After calculating the predetermined characteristic, the calculation result is compared with an actually measured value, and a parameter related to the dependency and provided for the characteristic calculation is selected such that the result of the calculation approaches the actually measured value. And the direction and amount of change and estimation based on the result of the comparison, changing the parameters used for the characteristic calculation according to the estimation result, the calculation of the predetermined characteristic,
A method for simulating a semiconductor device, wherein the comparison, the estimation, and the change are repeated until the result of the calculation approaches the measured value by a certain value or more.