JPH09106416A - Circuit simulation method for semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To facilitate the Tox dependency analyzation of a circuit characteristic by providing gate insulated film thickness (Tox) dependency to each model without damaging the features of various models VTH beginning from BSIM 1 to 3. SOLUTION: An expression is used as the model VTH. This expression provides Tox dependency to each item of K1 , K2 and η in the expression without damaging the basic feature of BSIM 1 at all. K1 ', K2 ' and η' in the expression are constant parameters equivalent to K1 /Tox, K2 /Tox, η/Kox, respectively.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a computer simulation method for semiconductor integrated circuit analysis, and more particularly to an analog circuit simulation method.

[0002]

2. Description of the Related Art In a circuit simulation method, when a circuit connection is represented by a netlist and a bias condition or a command to be analyzed is given, a contact equation of the circuit is established and a matrix operation is performed to obtain a voltage value and a current value of each node. , Outputs the result. As a circuit simulation program, SPIC developed by UCB (University of California, Berkeley) and the source code is open to the public.
E (Simulation Program with Integrated Circuit Emph
asis) is widely used.

As the MOSFET model, that is, the current source model, various models have been devised with the progress of the MOSFET process technology, but the Level 1, Level 2 and Level 3 models which were also developed by UCB and incorporated in SPICE. , BSIM1 model, BSIM2 model and BSIM3 model are known. The following documents are related to the threshold voltage modeling of the BSIM1 to 3 models.

BSIM1: BJ Shew, et al., "BSIM: Berk
eley Short-Channel IGFET Model for MOS Transistor
s ", IEEE J. of Solid-State Circuit, vol. SC-22, n
o.4, Aug. 1987 BSIM2: JS Duster, et al., "User's Guide for the
BSIM2 "BSIM3: ZH Liu, et al.," Threshold Voltage Model
forDeep-Submicrometer MOSFETs ", IEEE Tras. on Ele
ctron Devices, vol, 40, no.1, Jan. 1993

In recent years, MOSFE which constitutes an integrated circuit
Under the demand for miniaturization of T, the so-called deep sub-micron generation is about to be entered, and higher integration and higher performance of integrated circuits are being further promoted. With the increase in circuit scale, circuit design and analysis can no longer be done without using an electronic computer. Computer simulations for analog circuit analysis have excellent programs represented by SPICE, and are effective in analyzing large-scale analog integrated circuits.

The MOSFET model in SPICE influences the analysis accuracy using SPICE, and various models have been devised with the progress of MOSFET process technology. Above all, Level 1 which is basic modeling, Level of physical modeling
2. Level 3 of quasi-empirical modeling, and BSIM1 of quasi-empirical modeling in which a large number of empirical parameters are introduced to express finer MOSFET characteristics.
Further, BSIM2 of its development type, and further, BSIM3 model in which various physical phenomena associated with miniaturization are physically modeled and the correspondence up to the deep submicron generation is considered are widely known. BSIM1 to BSIM3 are expected as models that can analyze the characteristics of fine MOSFETs in the half micron generation and beyond.

A model of the threshold voltage V _TH in the MOSFET model will be introduced below. First, regarding the BSIM1 model, the flat band voltage V _FB , the surface inversion potential φ _S (= 2φ _F : twice the Fermi potential), the substrate effect coefficient K ₁ , the substrate bias V _BS , the source / drain depletion charge division coefficient are set. Modeling as in the following equation (1) is performed using K ₂ , the drain-induced barrier lowering effect coefficient η, and the drain voltage V _DS . In addition, regarding BSIM2, V
_{The TH} model is the same as BSIM1.

(Equation 1)

Further, regarding BSIM3, a non-uniform doping effect-related coefficient K _{1 of} substrate impurities in the substrate depth direction is obtained.
And K ₂ , the non-uniform doping effect-related coefficient Nlx in the substrate channel direction, the narrow channel coefficient K ₃ related to the narrow channel effect, the narrow channel parameter W ₀ , and the term ΔV _TH that semi-empirically expresses the short channel effect. , The following equation (2)
Is modeled like. In the formula, V _THL
Is V _TH , Tox for large channel length and channel width
Is the gate oxide film thickness, Leff is the effective channel length, and Weff is the effective channel width.

(Equation 2)

[0009]

[Problems to be Solved by the Invention] V _{TH of} BSIM1 to 3
The model has the possibility to correspond to the sub-micron to deep sub-micron generation in terms of accuracy through quasi-empirical modeling or detailed physical modeling, but it is easy to use from equations (1) and (2). As you can see
On the surface, Tox dependency of V _TH is not expressed.

Therefore, in analyzing the Tox dependence of the circuit characteristics, as shown in FIG. 1A, if the simulation is performed by simply changing Tox, the Tox dependence is not reflected correctly. Lead to accurate results. Therefore, as shown in FIG. 1B, it is necessary to perform simulation after changing other parameters such as K ₁ , K ₂ and η on the simulation user side along with the change of Tox.

This problem will be described more concretely by taking the formula (1) as an example. The following formula (3) shows a V _TH model (the above-mentioned Level 1 model) in a MOSFET having a widely known long channel.

(Equation 3)

The term γ in equation (3) is the voltage required to cancel the depletion layer charge, and the substrate effect coefficient γ is the substrate impurity concentration N _A , the relative permittivity ε _{S of} the semiconductor, and the permittivity ε in vacuum.
_{If O} and the gate insulating film capacitance Cox are used, (2ε _S ε _O qN
_It is expressed as _A ) ^1/2 / Cox. Where Cox = ε _OX ε _O / Tox
(Ε _OX is the relative dielectric constant of the gate insulating film). Since the terms K ₁ , K ₂ , and η in the equation (1) are corrected so that the term γ in the equation (3) corresponds to the short channel MOSFET, it is considered to have Tox dependency. Good. At least K ₁ is γ itself and contains Tox. However, since the parameters K ₁ , K ₂ , and η are constants that give values on the user side, the terms of K ₁ , K ₂ , and η cannot reproduce the Tox dependence. Therefore, for example, when investigating the influence of Tox variation on circuit characteristics by circuit simulation, K ₁ , K ₂ , and η need to be changed in proportion to Tox, which is complicated.
Moreover, when the MOSFET model is grasped as a black box and used by an end user who sees only superficial parameters such as Tox, V _TH , and gate length related parameters, the analysis tends to be performed without noticing such a problem. Therefore, there is a risk of lowering the analysis accuracy.

Various models improved or developed based on the MOSFET model have been proposed by each simulation vendor. For example, the circuit simulator HSPICE of Meta-Software Co. has a Level 28 model developed based on BSIM1. Has improved the accuracy considerably (Meta-Software, "HSPICE User's Manual", vo
l. 2, P.7-105) is not improved with respect to Tox dependence in the V _TH model described above.

The present invention has been made in consideration of the above-mentioned circumstances.
In various V _TH models including M1 to 3, each model has Tox dependency without impairing its characteristics,
It is an object of the present invention to provide a simulation method capable of easily performing Tox dependency analysis of circuit characteristics.

[0015]

The present invention is a circuit simulation method for calculating a threshold voltage of a MOSFET by using a model formula, and the model formula is for nonuniform substrate impurities in the substrate depth direction and the substrate channel direction. The doping effect is expressed by a plurality of terms including the substrate bias V _BS , and each of the plurality of terms is the gate insulating film thickness T _OX.
Alternatively, the gate insulating film capacitance C _OX is included as a parameter. The model formula further expresses the drain-induced barrier lowering effect by a term including the drain bias, and the term preferably includes the gate insulating film thickness T _OX or the gate insulating film capacitance C _OX as a parameter.

[0016]

BEST MODE FOR CARRYING OUT THE INVENTION An example of a concrete model is BSI.
MO based on M1 or BSIM2 model
A SFET model, in the first substrate bias term should include the substrate effect coefficient K _1, comprises a K ₁ ', which corresponds to K ₁ / on behalf of K ₁ as a coefficient (the thickness of the gate insulating film T _OX), the parameters In the second substrate bias term which should include the gate insulating film thickness T _OX as the above, and should include the source / drain depletion layer charge division coefficient K ₂ , K ₂ / (gate insulating film thickness T _OX ) instead of K ₂ as the coefficient. Including K ₂ 'corresponding to
In the drain bias term that should include the gate insulating film thickness T _OX as a parameter and the drain induction barrier lowering effect coefficient η, η ′ corresponding to η / (gate insulating film thickness T _OX ) instead of η as a coefficient. And the gate insulating film thickness T _OX is included as a parameter.

Another example of a specific model is a MOSFET model based on the BSIM3 model, which has three substrate bias terms that should include a substrate effect coefficient K ₁ or a source / drain depletion layer charge division coefficient K _2. in, K ₁ corresponding to K ₁ / on behalf of K ₁ as a coefficient (the thickness of the gate insulating film T _OX) ', K ₂ / on behalf of K ₂ K ₂ corresponding to the (gate insulating film thickness T _OX)' And the gate insulating film thickness T _OX is included as a parameter.

Since Cox = ε _OX ε _O / Tox, it goes without saying that the same effect can be obtained by including 1 / Cox in each term instead of Tox. In that case, the constant parameter _{K 1 ', K 2',} ' instead of, K ₁ corresponding to K ₁ × (gate insulating film capacitance C _OX)' η ', the K ₂ × (gate insulating film capacitance C _OX) Corresponding K ₂ ″, η ″ corresponding to η × (gate insulating film capacitance C _OX ) is used as a constant parameter.

[0019]

EXAMPLE The following equation (4) is for explaining the first example, and is a V _TH model obtained by improving the equation (1).

(Equation 4)

This equation (4) does not impair the basic characteristics of BSIM1 at all, and K ₁ , K ₂ ,
Each item of η has Tox dependency. K ₁ 'in the formula,
K ₂ 'and η' are K ₁ / Tox, K ₂ / Tox, η / Ko, respectively.
Although it is a constant parameter corresponding to x, Tox is a constant and therefore does not hinder parameter extraction or optimization, and it goes without saying that the conventional method can be used. Further, by performing the same modeling also with respect to V _TH model in BSIM2, it can impart a Tox dependent on V _TH.

The following expression (5) is for explaining the second embodiment of the present invention, and is a V _TH model obtained by improving the expression (2).

(Equation 5)

This equation (5) does not impair the basic characteristics of BSIM3 at all, and makes each term of K ₁ and K ₂ in equation (2) have Tox dependency. K ₁ ', K ₂ ' in the formula
Are constant parameters corresponding to K ₁ / Tox and K ₂ / Tox, respectively. Since Tox is a constant, it does not hinder parameter extraction or optimization and can be performed by a conventional method.

In the equations (4) and (5), 1 / Cox may be included in each term instead of Tox. In that case, constant parameters K ₁ ', K ₂ ' and η 'are replaced by K ₁ x C _OX
Equivalent to K ₁ ″, K ₂ × C _OX equivalent K ₂ ″, η × C
Η ″ corresponding to _OX is used as a constant parameter.

[0024]

INDUSTRIAL APPLICABILITY The present invention describes the Tox or Cox dependency which is not considered in the superficial model formula in the V _TH model and the like, and describes Tox or Cox in each predetermined term in the V _TH model. It is possible to eliminate the complexity of considering parameters other than Tox and Cox, which is required when performing simulation analysis of Tox dependency and Cox dependency of circuit characteristics. As a result, as shown in FIG. 2, even if Tox or Cox is changed, the simulation can be executed as it is without changing the K ₁ , K ₂ , and η by the user, and a correct result can be obtained. V _TH such as BSIM1 to 3
By applying it to the models, the Tox dependence and the Cox dependence can be incorporated into the V _TH model formula without impairing the accuracy and features of those models, and the Tox dependence of the circuit characteristics can be easily and accurately obtained. Sex and Cox dependence can be analyzed.

[Brief description of the drawings]

FIG. 1 is a flowchart showing a procedure for changing Tox in a conventional method, in which (A) shows a case where a correct result cannot be obtained and (B) shows a case where a correct result is obtained.

FIG. 2 is a flowchart showing a procedure for changing Tox in the present invention.

Claims (6)

[Claims] 1. A circuit simulation method for calculating a threshold voltage of a MOSFET using a model formula, wherein the model formula represents a non-uniform doping effect of a substrate impurity in a substrate depth direction and a substrate channel direction by a substrate bias V _BS . The circuit simulation method is represented by a plurality of terms including, and each of the plurality of terms includes a gate insulating film thickness T _OX or a gate insulating film capacitance C _OX as a parameter. 2. The drain induction barrier lowering effect is expressed by a term including a drain bias, and the term includes the gate insulating film thickness T _OX or the gate insulating film capacitance C _OX as a parameter. The described circuit simulation method. 3. The model is a BSIM1 model or a BS
This is a MOSFET model based on the IM2 model, and in the first substrate bias term that should include the substrate effect coefficient K ₁ , it corresponds to K ₁ / (gate insulating film thickness T _OX ) instead of K ₁ as a coefficient. include K ₁ 'to include the gate insulating film thickness T _OX as a parameter, in the second substrate bias term should include source and drain depletion charge division factor K _2, K instead as coefficient K _{2 2} / In the drain bias term that includes K ₂ 'corresponding to (gate insulating film thickness T _OX ), includes the gate insulating film thickness T _OX as a parameter, and includes the drain induction barrier lowering effect coefficient η, Η instead
2. The method includes _{η'corresponding to} / (gate insulating film thickness T _OX ) and including the gate insulating film thickness T _OX as a parameter.
Alternatively, the circuit simulation method according to item 2. 4. The model is a BSIM1 model or a BS.
The MOSFET model is based on the IM2 model, and in the first substrate bias term that should include the substrate effect coefficient K ₁ , it corresponds to K ₁ × (gate insulating film capacitance C _OX ) instead of K ₁ as a coefficient. include K ₁ '' which comprises a gate insulating film capacitance C _OX as a parameter, in the second substrate bias term should include source and drain depletion charge division factor K _2, K instead as coefficient K _{2 2} In the drain bias term that includes K ₂ ″ corresponding to × (gate insulating film capacitance C _OX ), includes the gate insulating film capacitance C _OX as a parameter, and includes the drain induction barrier lowering effect coefficient η, as a coefficient. η instead of η
3. The circuit simulation method according to claim 1, wherein η ″ corresponding to × (gate insulating film capacitance C _OX ) is included, and the gate insulating film capacitance C _OX is included as a parameter. 5. The model is a MOSFET model based on the BSIM3 model, and in three substrate bias terms that should include a substrate effect coefficient K ₁ or a source / drain depletion layer charge splitting coefficient K ₂ .
Instead of K ₁ as a coefficient, K ₁ / (gate insulating film thickness T _OX )
The corresponding K ₁ includes a ', instead of the K ₂ K ₂ corresponding to the K ₂ / (gate insulating film thickness T _OX)', the gate insulating film thickness T _OX to claim 1 or 2 containing as a parameter The described circuit simulation method. 6. The model is a MOSFET model based on the BSIM3 model, and in three substrate bias terms that should include a substrate effect coefficient K ₁ or a source / drain depletion layer charge splitting coefficient K ₂ .
K ₁ instead of a coefficient K ₁ corresponding to K ₁ × (gate insulating film capacitance C _OX) 'a'', K ₂ in place of K ₂ corresponding to the K ₂ × (gate insulating film capacitance C _OX)' 3. The circuit simulation method according to claim 1, wherein the circuit simulation method includes a gate insulating film capacitance C _OX as a parameter.