JPH10189807A - Structure for connecting terminal of module - Google Patents
Structure for connecting terminal of moduleInfo
- Publication number
- JPH10189807A JPH10189807A JP8342165A JP34216596A JPH10189807A JP H10189807 A JPH10189807 A JP H10189807A JP 8342165 A JP8342165 A JP 8342165A JP 34216596 A JP34216596 A JP 34216596A JP H10189807 A JPH10189807 A JP H10189807A
- Authority
- JP
- Japan
- Prior art keywords
- connection terminal
- module
- group
- connection
- circuit board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3421—Leaded components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/36—Assembling printed circuits with other printed circuits
- H05K3/368—Assembling printed circuits with other printed circuits parallel to each other
Landscapes
- Wire Bonding (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、モジュールの接続
端子構造に関するものである。The present invention relates to a connection terminal structure for a module.
【０００２】[0002]
【従来の技術】従来のＩＣパッケージ構造として、ＰＧ
Ａ（Ｐｉｎ Ｇｒｉｄ Ａｒｒａｙ）パッケージ、ＱＦ
Ｐ（Ｑｕａｄｒｕｐｌｅ Ｆｌａｔ Ｐａｃｋａｇ
ｅ）、ＢＧＡ（Ｂａｌｌ Ｇｒｉｄ Ａｒｒａｙ）パッ
ケージが広く知られている。図５は従来のマルチチップ
・モジュール（以下、単にモジュールという）におい
て、一般に使用されているモジュールの接続構造を示す
図であり、これはセラミックのＱＦＰを用いた例であ
る。2. Description of the Related Art As a conventional IC package structure, PG
A (Pin Grid Array) package, QF
P (Quadruple Flat Package)
e), BGA (Ball Grid Array) package is widely known. FIG. 5 is a diagram showing a connection structure of a module generally used in a conventional multichip module (hereinafter, simply referred to as a module), which is an example using a ceramic QFP.
【０００３】図５に示すように、多層配線基板１０１の
上にＬＳＩベアチップ１０２が搭載され、ＬＳＩベアチ
ップ１０２と多層配線基板１０１間はワイヤ１０３で接
続されて、金属またはセラミック等の蓋１０４を用いて
封止されている。当該モジュールに供給される信号、電
源（ＰＯＷ）およびグランド電位（ＧＮＤ）は、入出力
端子（Ｉ／Ｏ端子ともいう）１０５から多層配線基板１
０１内に供給されている。As shown in FIG. 5, an LSI bare chip 102 is mounted on a multilayer wiring board 101, the LSI bare chip 102 and the multilayer wiring board 101 are connected by wires 103, and a cover 104 made of metal or ceramic is used. And sealed. A signal, a power supply (POW), and a ground potential (GND) supplied to the module are transmitted from an input / output terminal (I / O terminal) 105 to the multilayer wiring board 1.
01.
【０００４】近年のモジュールにおいては、システム性
能上からの高機能化および高速化が要求され、これに伴
いモジュールには多くの信号端子、ＰＯＷ端子およびグ
ランドＧＮＤ端子が必要になり、この解決策の一つとし
て、端子間の間隙を狭くして、パッケージや基板サイズ
の増加を抑える方法がとられている。In recent modules, higher performance and higher speed are required from the viewpoint of system performance, and accordingly, the module requires many signal terminals, POW terminals, and ground GND terminals. As one of the methods, a method of narrowing a gap between terminals to suppress an increase in the size of a package or a substrate has been adopted.
【０００５】[0005]
【発明が解決しようとする課題】しかしながら、上記し
た従来のいずれの構造（ＰＧＡ、ＱＦＰ、ＢＧＡ構造）
においても、Ｉ／Ｏ端子のピッチを狭くすることによ
り、マザーボード上の配線が困難になったり、モジュー
ルのＩ／Ｏ端子とマザーボードとの接続が難しくなり、
接続の信頼性を損なう恐れがある。However, any of the above conventional structures (PGA, QFP, BGA structures)
Also, by narrowing the pitch of the I / O terminals, wiring on the motherboard becomes difficult, and connection between the I / O terminals of the module and the motherboard becomes difficult,
The reliability of the connection may be impaired.
【０００６】一方、上述の接続が容易なように適当な端
子間隙を保とうとすると、モジュールの基板サイズが大
きくなるという問題があった。そこで、本発明は、以上
述べたような問題点を解決し、基板サイズを増加させる
ことなく、多ピン化の要求を満足させるモジュールの接
続端子構造を提供することを目的とする。On the other hand, if an appropriate terminal gap is to be maintained so that the above-mentioned connection is easy, there is a problem that the size of the module substrate is increased. Accordingly, it is an object of the present invention to solve the above-described problems and to provide a connection terminal structure of a module that satisfies the demand for increasing the number of pins without increasing the board size.
【０００７】[0007]
【課題を解決するための手段】本発明は、上記目的を達
成するために、 （１）多ピンのモジュールの接続端子構造において、配
線基板外周に配置された第１の接続端子群と、前記配線
基板上のマザーボードとの接続側に形成された所定の高
さを有する端子配線部に第２の接続端子群とを設けるよ
うにしたものである。In order to achieve the above object, the present invention provides: (1) a connection terminal structure for a multi-pin module, comprising: a first connection terminal group disposed on an outer periphery of a wiring board; The second connection terminal group is provided on a terminal wiring portion having a predetermined height formed on the connection side of the wiring board with the motherboard.
【０００８】このように、モジュールの接続端子は、多
層配線基板の周辺の第１の接続端子群と多層配線基板上
に形成した接続端子用パッド群（Ｇ）の両方を備えるこ
とから、端子数の増加に対しても多層配線基板サイズの
増加を抑えることができる。また、接続端子群（Ｐ）と
接続端子用パッド群（Ｇ）へ端子数の配分を考慮するこ
とにより、端子ピッチを緩和することができ、マザーボ
ードの設計基準の緩和やマザーボードとの接続の容易性
を得ることができる。As described above, the connection terminals of the module are provided with both the first connection terminal group around the multilayer wiring board and the connection terminal pad group (G) formed on the multilayer wiring board. , The increase in the size of the multilayer wiring board can be suppressed. Also, by considering the distribution of the number of terminals to the connection terminal group (P) and the connection terminal pad group (G), the terminal pitch can be relaxed, and the design standard of the motherboard can be relaxed and the connection with the motherboard can be facilitated. Sex can be obtained.
【０００９】（２）請求項１記載のモジュールの接続端
子構造において、前記第１の接続端子群のマザーボード
との接続に供する端子部の高さと前記第２の接続端子群
の端子部の高さを合わせるようにしたものである。した
がって、マザーボードへモジュールを搭載するだけで、
容易にマザーボードとの接続を行うことができる。(2) In the connection terminal structure of the module according to claim 1, the height of the terminal portion for connecting the first connection terminal group to the motherboard and the height of the terminal portion of the second connection terminal group. It is made to match. Therefore, just install the module on the motherboard,
Connection to the motherboard can be easily performed.
【００１０】（３）上記（１）又は（２）記載のモジュ
ールの接続端子構造において、前記第２の接続端子群の
一部にスリットを形成するようにしたものである。した
がって、接続端子用パッド群（Ｇ）の内側の残留ガスを
モジュールの外側へ放出することができ、マザーボード
との接続信頼性を高めることができる。(3) The connection terminal structure for a module according to the above (1) or (2), wherein a slit is formed in a part of the second connection terminal group. Therefore, the residual gas inside the connection terminal pad group (G) can be discharged to the outside of the module, and the connection reliability with the motherboard can be improved.
【００１１】[0011]
【発明の実施の形態】以下、本発明の実施の形態につい
て図面を参照して詳細に説明する。図１は本発明の第１
実施例を示すＭＣＭ（Ｍｕｌｔｉ Ｃｈｉｐ Ｍｏｄｕ
ｌｅ）の接続端子構造を示す断面図、図２はそのＭＣＭ
の接続端子構造を示す平面図である。Embodiments of the present invention will be described below in detail with reference to the drawings. FIG. 1 shows the first embodiment of the present invention.
MCM (Multi Chip Modu) showing an example
le) is a cross-sectional view showing the connection terminal structure, and FIG.
3 is a plan view showing the connection terminal structure of FIG.
【００１２】これらの図において、２０１は多層配線基
板、２０２はＬＳＩベアチップ、２０３はＬＳＩベアチ
ップ２０２と多層配線基板２０１を電気的に接続するワ
イヤ、２０４は封止用の蓋、２０５は多層配線基板の周
辺に配置された接続端子群（第１の接続端子群）（Ｐ）
（ｐｅｒｉｐｈｅｒａｌ）、２０６は接続端子群（Ｐ）
の接続パッド、２０７は多層配線基板上に配置した接続
端子用パッド群（第２の接続端子群）（Ｇ）（Ｇｒｉ
ｄ）である。In these figures, 201 is a multilayer wiring board, 202 is an LSI bare chip, 203 is a wire for electrically connecting the LSI bare chip 202 and the multilayer wiring board 201, 204 is a lid for sealing, and 205 is a multilayer wiring board Terminal group (first connection terminal group) arranged around (P)
(Peripheral), 206 is a connection terminal group (P)
207 denotes a connection terminal pad group (second connection terminal group) (G) (Gri)
d).
【００１３】多層配線基板２０１から引き出される接続
端子群（Ｐ）２０５は、一般的にニッケル・コバール等
の金属リードが用いられる。多層配線基板２０１上に配
置した接続端子用パッド群（Ｇ）２０７は、接続端子群
２０５の先端部２０５ａと同等の高さになるように、多
層配線基板２０１の端子配線部（接続端子群２０５間の
高さ調整用端子配線部）２０１ａの厚さを調整する。こ
の接続端子用パッド群２０７の電極部は、ハンダまたは
導電接着剤等で電気的に接合が可能な金属材料で形成さ
れているか、マザーボード３００にリフロー等で接合可
能な材料が施されている。As the connection terminal group (P) 205 pulled out from the multilayer wiring board 201, a metal lead such as nickel-kovar is generally used. The connection terminal pad group (G) 207 disposed on the multilayer wiring board 201 has a terminal wiring portion (the connection terminal group 205) of the multilayer wiring board 201 so as to have the same height as the tip portion 205a of the connection terminal group 205. The thickness of the inter-height adjusting terminal wiring section) 201a is adjusted. The electrode portion of the connection terminal pad group 207 is made of a metal material that can be electrically joined with solder or a conductive adhesive, or a material that can be joined to the motherboard 300 by reflow or the like.
【００１４】以上述べたように、第１実施例によれば、
モジュールの接続端子は、多層配線基板の周辺の接続端
子群（Ｐ）と、多層配線基板上に形成した接続端子用パ
ッド群（Ｇ）の両方を備えることから、端子数の増加に
対しても多層配線基板サイズの増加を抑えることができ
る。また、接続端子群（Ｐ）と接続端子用パッド群
（Ｇ）へ端子数の配分を考慮することにより、端子ピッ
チを緩和することができ、マザーボードの設計基準の緩
和やマザーボードとの接続の容易性を得ることができ
る。As described above, according to the first embodiment,
The connection terminals of the module include both the connection terminal group (P) around the multi-layer wiring board and the connection terminal pad group (G) formed on the multi-layer wiring board. An increase in the size of the multilayer wiring board can be suppressed. Also, by considering the distribution of the number of terminals to the connection terminal group (P) and the connection terminal pad group (G), the terminal pitch can be relaxed, and the design standard of the motherboard can be relaxed and the connection with the motherboard can be facilitated. Sex can be obtained.
【００１５】さらに、接続端子群（Ｐ）の先端部と接続
端子用パッド群（Ｇ）の高さを調整することにより、マ
ザーボード上に搭載された他の面実装部品類と一緒に一
括してリフローによる接続が可能となり、アセンブリコ
ストを従来のＱＦＰと同等に抑えることができる。な
お、上記第１実施例では、ＭＣＭ用モジュール基板を例
に取って説明したが、シングルチップ用のＬＳＩパッケ
ージの場合についても適用可能である。Further, by adjusting the height of the tip of the connection terminal group (P) and the height of the connection terminal pad group (G), they can be collectively collected together with other surface mount components mounted on the motherboard. Connection by reflow becomes possible, and the assembly cost can be suppressed to the same level as that of the conventional QFP. In the first embodiment, the module substrate for MCM has been described as an example, but the present invention is also applicable to the case of an LSI package for a single chip.
【００１６】次に、本発明の第２実施例について説明す
る。図３は本発明の第２実施例を示すモジュールの接続
端子構造を示す断面図、図４は本発明の第２実施例を示
すモジュールの接続端子構造を示す平面図である。これ
らの図において、２０１は多層配線基板、２０２はＬＳ
Ｉベアチップ、２０３はＬＳＩベアチップ２０２と多層
配線基板２０１を電気的に接続するワイヤ、２０４は封
止用の蓋、２０５は多層配線基板２０１の周辺に配置さ
れた接続端子群（Ｐ）（ｐｅｒｉｐｈｅｒａｌ）、２０
６は接続端子群（Ｐ）の接続パッド、２０７は多層配線
基板２０１上に配置した接続端子用パッド群（Ｇ）（Ｇ
ｒｉｄ）である。２０１ａは接続端子用パッド群（Ｇ）
２０７と接続端子群（Ｐ）２０５との高さ調整用の端子
配線部、２０５ａは接続端子群（Ｐ）の先端部である。
３０１は高さ調整用端子配線部２０１ａに設けたガス抜
き用のスリットである。Next, a second embodiment of the present invention will be described. FIG. 3 is a sectional view showing a connection terminal structure of a module according to the second embodiment of the present invention, and FIG. 4 is a plan view showing a connection terminal structure of a module according to the second embodiment of the present invention. In these figures, 201 is a multilayer wiring board, 202 is LS
I bare chip, 203 is a wire for electrically connecting the LSI bare chip 202 and the multilayer wiring board 201, 204 is a sealing lid, 205 is a connection terminal group (P) (peripheral) arranged around the multilayer wiring board 201. , 20
6 is a connection pad of the connection terminal group (P), 207 is a connection terminal pad group (G) (G
rid). 201a is a connection terminal pad group (G)
A terminal wiring portion for height adjustment between the connection terminal group 207 and the connection terminal group (P) 205, and a reference numeral 205a is a tip end of the connection terminal group (P).
Reference numeral 301 denotes a gas vent slit provided in the height adjustment terminal wiring portion 201a.
【００１７】第１実施例において、マザーボード３００
上に当該モジュールを搭載し、ハンダリフローや導電接
着剤等を用いて接続するときの加熱によって、これらの
接続材料からガスが放出される。このとき、接続端子用
パッド群（Ｇ）２０７が多列の場合には、内側で残留ガ
スによる接続不良や接続部にボイドを発生させる可能性
がある。In the first embodiment, the motherboard 300
Gas is released from these connection materials by heating when the module is mounted thereon and connected by using solder reflow, a conductive adhesive, or the like. At this time, if the connection terminal pad group (G) 207 has multiple rows, there is a possibility that a connection failure due to residual gas or voids may occur in the connection portion inside.
【００１８】そこで、第２実施例に示したように、高さ
調整用端子配線部２０１ａの一部にスリット３０１を設
けることにより、前述の接続端子用パッド群（Ｇ）２０
７の内側の残留ガスをモジュールの外側へ放出すること
ができ、マザーボード３００との接続信頼性を高めるこ
とができる。なお、第２実施例の場合のスリットは角形
で、４方向の配置を示したが、丸形や蒲鉾形のスリット
の適用も可能である。また、必要に応じて、スリット数
およびスリットの配置を決めても良い。Therefore, as shown in the second embodiment, by providing a slit 301 in a part of the height adjusting terminal wiring portion 201a, the connection terminal pad group (G) 20 is formed.
7 can be released to the outside of the module, and the connection reliability with the motherboard 300 can be improved. Although the slits in the second embodiment are square and arranged in four directions, round or semi-cylindrical slits can be applied. Further, the number of slits and the arrangement of the slits may be determined as necessary.
【００１９】また、本発明は上記実施例に限定されるも
のではなく、本発明の趣旨に基づいて種々の変形が可能
であり、これらを本発明の範囲から排除するものではな
い。Further, the present invention is not limited to the above-described embodiment, and various modifications are possible based on the gist of the present invention, and these are not excluded from the scope of the present invention.
【００２０】[0020]
【発明の効果】以上、詳細に説明したように、本発明に
よれば、以下のような効果を奏することができる。 （１）請求項１記載の発明によれば、モジュールの接続
端子は、多層配線基板の周辺の接続端子群（Ｐ）（第１
の接続端子群）と、多層配線基板上に形成した接続端子
用パッド群（Ｇ）（第２の接続端子群）の両方を備える
ことから、端子数の増加に対しても多層配線基板サイズ
の増加を抑えることができる。As described above, according to the present invention, the following effects can be obtained. (1) According to the first aspect of the present invention, the connection terminals of the module are connected to a connection terminal group (P) (first) around the multilayer wiring board.
) And a connection terminal pad group (G) (second connection terminal group) formed on the multilayer wiring board, so that the size of the multilayer wiring board can be reduced even when the number of terminals increases. The increase can be suppressed.
【００２１】また、接続端子群（Ｐ）と接続端子用パッ
ド群（Ｇ）へ端子数の配分を考慮することにより、端子
ピッチを緩和することができ、マザーボードの設計基準
の緩和やマザーボードとの接続の容易性を得ることがで
きる。 （２）請求項２記載の発明によれば、マザーボードへモ
ジュールを搭載するだけで、容易にマザーボードとの接
続を行うことができる。Further, by considering the distribution of the number of terminals to the connection terminal group (P) and the connection terminal pad group (G), the terminal pitch can be reduced, the design standard of the motherboard can be relaxed, and the connection with the motherboard can be relaxed. Easy connection can be obtained. (2) According to the second aspect of the present invention, connection to the motherboard can be easily performed only by mounting the module on the motherboard.
【００２２】（３）請求項３記載の発明によれば、高さ
調整用端子配線部の一部にスリットを設けることによ
り、接続端子用パッド群（Ｇ）の内側の残留ガスをモジ
ュールの外側へ放出することができ、マザーボードとの
接続信頼性を高めることができる。(3) According to the third aspect of the present invention, by providing a slit in a part of the height adjustment terminal wiring portion, residual gas inside the connection terminal pad group (G) can be removed outside the module. And the reliability of connection with the motherboard can be improved.
【図１】本発明の第１実施例を示すＭＣＭ（Ｍｕｌｔｉ
Ｃｈｉｐ Ｍｏｄｕｌｅ）の接続端子構造を示す断面
図である。FIG. 1 shows an MCM (Multi) showing a first embodiment of the present invention.
FIG. 2 is a cross-sectional view illustrating a connection terminal structure of a Chip Module.
【図２】本発明の第１実施例を示すＭＣＭの接続端子構
造を示す平面図である。FIG. 2 is a plan view showing a connection terminal structure of the MCM according to the first embodiment of the present invention.
【図３】本発明の第２実施例を示すモジュールの接続端
子構造を示す断面図である。FIG. 3 is a sectional view showing a connection terminal structure of a module according to a second embodiment of the present invention.
【図４】本発明の第２実施例を示すモジュールの接続端
子構造を示す平面図である。FIG. 4 is a plan view showing a connection terminal structure of a module according to a second embodiment of the present invention.
【図５】従来のマルチチップ・モジュールにおいて、一
般に使用されているモジュールの接続構造を示す図であ
る。FIG. 5 is a diagram showing a connection structure of a module generally used in a conventional multichip module.
２０１ 多層配線基板 ２０１ａ 接続端子用パッド群（Ｇ）の高さ調整用端
子配線部（端子配線部） ２０２ ＬＳＩベアチップ ２０３ ワイヤ ２０４ 封止用の蓋 ２０５ 多層配線基板の周辺に配置された接続端子群
（Ｐ）（第１の接続端子群） ２０５ａ 接続端子群（Ｐ）の先端部 ２０６ 接続端子群（Ｐ）の接続パッド ２０７ 多層配線基板上に配置した接続端子用パッド
群（Ｇ）（第２の接続端子群） ３００ マザーボード ３０１ ガス抜き用のスリットReference Signs List 201 Multilayer wiring substrate 201a Terminal wiring portion (terminal wiring portion) for adjusting height of connection terminal pad group (G) 202 LSI bare chip 203 Wire 204 Sealing lid 205 Connection terminal group arranged around multilayer wiring substrate (P) (first connection terminal group) 205a Tip portion of connection terminal group (P) 206 Connection pad of connection terminal group (P) 207 Connection terminal pad group (G) (second) disposed on multilayer wiring board Connection terminal group) 300 Motherboard 301 Slit for degassing
Claims (3)
いて、（ａ）配線基板外周に配置された第１の接続端子
群と、（ｂ）前記配線基板上のマザーボードとの接続側
に形成された所定の高さを有する端子配線部に第２の接
続端子群とを具備することを特徴とするモジュールの接
続端子構造。1. A connection terminal structure for a multi-pin module, wherein: (a) a first connection terminal group arranged on the outer periphery of a wiring board; and (b) a connection terminal formed on the wiring board on a connection side with a motherboard. A connection terminal structure for a module, comprising a terminal wiring portion having a predetermined height and a second connection terminal group.
造において、前記第１の接続端子群のマザーボードとの
接続に供する端子部の高さと前記第２の接続端子群の端
子部の高さを合わせたことを特徴とするモジュールの接
続端子構造。2. The connection terminal structure for a module according to claim 1, wherein a height of a terminal portion for connecting the first connection terminal group to a motherboard and a height of a terminal portion of the second connection terminal group are set. Connection terminal structure of the module, characterized by being combined.
端子構造において、前記第２の接続端子群の一部にスリ
ットを形成したことを特徴とするモジュールの接続端子
構造。3. The connection terminal structure for a module according to claim 1, wherein a slit is formed in a part of the second connection terminal group.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8342165A JPH10189807A (en) | 1996-12-20 | 1996-12-20 | Structure for connecting terminal of module |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8342165A JPH10189807A (en) | 1996-12-20 | 1996-12-20 | Structure for connecting terminal of module |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH10189807A true JPH10189807A (en) | 1998-07-21 |
Family
ID=18351630
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8342165A Withdrawn JPH10189807A (en) | 1996-12-20 | 1996-12-20 | Structure for connecting terminal of module |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH10189807A (en) |
-
1996
- 1996-12-20 JP JP8342165A patent/JPH10189807A/en not_active Withdrawn
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A300 | Withdrawal of application because of no request for examination |
Free format text: JAPANESE INTERMEDIATE CODE: A300 Effective date: 20040302 |