JPH10173341A - Ceramic multilayer board - Google Patents

Ceramic multilayer board

Info

Publication number
JPH10173341A
JPH10173341A JP8325447A JP32544796A JPH10173341A JP H10173341 A JPH10173341 A JP H10173341A JP 8325447 A JP8325447 A JP 8325447A JP 32544796 A JP32544796 A JP 32544796A JP H10173341 A JPH10173341 A JP H10173341A
Authority
JP
Japan
Prior art keywords
ceramic
conductor
ceramic multilayer
board
layers
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8325447A
Other languages
Japanese (ja)
Inventor
Harufumi Bandai
治文 萬代
Koji Tani
広次 谷
Kimihide Sugo
公英 須郷
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Priority to JP8325447A priority Critical patent/JPH10173341A/en
Publication of JPH10173341A publication Critical patent/JPH10173341A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To provide a ceramic multilayer board, capable of integrating the resistor of ruthenium base material in high reliability having superior migration resistance. SOLUTION: This ceramic multilayer board 10 is formed of four layer ceramic insulator layers 11, formed of green sheets made of ceramic mainly comprizing barium oxide, aluminum oxide and silica. A via holes 12 to be filled up with palladium are provided in respective ceramic insulating layers 11, while inner conductors 13 made of copper are provided in the ceramic insulator layers 11 as the second, third layers from the top layer as well as the lowermost layer. At this time, a laminate 14 is formed by laminating these ceramic insulator layers 11 to be sintered integrally at about 850 deg.C in the reducing atmosphere. Later, the surface of the laminate 14 is printed with surface conductors 15, made of silver and resistors 16 made of ruthenium-base material to be backed at about 850 deg.C in an oxidizing atmosphere. Later if necessary, an overcoat 17 is provided on the surface of the ceramic board 10, while an active element 18 and a passive element 19 are packaged on the underside of the ceramic board 10.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、セラミック多層基
板に関し、特に、民生用やコンピューター用等の電子機
器類に使用するセラミック多層基板に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a ceramic multi-layer substrate, and more particularly to a ceramic multi-layer substrate used for electronic devices for consumer use, computers and the like.

【0002】[0002]

【従来の技術】従来電子機器類に使用する回路基板とし
て、セラミックを絶縁体として使用した配線基板が使用
されてきた。その代表的なものとして、タングステンや
モリブデンを導体として使用し、導体が酸化しないよう
に還元雰囲気で焼成するセラミック多層基板がある。し
かしながら、このセラミック多層基板は導体にタングス
テンやモリブデンを使用するため、導通抵抗が10〜2
0mΩ/□と高く、はんだ濡れ性を持たせるために金め
っきをする必要があり、また、酸化雰囲気で焼成する必
要のある信頼性の高いルテニウム系材料からなる抵抗を
形成しようとすると導体が酸化してしまうなどの問題が
あった。
2. Description of the Related Art Conventionally, wiring boards using ceramics as insulators have been used as circuit boards for use in electronic equipment. As a typical example, there is a ceramic multilayer substrate using tungsten or molybdenum as a conductor and firing in a reducing atmosphere so as not to oxidize the conductor. However, since this ceramic multilayer substrate uses tungsten or molybdenum for the conductor, the conduction resistance is 10 to 2 times.
As high as 0 mΩ / □, it is necessary to perform gold plating in order to have solder wettability. Also, if a resistor made of a highly reliable ruthenium-based material that needs to be fired in an oxidizing atmosphere is formed, the conductor is oxidized. There were problems such as doing.

【0003】これらの問題点を解決するために、導通抵
抗が小さく、酸化焼成が可能な銀系の導体、あるいは導
通抵抗が1.5〜3mΩ/□と小さく、耐マイグレーシ
ョン性や耐はんだ食われ性が優れている銅系の導体が開
発されている。
[0003] In order to solve these problems, a silver-based conductor having a low conduction resistance and capable of being oxidized and fired, or a conduction resistance as small as 1.5 to 3 mΩ / □, having resistance to migration and resistance to solder erosion. Copper-based conductors having excellent properties have been developed.

【0004】[0004]

【発明が解決しようとする課題】ところが、導体に銀系
材料を用いた従来のセラミック多層基板においては、内
部に形成される導体の銀等がマイグレーションを生じや
すく、絶縁不良やショートが発生するという問題があっ
た。
However, in a conventional ceramic multilayer substrate using a silver-based material for the conductor, the silver or the like of the conductor formed inside tends to cause migration, resulting in poor insulation or short-circuit. There was a problem.

【0005】一方、導体に銅系材料を用いた従来のセラ
ミック多層基板においては、信頼性の高い抵抗として知
られているルテニウム系の抵抗は、酸化雰囲気での焼成
が必要であることから表面電極を構成している銅が酸化
してしまうために使用できないという問題があった。
On the other hand, in a conventional ceramic multilayer substrate using a copper-based material for a conductor, a ruthenium-based resistor, which is known as a highly reliable resistor, requires firing in an oxidizing atmosphere, and thus requires a surface electrode. However, there is a problem that the copper constituting the copper oxide cannot be used because it is oxidized.

【0006】本発明は、このような問題点を解決するた
めになされたものであり、耐マイグレーション性に優
れ、信頼性の高いルテニウム系材料の抵抗を一体化する
ことができるセラミック多層基板を提供することを目的
とする。
The present invention has been made to solve such a problem, and provides a ceramic multilayer substrate which is excellent in migration resistance and can integrate a highly reliable resistor of a ruthenium-based material. The purpose is to do.

【0007】[0007]

【課題を解決するための手段】上述する問題点を解決す
るため本発明は、内部に形成される導体を銅系材料で形
成し、表面に形成される導体を銀系材料で形成してなる
ことを特徴とする。
According to the present invention, in order to solve the above-mentioned problems, a conductor formed inside is formed of a copper-based material, and a conductor formed on the surface is formed of a silver-based material. It is characterized by the following.

【0008】本発明のセラミック多層基板によれば、内
部に形成される導体に銅を使用し、表面に形成される導
体に銀を使用しているため、高精度抵抗、耐マイグレー
ション性などをすべてバランスよく保持する内部導体及
び外部導体を得ることができる。
According to the ceramic multilayer substrate of the present invention, copper is used for the conductor formed inside, and silver is used for the conductor formed on the surface. It is possible to obtain an inner conductor and an outer conductor that maintain a good balance.

【0009】[0009]

【発明の実施の形態】図1に、本発明に係るセラミック
多層基板の一実施例の断面図を示す。セラミック多層基
板10は酸化バリウム、酸化アルミニウム及びシリカを
主成分とするセラミックからなるグリーンシートより形
成された4層のセラミック絶縁体層11で形成される。
各層のセラミック絶縁体層11には、パラジウムが充填
されるビアホール12が設けられ、また、上から2番
目、上から3番目及び最下層のセラミック絶縁体層11
には、銅からなる内部に形成される導体、すなわち内部
導体13が設けられる。
FIG. 1 is a sectional view showing one embodiment of a ceramic multilayer substrate according to the present invention. The ceramic multilayer substrate 10 is formed of four ceramic insulator layers 11 formed of green sheets made of ceramic containing barium oxide, aluminum oxide and silica as main components.
A via hole 12 filled with palladium is provided in the ceramic insulator layer 11 of each layer, and a second, third, and lowermost ceramic insulator layer 11 from the top is provided.
Is provided with a conductor formed inside of copper, that is, an internal conductor 13.

【0010】そして、これらのセラミック絶縁体層11
を積層し、還元雰囲気中において、約850℃で一体焼
結することにより積層体14を形成する。その後、積層
体14の表面に、銀からなる表面に形成される導体、す
なわち表面導体15及びルテニウム系材料からなる抵抗
16を印刷し、酸化雰囲気中において、約850℃で焼
成される。この際、ビアホール12、内部導体13及び
表面導体15により回路が構成される。以上で、セラミ
ック多層基板10は完成する。そして、必要に応じて、
セラミック多層基板10の表面には、必要な箇所にオー
バーコート17が設けられ、裏面には、能動素子18及
び受動素子19が実装される。
Then, these ceramic insulator layers 11
Are laminated and integrally sintered at about 850 ° C. in a reducing atmosphere to form a laminate 14. Thereafter, a conductor formed on the surface made of silver, that is, a surface conductor 15 and a resistor 16 made of a ruthenium-based material are printed on the surface of the laminate 14 and fired at about 850 ° C. in an oxidizing atmosphere. At this time, a circuit is formed by the via hole 12, the internal conductor 13, and the surface conductor 15. Thus, the ceramic multilayer substrate 10 is completed. And, if necessary,
On the front surface of the ceramic multilayer substrate 10, an overcoat 17 is provided at necessary places, and on the back surface, an active element 18 and a passive element 19 are mounted.

【0011】このように構成されたセラミック多層基板
10のTCR、すなわち抵抗の温度変化特性を評価し
た。その結果を表1に示す。なお、比較のために、内部
導体及び外部導体に銅を用いたセラミック多層基板を同
時に評価した。
The TCR of the ceramic multilayer substrate 10 having the above-described structure, that is, the resistance temperature change characteristics was evaluated. Table 1 shows the results. For comparison, a ceramic multilayer substrate using copper for the inner conductor and the outer conductor was simultaneously evaluated.

【0012】[0012]

【表1】 [Table 1]

【0013】表1から、−55℃〜室温(RT)のTC
R、室温(RT)〜150℃のTCRともにルテニウム
系の抵抗の方が良好であることが解る。したがって、外
部導体に銀を用いることにより、高精度のルテニウム系
抵抗を使用することができる。
From Table 1, it can be seen that TC from -55 ° C. to room temperature (RT)
It can be seen that ruthenium-based resistance is better for both R and TCR at room temperature (RT) to 150 ° C. Therefore, by using silver for the external conductor, a highly accurate ruthenium-based resistor can be used.

【0014】また、セラミック多層基板10の信頼性特
性(85℃、80%、50V印加)を評価した。その結
果を表2に示す。なお、比較のために、内部導体及び外
部導体に銀を用いたセラミック多層基板を同時に評価し
た。
The reliability characteristics (85 ° C., 80%, 50 V applied) of the ceramic multilayer substrate 10 were evaluated. Table 2 shows the results. For comparison, a ceramic multilayer substrate using silver for the inner conductor and the outer conductor was simultaneously evaluated.

【0015】[0015]

【表2】 [Table 2]

【0016】表2から、本実施例では1000Hr経過
後も20個中不良は発生しないが、比較例では500H
r経過後に20個中2個、1000Hr経過後に20個
中5個不良が発生することが解る。したがって、内部導
体に銅を用いることにより、耐マイグレーション性に優
れ、信頼性が向上する。
From Table 2, it can be seen that no failure occurs in 20 pieces after 1000 hours in this embodiment, but 500H in the comparative example.
It can be seen that two out of 20 failures occur after elapse of r and five out of 20 failures occur after 1000 Hr. Therefore, by using copper for the internal conductor, migration resistance is excellent and reliability is improved.

【0017】以上のように、上述の実施例では、内部電
極に銅を使用し、表面電極に銀を使用しているため、高
精度抵抗、耐マイグレーション性などをすべてバランス
よく保持することができる。
As described above, in the above-described embodiment, since copper is used for the internal electrode and silver is used for the surface electrode, high-precision resistance, migration resistance and the like can all be maintained in a well-balanced manner. .

【0018】[0018]

【発明の効果】本発明のセラミック多層基板によれば、
内部に形成される導体に銅を使用し、表面に形成される
導体に銀を使用しているため、高精度抵抗、耐マイグレ
ーション性などをすべてバランスよく保持することがで
きる。
According to the ceramic multilayer substrate of the present invention,
Since copper is used for the conductor formed inside and silver is used for the conductor formed on the surface, high precision resistance, migration resistance and the like can all be maintained in a well-balanced manner.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明のセラミック多層基板に係る一実施例の
断面図である。
FIG. 1 is a sectional view of an embodiment according to a ceramic multilayer substrate of the present invention.

【符号の説明】[Explanation of symbols]

10 セラミック多層基板 12 内部に形成される導体(内部導体) 15 表面に形成される導体(表面導体) Reference Signs List 10 ceramic multilayer substrate 12 conductor formed inside (inner conductor) 15 conductor formed on surface (surface conductor)

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 内部に形成される導体を銅系材料で形成
し、表面に形成される導体を銀系材料で形成してなるこ
とを特徴とするセラミック多層基板。
1. A ceramic multilayer substrate wherein a conductor formed inside is formed of a copper-based material and a conductor formed on the surface is formed of a silver-based material.
JP8325447A 1996-12-05 1996-12-05 Ceramic multilayer board Pending JPH10173341A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8325447A JPH10173341A (en) 1996-12-05 1996-12-05 Ceramic multilayer board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8325447A JPH10173341A (en) 1996-12-05 1996-12-05 Ceramic multilayer board

Publications (1)

Publication Number Publication Date
JPH10173341A true JPH10173341A (en) 1998-06-26

Family

ID=18176971

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8325447A Pending JPH10173341A (en) 1996-12-05 1996-12-05 Ceramic multilayer board

Country Status (1)

Country Link
JP (1) JPH10173341A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7326743B2 (en) 1998-12-14 2008-02-05 Plantic Technologies Ltd. Biodegradable polymer
US7384993B2 (en) 1999-12-13 2008-06-10 Plantic Technologies Ltd Biodegradable polymer

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7326743B2 (en) 1998-12-14 2008-02-05 Plantic Technologies Ltd. Biodegradable polymer
US7495044B2 (en) 1998-12-14 2009-02-24 Plantic Technologies Ltd. Biodegradable polymer
US7384993B2 (en) 1999-12-13 2008-06-10 Plantic Technologies Ltd Biodegradable polymer

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