JPH10173337A - Production of printed board - Google Patents

Production of printed board

Info

Publication number
JPH10173337A
JPH10173337A JP32722996A JP32722996A JPH10173337A JP H10173337 A JPH10173337 A JP H10173337A JP 32722996 A JP32722996 A JP 32722996A JP 32722996 A JP32722996 A JP 32722996A JP H10173337 A JPH10173337 A JP H10173337A
Authority
JP
Japan
Prior art keywords
layer
circuit board
hole
printed circuit
plating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP32722996A
Other languages
Japanese (ja)
Inventor
Naoto Motooka
直人 本岡
Kazuhiro Shoji
和宏 荘司
Keizo Yamamoto
桂三 山本
Yasutomo Maehara
靖友 前原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP32722996A priority Critical patent/JPH10173337A/en
Publication of JPH10173337A publication Critical patent/JPH10173337A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To attain a fine pitch, while eliminating side etching by forming a plating layer on the surface of a plate barrier layer and the inner surface of a through-hole, filling the through-hole with a mask material, removing the plate barrier layer to expose a conductor layer and then forming a specified pattern thereon. SOLUTION: First, a conductive mask 2 is pasted to a both side copper clad plate, i.e., a conductor layer CO. A resin layer of the conductive mask 2 is mounted on a printed board 1 and bonded thereto by baking before a through-hole is made at a specified position of the printed board 1. Subsequently, the printed board 1 is immersed into a plating layer and subjected to electrolytic plating using the conductor layer as an electrode. Thereafter, the through-hole TH 10 is filled with a resin paste, and the plating layer on the surface and rear of the printed board 1 is stripped from the conductive layer of the conductive mask 2 by etching. The printed board 1 is coated, on the surface and rear thereof, with an etching resist which is then exposed and developed and the conductive layer CO is etched, thus forming a pattern.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明はプリント基板の造方
法に関し、特にスルーホールを有するフアインピッチの
プリント基板の製造方法に関する。このプリント基板表
面のパターンはプリント基板表面の導体層をエッチング
処理して作られている。特にフアインピッチ用のプリン
ト基板のパターンサイズは例えばパターンの線幅が90
μ、間隙が90μと繊細緻密である。この様に繊細緻密
なフアインピッチ用のパターンをエッチング処理するに
はパターンの厚みが厚い程、サイドエッチングに成りや
すい。従ってパターン層の厚みは所定の厚み以下である
ことが要求される。
The present invention relates to a method of manufacturing a printed circuit board, and more particularly to a method of manufacturing a fine pitch printed circuit board having through holes. The pattern on the surface of the printed circuit board is formed by etching a conductor layer on the surface of the printed circuit board. In particular, the pattern size of the printed circuit board for fine pitch is, for example, a line width of 90
μ, the gap is 90 μ, which is delicate and dense. As described above, when etching a fine and fine pattern for fine pitch, side etching tends to occur as the pattern thickness increases. Therefore, the thickness of the pattern layer is required to be equal to or less than a predetermined thickness.

【0002】[0002]

【従来の技術】[Prior art]

<従来技術1>従来技術1を図面に基づいて説明する。
図17から図21はスルーホール付きプリント基板の製
造工程を説明する図である。先ず、プリント基板に孔開
け処理を行う。図17に開示する様にプリント基板1は
表裏両面に銅等の導体層COを張り付けた両面銅張り板
である。このプリント基板1の所定位置に旋盤等で貫通
孔を設けている。
<Prior Art 1> Prior Art 1 will be described with reference to the drawings.
FIG. 17 to FIG. 21 are views for explaining a manufacturing process of a printed board with through holes. First, a hole making process is performed on the printed circuit board. As disclosed in FIG. 17, the printed circuit board 1 is a double-sided copper-clad board in which a conductor layer CO such as copper is bonded on both sides. A through hole is provided at a predetermined position of the printed circuit board 1 with a lathe or the like.

【0003】次にプリント基板にメッキ処理を行う。図
18のようにプリント基板1をメッキ槽に浸して電解メ
ッキする。従ってプリント基板1の表裏と貫通孔の内壁
にもメッキ層M10が形成される。結果としてスルーホ
ールTH10が形成される。続いてプリント基板に孔埋
め処理を行う。図19に示すように前記スルーホールT
H10内にロールコーター等を用いてペースト状樹脂の
マスクMKを充填する。その後マスクMKを熱硬化させ
る。
Next, plating is performed on the printed circuit board. As shown in FIG. 18, the printed circuit board 1 is immersed in a plating bath and subjected to electrolytic plating. Therefore, the plating layer M10 is also formed on the front and back of the printed circuit board 1 and the inner wall of the through hole. As a result, a through hole TH10 is formed. Subsequently, a hole filling process is performed on the printed circuit board. As shown in FIG.
H10 is filled with a paste resin mask MK using a roll coater or the like. Thereafter, the mask MK is thermally cured.

【0004】更にプリント基板にパターン形成の処理を
行う。図20に開示するようにプリント基板1の表裏面
上にエッチングレジストをスクリーン印刷法等で塗布す
る。その後エッチングレジストを露光・現像し導体層C
Oをエッチング処理する。その後エッチングレジストを
除去して図20の如きパターンを得る。
Further, a pattern forming process is performed on the printed circuit board. As disclosed in FIG. 20, an etching resist is applied on the front and back surfaces of the printed circuit board 1 by a screen printing method or the like. After that, the etching resist is exposed and developed to form a conductor layer C.
O is etched. Thereafter, the etching resist is removed to obtain a pattern as shown in FIG.

【0005】最後にプリント基板にマスク除去の処理を
行う。図21に図示するように前記スルーホールTH1
0内のマスクMKを苛性ソーダ等で薬品処理して除去す
る。上記の製作方法では、プリント基板1にスルーホー
ルを形成する際に、導体層COの表面にもメッキ層が形
成される。そのためにパターン形成に際しては導体層に
加えてメッキ層もエッチングすることとなり、サイドエ
ッチングが問題となる。 <従来技術2>従来技術1のようにプリント基板1表面
の厚みを増加させない技術としては、特開昭63−23
2487号公報に記載の印刷配線板の製造方法がある。
[0005] Finally, a mask removal process is performed on the printed circuit board. As shown in FIG. 21, the through hole TH1
The mask MK in 0 is removed by chemical treatment with caustic soda or the like. In the above-mentioned manufacturing method, when forming a through hole in the printed circuit board 1, a plating layer is also formed on the surface of the conductor layer CO. Therefore, when forming a pattern, the plating layer is etched in addition to the conductor layer, and side etching becomes a problem. <Prior art 2> As a technique which does not increase the thickness of the surface of the printed circuit board 1 unlike the prior art 1, Japanese Patent Application Laid-Open No. 63-23 / 1988
No. 2487 discloses a method for manufacturing a printed wiring board.

【0006】この方法は、プリント基板表面の銅箔上に
例えばポリエチレン、ポリプロピレン、ポリ塩化ビニー
ル、ビニリデン等の熱可塑性樹脂からなる絶縁性マスク
を被覆する。そして貫通孔を穿孔した後に、プリント基
板表面を電解メッキしてスルーホールを形成する。その
後スルーホール内に樹脂を埋め込む。そして前記マスク
を機械的に剥離除去する。更にプリント基板表面にパタ
ーンを設ける。その後スルーホール内の樹脂を除去す
る。上記工程によりプリント基板表面にパターン形成す
る。
According to this method, an insulating mask made of a thermoplastic resin such as polyethylene, polypropylene, polyvinyl chloride, or vinylidene is coated on a copper foil on the surface of a printed circuit board. After the through holes are formed, the surface of the printed circuit board is electrolytically plated to form through holes. Thereafter, a resin is embedded in the through hole. Then, the mask is mechanically peeled off. Further, a pattern is provided on the surface of the printed circuit board. Thereafter, the resin in the through hole is removed. The pattern is formed on the surface of the printed circuit board by the above steps.

【0007】[0007]

【発明が解決しようとする課題】従来技術1に記載のプ
リント基板1は前述のように導体層とメッキ層をエッチ
ングしなければならない。従ってサイドエッチングが問
題となる。このためにプリント基板の表面に形成された
メッキ層を機械研磨することも考えられる。しかし機械
研磨する方法では均一な厚みのパターン面を得られな
い。また多大な工数が必要だった。
As described above, the printed circuit board 1 according to the prior art 1 has to etch the conductor layer and the plating layer. Therefore, side etching becomes a problem. For this purpose, mechanical polishing of a plating layer formed on the surface of a printed circuit board may be considered. However, a pattern surface having a uniform thickness cannot be obtained by the mechanical polishing method. It also required a lot of man-hours.

【0008】サイドエッチングが生じないようにするた
めの方法を提示する上記従来技術2は、印刷配線板の表
裏全面をポリ塩化ビニール、ビニリデン等の絶縁性の樹
脂で覆っているために印刷配線板全面に均一な電荷をか
けられない。結果として貫通孔の内壁に均一な厚みのメ
ッキが形成されない。本発明の目的は、プリント基板の
スルーホール内面に均一な厚みのメッキを形成してもパ
ターン形成する導体層を厚くすることもない、従ってサ
イドエッチングがないフアインピッチのパターンを得る
ことができる製造方法を提供するものである。
The above prior art 2 which proposes a method for preventing side etching does not occur. In the prior art 2, the printed wiring board is covered with an insulating resin such as polyvinyl chloride, vinylidene or the like on the entire front and back surfaces thereof. A uniform charge cannot be applied to the entire surface. As a result, plating with a uniform thickness is not formed on the inner wall of the through hole. SUMMARY OF THE INVENTION An object of the present invention is to provide a manufacturing method capable of obtaining a fine pitch pattern without side etching even when a uniform thickness plating is formed on the inner surface of a through hole of a printed circuit board without increasing the thickness of a conductor layer to be patterned. Is provided.

【0009】[0009]

【課題を解決するための手段】本発明の目的であるとこ
ろの、パータン形成面上にメッキ層を形成することな
く、且つスルーホール内壁に均一な厚みのメッキを形成
するために請求項1に記載の発明においては、両面に導
体層を有するプリント基板の少なくとも一方の導体層上
に当該導体層の材料とは異なる材料から成るメッキバリ
ヤ層を積層する工程と、プリント基板に貫通孔を形成す
る工程と、前記メッキバリヤ層の表面を含めて前記貫通
孔の内面にメッキ層を設けてスルーホールを形成する工
程と、前記スルーホールにマスク材を充填する工程と、
前記メッキバリヤ層を除去して前記導体層を露出させる
工程と、前記露出した導体層に対して所定のパターンを
形成する工程を含んでなることを特徴とするプリント基
板の製造方法を提供できる。
The object of the present invention is to form a plating having a uniform thickness on the inner wall of a through hole without forming a plating layer on a pattern forming surface. In the described invention, a step of laminating a plating barrier layer made of a material different from a material of the conductor layer on at least one conductor layer of a printed board having conductor layers on both surfaces, and a step of forming a through hole in the printed board And providing a plating layer on the inner surface of the through hole including the surface of the plating barrier layer to form a through hole, and filling the through hole with a mask material,
A method of manufacturing a printed circuit board, comprising: removing the plating barrier layer to expose the conductor layer; and forming a predetermined pattern on the exposed conductor layer.

【0010】[0010]

【発明の実施の形態】BEST MODE FOR CARRYING OUT THE INVENTION

<実施例1>本発明の実施例を図面に基づいて説明す
る。なお、従来例と同じ部分には同一符号を記すととも
に説明を省略する。先ず、本発明に係る製造方法の第1
番目の工程は、図1の様に従来例で説明した両面銅張り
板である導体層COに導電マスク体2を貼り付ける。
Embodiment 1 An embodiment of the present invention will be described with reference to the drawings. The same parts as those in the conventional example are denoted by the same reference numerals and description thereof will be omitted. First, the first method of the manufacturing method according to the present invention is described.
In the third step, as shown in FIG. 1, the conductive mask 2 is attached to the conductive layer CO which is a double-sided copper-clad plate described in the conventional example.

【0011】導電マスク体2としては導体層COの材料
とは異なる材料から成るメッキバリア材を使用すれば良
い。実施例1では樹脂と銅箔とを使用した例えば、三井
金属株製、ノリツキドウハク、MKー61を使用する。
形状は幅W約55cm×長さL約100cmである。そして
上下2層から構成されている。下層はフェノール樹脂等
の樹脂層21で厚み約30μm程度である。上層は銅箔
等の導電層22で厚み約35μm程度である。この導電
マスク体2の樹脂層21をプリント基板1に載置し、そ
して120度C〜130度Cで5分〜10分間ベーキン
グし接着する。ベーキング接着後、プリント基板1の所
定位置に旋盤等で貫通孔を開ける。
As the conductive mask 2, a plating barrier material made of a material different from the material of the conductor layer CO may be used. In the first embodiment, for example, Noritsuki Haku, MK-61 manufactured by Mitsui Kinzoku Co., Ltd. using resin and copper foil is used.
The shape is about 55 cm in width W × about 100 cm in length L. It is composed of upper and lower layers. The lower layer is a resin layer 21 such as a phenol resin and has a thickness of about 30 μm. The upper layer is a conductive layer 22 such as a copper foil and has a thickness of about 35 μm. The resin layer 21 of the conductive mask body 2 is placed on the printed circuit board 1 and baked and bonded at 120 ° C. to 130 ° C. for 5 minutes to 10 minutes. After the baking bonding, a through hole is opened at a predetermined position of the printed circuit board 1 with a lathe or the like.

【0012】次にプリント基板にメッキ処理を行う。図
2に図示するようにプリント基板1をメッキ槽に浸して
導電層22を電極として電解メッキする。従って導電マ
スク体2の表面とスルーホールの内壁とに均一な厚さの
メッキ層M10が形成される。続いてプリント基板に孔
埋め処理を行う。図3に開示するように前記スルーホー
ルTH10内にロールコーター等を用いてペースト状樹
脂のマスクMKを充填する。マスクMKとしては呉応化
学株製、プラスファイン、PTR924Wを使用した。
その後マスクMKを光硬化させる。
Next, plating is performed on the printed circuit board. As shown in FIG. 2, the printed circuit board 1 is immersed in a plating bath and electrolytic plating is performed using the conductive layer 22 as an electrode. Therefore, a plating layer M10 having a uniform thickness is formed on the surface of the conductive mask body 2 and the inner wall of the through hole. Subsequently, a hole filling process is performed on the printed circuit board. As shown in FIG. 3, a paste resin mask MK is filled in the through hole TH10 using a roll coater or the like. As the mask MK, Plus Fine, PTR924W manufactured by Kureo Chemical Co., Ltd. was used.
Thereafter, the mask MK is light-cured.

【0013】更にプリント基板に導体層を露出させる処
理を行う。すなわち図4のようにプリント基板1表裏の
メッキ層10と導電マスク体2の導電層22をエッチン
グ処理にて剥離する。導電マスク体2が導体層COの材
料とは異なる金属、例えばCrを使用する場合にはエッ
チング処理液を選択してエッチング処理を行えば良い。
従って、プリント基板1の表裏に導電体マスク2の樹脂
層21が露出する。そして、この樹脂層21を塩酸等で
膨潤処理して剥離する。
Further, a process for exposing the conductor layer to the printed board is performed. That is, as shown in FIG. 4, the plating layer 10 on the front and back of the printed circuit board 1 and the conductive layer 22 of the conductive mask 2 are separated by etching. When the conductive mask body 2 uses a metal different from the material of the conductive layer CO, for example, Cr, the etching process may be performed by selecting an etching solution.
Therefore, the resin layer 21 of the conductor mask 2 is exposed on the front and back of the printed circuit board 1. Then, the resin layer 21 is separated by swelling treatment with hydrochloric acid or the like.

【0014】次にプリント基板にパターン形成の処理を
行う。図5に開示するようにプリント基板1の表裏面上
にエッチングレジストをドライフィルムフォトレジスト
を用いたフォト印刷等で塗布する。その後エッチングレ
ジストを露光・現像し導体層COをエッチング処理す
る。その後エッチングレジストを除去してパターンを得
る。 最後にプリント基板にマスク除去の処理を行う。
すなわち図6のように前記スルーホールTH10内のマ
スクMKを苛性ソーダ等で薬品処理して除去する。
Next, a pattern forming process is performed on the printed circuit board. As disclosed in FIG. 5, an etching resist is applied on the front and back surfaces of the printed circuit board 1 by photo printing using a dry film photoresist or the like. Thereafter, the etching resist is exposed and developed, and the conductor layer CO is etched. Thereafter, the pattern is obtained by removing the etching resist. Finally, a mask removal process is performed on the printed circuit board.
That is, as shown in FIG. 6, the mask MK in the through hole TH10 is removed by chemical treatment with caustic soda or the like.

【0015】上記実施例はプリント基板1両面の導体層
COに導電マスク体2を貼り付ける方法で説明した。し
かしプリント基板1の少なくとも一方の導体層COに導
電マスク体2を貼り付けた物であっても良い。これはプ
リント基板1の一方の面のみがフアインピッチ用の高密
度であり、他方が電源及びアース用パターンの低密度で
ある場合等である。 <実施例2>実施例1では接着部21と銅箔層22とか
らなる導電体マスク2を使用したが、プリント板部材1
1の導体層CO上にフェノール樹脂等の接着材を塗布し
た後に導電体の銅箔を設けても良い。 <実施例3>図7は多層プリント板の製作に使用される
一例としてのプリント板部材8、9、10である。
In the above embodiment, the method of attaching the conductive mask 2 to the conductor layers CO on both sides of the printed circuit board 1 has been described. However, the conductive mask body 2 may be attached to at least one conductive layer CO of the printed circuit board 1. This is the case where only one surface of the printed circuit board 1 has a high density for fine pitch and the other has a low density of the power and ground patterns. <Embodiment 2> In the embodiment 1, the conductor mask 2 including the bonding portion 21 and the copper foil layer 22 was used.
A conductor copper foil may be provided after applying an adhesive such as a phenol resin on the first conductor layer CO. <Embodiment 3> FIGS. 7A and 7B show printed board members 8, 9 and 10 as examples used for manufacturing a multilayer printed board.

【0016】プリント板部材8は実施例1又は実施例2
の方法で製作されたもので両面の導体層COに所定のパ
ターンを設け、パターン表面を銅メッキしている。そし
て所定位置に両面のパターンを導通させるスルーホール
を設けている。プリント板部材9は両面の導体層COに
所定のパターンを設けている。しかしメッキされていな
い導体層COである。プリント板部材10は一方面の所
定位置にパターンを設けられ銅メッキされている。他方
の面の導体層CO全面を銅メッキしたパターン形成部L
Aを有する。そして所定位置にスルーホールが設けられ
ている。
The printed board member 8 is used in the first or second embodiment.
A predetermined pattern is provided on the conductor layers CO on both surfaces, and the pattern surface is plated with copper. Then, through holes for conducting the patterns on both sides are provided at predetermined positions. The printed board member 9 has a predetermined pattern on the conductor layers CO on both surfaces. However, the conductor layer CO is not plated. The printed board member 10 is provided with a pattern at a predetermined position on one surface and is plated with copper. The pattern forming portion L in which the entire surface of the conductor layer CO on the other surface is copper-plated
A. A through hole is provided at a predetermined position.

【0017】図8は多層プリント板の製作に使用される
プリント板部材11、12、13である。プリント板部
材11はプリント板部材10と同じように製作される。
プリント板部材12はプリント板部材9と同じように製
作される。プリント板部材13はプリント板部材8と同
じように製作されるものである。
FIG. 8 shows printed board members 11, 12, and 13 used for manufacturing a multilayer printed board. The printed board member 11 is manufactured in the same manner as the printed board member 10.
The printed board member 12 is manufactured in the same manner as the printed board member 9. The printed board member 13 is manufactured in the same manner as the printed board member 8.

【0018】以降、プリント板部材11、12、13を
使用した多層プリント板30の製作方法について説明す
るが、プリント板部材8、9、10を使用した多層プリ
ント板40も同様にして別途製作される。次に前記各プ
リント板の積層処理を行う。図9に図示するようにプリ
ント板30は導電マスク体2と前記プリント板部材1
1、12、13と銅箔CPを接着材のプリプレグPPを
間に挟み、そして各プリント板部材11、12、13の
パータンの位置を合わせて積層されている。つまり下側
から銅箔CP、プリプレグPP、プリント板部材13、
プリプレグPP、プリント板部材12、プリプレグP
P、プリント板部材11、導電マスク体2の順に積層さ
れている。そして120度C〜130度Cで5分〜10
分間ベーキングし硬化したものである。この銅箔CPは
後述されるプリント板30をメッキする時の電極板の役
目をする。
Hereinafter, a method of manufacturing the multilayer printed board 30 using the printed board members 11, 12, 13 will be described. The multilayer printed board 40 using the printed board members 8, 9, 10 is similarly manufactured separately. You. Next, a lamination process of each of the printed boards is performed. As shown in FIG. 9, the printed board 30 is composed of the conductive mask 2 and the printed board member 1.
The sheets 1, 12, 13 and the copper foil CP are laminated with the adhesive prepreg PP interposed therebetween, and the positions of the patterns of the printed board members 11, 12, 13 are aligned. That is, from below, the copper foil CP, the prepreg PP, the printed board member 13,
Prepreg PP, printed board member 12, prepreg P
P, the printed board member 11, and the conductive mask body 2 are laminated in this order. And 5 minutes to 10 at 120 ° C to 130 ° C
It was baked for a minute and cured. The copper foil CP functions as an electrode plate when plating a printed board 30 described later.

【0019】続いてプリント板に孔明、メッキ処理を行
う。図10に開示するようにプリント板30の所定位置
に貫通孔を設け、そしてプリント板30をメッキ槽に浸
して電解メッキする。従って導電マスク体2の表面と、
銅箔CPの表面と、貫通孔の内壁とにメッキ層M10が
形成される。結果としてスルーホールTH10が形成さ
れる。
Subsequently, the printed board is perforated and plated. As shown in FIG. 10, a through hole is provided at a predetermined position of the printed board 30, and the printed board 30 is immersed in a plating tank to perform electroplating. Therefore, the surface of the conductive mask body 2 and
A plating layer M10 is formed on the surface of the copper foil CP and on the inner wall of the through hole. As a result, a through hole TH10 is formed.

【0020】更に、プリント板に孔埋め処理を行う。図
11に示しているのは従来技術1と同じく、前記スルー
ホールTH10内に樹脂等のマスクMKを充填した後に
樹脂を熱硬化させる。その後プリント板30の下部のメ
ッキ層M10と銅箔CPとをエッチング処理にて除去す
る。次に、プリント基板の積層処理を行う。図12に開
示するように上記図9〜図11で説明したプリント板3
0と別途製作されたプリント板40とを上下違い勝手に
積層したものである。但し、プリント板30、40は積
層する前に前記スルーホールTH10内のマスクMKを
苛性ソーダ等で薬品処理され除去している。プリント板
30の最上層のプリント板部材11のパータン形成部L
Aを上側に向け、またプリント板40の最下層のプリン
ト板部材10のパータン形成部LAを下側に向けて、そ
してプリント板30と40の間にプリプレグPPを介し
て積層している。その後120度C〜130度Cで5分
〜10分間ベーキングし硬化したものである。
Further, a hole filling process is performed on the printed board. As shown in FIG. 11, as in the prior art 1, the resin is thermally cured after filling the through hole TH10 with a mask MK such as a resin. Thereafter, the plating layer M10 and the copper foil CP under the printed board 30 are removed by etching. Next, the printed circuit board is laminated. The printed board 3 described with reference to FIGS. 9 to 11 as disclosed in FIG.
No. 0 and a separately manufactured printed board 40 are vertically stacked. However, the masks MK in the through holes TH10 are removed by chemical treatment with caustic soda or the like before the printed boards 30 and 40 are laminated. Pattern forming portion L of printed board member 11 on the uppermost layer of printed board 30
A is directed upward, the pattern forming portion LA of the lowermost printed circuit board member 10 of the printed circuit board 40 is directed downward, and the printed circuit boards 30 and 40 are laminated via a prepreg PP. Thereafter, it was baked and cured at 120 ° C. to 130 ° C. for 5 minutes to 10 minutes.

【0021】次にプリント基板に孔明、メッキの処理を
行う。図13に示すようにプリント基板1の所定の位置
に貫通孔TH11を穿孔する。その後にプリント基板1
をメッキ槽に浸して電解メッキする。従ってプリント基
板1の表裏と貫通孔TH11の内壁にもメッキ層M11
が形成される。従ってスルーホールTH11が形成され
る。
Next, the printed circuit board is subjected to perforation and plating. As shown in FIG. 13, a through hole TH11 is formed at a predetermined position on the printed circuit board 1. After that, the printed circuit board 1
Is immersed in a plating tank to perform electrolytic plating. Therefore, the plating layer M11 is also formed on the front and back of the printed circuit board 1 and the inner wall of the through hole TH11.
Is formed. Therefore, a through hole TH11 is formed.

【0022】続いてプリント基板に導体層を露出させる
処理を行う。図14に開示するようにプリント基板1の
表裏のメッキ層11、メッキ層10と導電マスク体2の
導電層22をエッチング処理にて剥離する。従って、プ
リント基板1の表裏に導電体マスク2の樹脂層21が露
出する。更にプリント基板に樹脂層を除去する処理を行
う。図15のようにプリント基板1の表裏の導電体マス
ク2の樹脂層21を塩酸等で膨潤処理して剥離する。
Subsequently, a process for exposing the conductive layer on the printed circuit board is performed. As disclosed in FIG. 14, the plating layers 11, the plating layers 10 on the front and back surfaces of the printed circuit board 1 and the conductive layer 22 of the conductive mask body 2 are separated by etching. Therefore, the resin layer 21 of the conductor mask 2 is exposed on the front and back of the printed circuit board 1. Further, a process of removing the resin layer from the printed circuit board is performed. As shown in FIG. 15, the resin layer 21 of the conductor mask 2 on the front and back of the printed circuit board 1 is swelled with hydrochloric acid or the like and peeled off.

【0023】次にメッキの接着強度を増すために補強メ
ッキを行う。特にスルーホールの角部のメッキ剥がれを
防止するためのものであって、この補強メッキは必要に
応じて随時行えばよい。結果として、プリント基板1の
表裏にはパターン形成部LAが存在するだけとなる。し
かし図15には説明を理解し易くする上で補強メッキ層
M12を記載している。
Next, reinforcing plating is performed to increase the bonding strength of the plating. In particular, this is for preventing the peeling of the plating at the corners of the through holes, and this reinforcing plating may be performed as needed. As a result, only the pattern forming portion LA exists on the front and back of the printed circuit board 1. However, FIG. 15 shows the reinforcing plating layer M12 for easy understanding of the description.

【0024】最後にプリント基板にパターン形成する処
理を行う。図16に図示するのは従来技術1と同様にプ
リント基板1の表裏面上にエッチングレジストをスクリ
ーン印刷法を用いて塗布する。その後、エッチングレジ
ストを露光・現像し導体層COをエッチング処理する。
その後エッチングレジストを除去して図16の如きパタ
ーンを得る。その後プリント基板1のスルーホールTH
11内のマスクMKを除去する。
Finally, a process for forming a pattern on the printed circuit board is performed. As shown in FIG. 16, an etching resist is applied on the front and back surfaces of the printed circuit board 1 by using a screen printing method as in the prior art 1. After that, the etching resist is exposed and developed, and the conductor layer CO is etched.
Thereafter, the etching resist is removed to obtain a pattern as shown in FIG. After that, the through hole TH of the printed circuit board 1
The mask MK in 11 is removed.

【0025】[0025]

【発明の効果】以上説明したとおり、本発明のような製
造方法で作られたプリント基板は、スルーホール内面に
均一な厚みのメッキを形成してもパターン形成する導体
層を厚くすることもない、従ってサイドエッチングがな
いフアインピッチのパターンを得ることができる。
As described above, the printed circuit board manufactured by the manufacturing method according to the present invention does not increase the thickness of the conductor layer for pattern formation even if plating of uniform thickness is formed on the inner surface of the through hole. Therefore, a fine pitch pattern without side etching can be obtained.

【図面の簡単な説明】[Brief description of the drawings]

【図1】 本発明に係るプリント基板の孔開工程の説
明図、
FIG. 1 is an explanatory diagram of a hole forming step of a printed circuit board according to the present invention,

【図2】 本発明に係るプリント基板のメッキ工程の
説明図、
FIG. 2 is an explanatory view of a plating step of a printed circuit board according to the present invention,

【図3】 本発明に係るプリント基板の孔埋め工程の
説明図、
FIG. 3 is an explanatory view of a hole filling step of a printed board according to the present invention;

【図4】 本発明に係るプリント基板の導体層を露出
する工程の説明図、
FIG. 4 is an explanatory view of a step of exposing a conductor layer of a printed board according to the present invention,

【図5】 本発明に係るプリント基板のパターン形成
工程の説明図、
FIG. 5 is an explanatory view of a printed circuit board pattern forming step according to the present invention;

【図6】 本発明に係るプリント基板のマスク除去工
程の説明図、
FIG. 6 is an explanatory diagram of a mask removing step of a printed circuit board according to the present invention;

【図7】 プリント基板用のプリント板部材の説明
図、
FIG. 7 is an explanatory view of a printed board member for a printed board;

【図8】 プリント基板用のプリント板部材の説明
図、
FIG. 8 is an explanatory view of a printed board member for a printed board;

【図9】 本発明に係るプリント板の積層工程の説明
図、
FIG. 9 is an explanatory view of a printed board laminating step according to the present invention;

【図10】 本発明に係るプリント板の孔開、メッキ工
程の説明図、
FIG. 10 is an explanatory view of a hole forming and plating step of a printed board according to the present invention;

【図11】 本発明に係るプリント板の孔埋め工程の説
明図、
FIG. 11 is an explanatory view of a hole filling step of a printed board according to the present invention,

【図12】 本発明に係るプリント基板の積層工程の説
明図、
FIG. 12 is an explanatory view of a step of laminating a printed circuit board according to the present invention,

【図13】 本発明に係るプリント基板の孔開、メッキ
工程の説明図、
FIG. 13 is an explanatory diagram of a hole forming and plating step of a printed circuit board according to the present invention,

【図14】 本発明に係るプリント基板の導体層を露出
する工程の説明図、
FIG. 14 is an explanatory view of a step of exposing a conductor layer of a printed board according to the present invention;

【図15】 本発明に係るプリント基板の樹脂層除去工
程の説明図、
FIG. 15 is an explanatory view of a resin layer removing step of a printed board according to the present invention;

【図16】 本発明に係るプリント基板のパターン形成
工程の説明図、
FIG. 16 is an explanatory view of a printed circuit board pattern forming step according to the present invention;

【図17】 従来のプリント基板の孔開け工程の説明
図、
FIG. 17 is an explanatory view of a conventional process of forming a hole in a printed circuit board;

【図18】 従来のプリント基板のメッキ工程の説明
図、
FIG. 18 is an explanatory view of a conventional printed circuit board plating process,

【図19】 従来のプリント基板の孔埋め工程の説明
図、
FIG. 19 is an explanatory view of a conventional printed circuit board hole filling step,

【図20】 従来のプリント基板のパターン形成工程の
説明図、
FIG. 20 is an explanatory view of a conventional printed circuit board pattern forming process;

【図21】 従来のプリント基板のマスク除去工程の説
明図である。
FIG. 21 is an explanatory diagram of a conventional mask removal process for a printed circuit board.

【符号の説明】[Explanation of symbols]

1 プリント基板 2 導体マスク体 21 接着部 22 導電層 3 プリント板 4 プリント板 5 プリント板部材 10 プリント板部材 30 プリント板 40 プリント板 PP 接着材 MK マスク TH10 スルーホール CP 銅箔 M1 メッキ層 M11 メッキ層 M12 補強メッキ層 LD パータン LA パータン形成部 DESCRIPTION OF SYMBOLS 1 Printed board 2 Conductive mask body 21 Adhesion part 22 Conductive layer 3 Printed board 4 Printed board 5 Printed board member 10 Printed board member 30 Printed board 40 Printed board PP adhesive MK Mask TH10 Through hole CP Copper foil M1 Plating layer M11 Plating layer M12 Reinforcement plating layer LD pattern LA Pattern forming part

───────────────────────────────────────────────────── フロントページの続き (72)発明者 山本 桂三 神奈川県川崎市中原区上小田中4丁目1番 1号 富士通株式会社内 (72)発明者 前原 靖友 神奈川県川崎市中原区上小田中4丁目1番 1号 富士通株式会社内 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Keizo Yamamoto, Inventor 4-1-1, Uedanaka, Nakahara-ku, Kawasaki-shi, Kanagawa Prefecture Inside Fujitsu Limited (72) Inventor Yasutomo Maehara 4-chome, Ueodanaka, Nakahara-ku, Kawasaki-shi, Kanagawa Prefecture No. 1 in Fujitsu Limited

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 両面に導体層を有するプリント基板の少
なくとも一方の導体層上に当該導体層の材料とは異なる
材料から成るメッキバリヤ層を積層する工程と、 プリント基板に貫通孔を形成する工程と、 前記メッキバリヤ層の表面を含めて前記貫通孔の内面に
メッキ層を設けてスルーホールを形成する工程と、 前記スルーホールにマスク材を充填する工程と、 前記メッキバリヤ層を除去して前記導体層を露出させる
工程と、 前記露出した導体層に対して所定のパターンを形成する
工程を含んでなることを特徴とするプリント基板の製造
方法。
1. A step of laminating a plating barrier layer made of a material different from a material of a conductive layer on at least one conductive layer of a printed circuit board having a conductive layer on both sides, and a step of forming a through hole in the printed board. Providing a plating layer on the inner surface of the through hole including the surface of the plating barrier layer to form a through hole; filling the through hole with a mask material; removing the plating barrier layer to form the conductor layer And a step of forming a predetermined pattern on the exposed conductor layer.
JP32722996A 1996-12-06 1996-12-06 Production of printed board Pending JPH10173337A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP32722996A JPH10173337A (en) 1996-12-06 1996-12-06 Production of printed board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP32722996A JPH10173337A (en) 1996-12-06 1996-12-06 Production of printed board

Publications (1)

Publication Number Publication Date
JPH10173337A true JPH10173337A (en) 1998-06-26

Family

ID=18196768

Family Applications (1)

Application Number Title Priority Date Filing Date
JP32722996A Pending JPH10173337A (en) 1996-12-06 1996-12-06 Production of printed board

Country Status (1)

Country Link
JP (1) JPH10173337A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6233819B1 (en) * 1999-01-21 2001-05-22 Yamaha Corporation Fine-pitch electrode, process for producing the same, and fine-pitch electrode unit
JP2002271023A (en) * 2001-03-12 2002-09-20 Daiwa Kogyo:Kk Method for forming columnar metal body and manufacturing method for multi-layer wiring board
US7516545B2 (en) 2005-12-14 2009-04-14 Samsung Electro-Mechanics Co., Ltd. Method of manufacturing printed circuit board having landless via hole
KR101019150B1 (en) * 2008-06-30 2011-03-04 삼성전기주식회사 Manufacturing method of printed circuit board having via-on-pad structure
WO2012117533A1 (en) * 2011-03-02 2012-09-07 株式会社メイコー Through-hole plating method and substrate manufactured using same
JP2015018900A (en) * 2013-07-10 2015-01-29 富士通株式会社 Circuit board manufacturing method, circuit board and electronic apparatus

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6233819B1 (en) * 1999-01-21 2001-05-22 Yamaha Corporation Fine-pitch electrode, process for producing the same, and fine-pitch electrode unit
JP2002271023A (en) * 2001-03-12 2002-09-20 Daiwa Kogyo:Kk Method for forming columnar metal body and manufacturing method for multi-layer wiring board
US7516545B2 (en) 2005-12-14 2009-04-14 Samsung Electro-Mechanics Co., Ltd. Method of manufacturing printed circuit board having landless via hole
KR101019150B1 (en) * 2008-06-30 2011-03-04 삼성전기주식회사 Manufacturing method of printed circuit board having via-on-pad structure
US8187479B2 (en) 2008-06-30 2012-05-29 Samsung Electro-Mechanics Co., Ltd. Manufacturing method of printed circuit board
WO2012117533A1 (en) * 2011-03-02 2012-09-07 株式会社メイコー Through-hole plating method and substrate manufactured using same
CN103403228A (en) * 2011-03-02 2013-11-20 名幸电子有限公司 Through-hole plating method and substrate manufactured using same
KR101475474B1 (en) * 2011-03-02 2014-12-23 메이코 일렉트로닉스 컴파니 리미티드 Through-hole plating method and substrate manufactured using same
JP2015018900A (en) * 2013-07-10 2015-01-29 富士通株式会社 Circuit board manufacturing method, circuit board and electronic apparatus

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