JPH10171645A - Information processor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To correct and change en bloc the functions which are compositely provided by both hardware and software by changing the set information held by a set information holding means based on the received change information. SOLUTION: A set information holding means 111 consists of a rewritable storage element and holds the set information on the connection between logical elements included in a programmable gate array. A setting means 112 sets an internal connection state of the programmable gate array in response to the application of the power supply of an information processor and based on the information held by the means 111. A change information input means 113 receives input of the change information on the set information. A set information change means 114 changes the set information held by the means 111 based on the change information. Thus, the means 114 operates based on the change information that is inputted via the means 113. As a result, the set information held by the means 111 is changed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] The present invention relates to an FPGA (Field Programmable Gate Arrangement) in which at least a part of hardware is used.
rey), and relates to an information processing apparatus for modifying and changing hardware and software. In recent years, information processing devices have become more sophisticated and more complex in accordance with the diversification of users and applications of the information processing devices, but there has been a need to significantly shorten the development period and significantly reduce development and maintenance costs. ing. In some cases, after the information processing device is delivered to the user side, changes such as addition or expansion of functions are required.Therefore, a technology that can flexibly change and modify various functions of the information processing device is required. Have been.

[0002]

2. Description of the Related Art A general information processing apparatus is realized by fixed hardware and software including firmware for operating a logical function provided by the hardware.

[0003] Hardware constituting an information processing apparatus is as follows.
In many cases, logic elements such as LSIs are arranged on a printed circuit board and fixedly connected to each other. When high-speed operation of hardware is regarded as important, the design of the printed circuit board requires an Optimization processing including adjustment is performed. In this way, instead of arranging various logic elements such as gate circuits and multiplexers on a printed circuit board and connecting them together, instead of configuring combinational circuits and sequential circuits, realizing equivalent logic circuits using FPGAs Is also possible.

In this case, configuration information is created in accordance with a logic circuit to be realized, and this configuration information is stored in a ROM or the like, and the
By setting the connection between the logic elements prepared in the GA, the design work of the printed circuit board can be greatly simplified. FIG. 4 shows a configuration example of a conventional information processing apparatus including an FPGA.

[0005] In FIG. 4, configuration information is stored in a ROM 401.
The download control unit 403 stores the configuration information in the ROM 40 in response to a download instruction from the
1 and input to the FPGA 404, the connection relationship between the logic elements inside the FPGA is set, and the logic circuit corresponding to the configuration information is reconfigured.

The hard disk drive 405 has F
Firmware for operating the logic circuit constituted by the PGA 404 is stored therein, and the CPU 402
The disk control unit 406 responds to the instruction from the
07, the firmware is developed and provided for processing by the CPU 402. In such a conventional information processing device, when modifying or changing a function,
The firmware and the hardware are modified according to whether the target function is provided by the operation of the hardware or the hardware itself.

Therefore, for example, when a function provided by both firmware and hardware in combination, such as an interrupt control function, is to be modified / changed, the firmware and hardware are It is necessary to modify and change both of them. For example, the timer control unit 411 shown in FIG.
In the case where one of the interrupt signals from the control unit 412 and the RS232C control unit 413 is selected according to the priority order and provided to the processing of the interrupt control unit 414 operating according to the firmware, the priority order of the interrupt processing is determined. In order to change the firmware, it is necessary to modify and change both the configuration information and the firmware of the FPGA 404.

[0008] Hardware modification / change work involves changing the connection on the printed circuit board with a jumper wire or the like.
RO that stores FPGA configuration information
This is done by exchanging the M. Basically, the operation of the information processing device needs to be stopped, and the information processing installed at the delivery destination is collected and the correction / change work is performed. There are many.

On the other hand, in the firmware modification / change work, a patch file relating to the modified / changed part is stored in a floppy disk or the like, and the CPU 402
Is performed by reading a patch file from the floppy disk via the floppy disk device 408 and adding it to the firmware file of the hard disk device 405 via the disk control unit 406.

[0010]

Conventionally, basically,
It is assumed that the hardware will not be changed after the delivery of the information processing device. For this reason, when some functions of the hardware are realized using the FPGA, it is possible to modify or change the functions provided by the hardware by changing the configuration information. However, the configuration information is fixed, and the original flexibility of the FPGA is not utilized.

This is in contrast to software which is supposed to be modified / changed, including version upgrade, after delivery. However, when modifying and changing the functions of the information processing device provided in a combination of hardware and software, if the hardware and software were modified and changed in separate ways, the modification and modification work would not be possible. It takes time, the burden on the maintenance worker is large, and the maintenance cost increases.

On the other hand, with the advancement of the functions of the information processing apparatus, the functions provided in combination by hardware and software are increasing and their importance is increasing. There is a demand for a technology that can be modified and changed. An object of the present invention is to provide an information processing apparatus capable of collectively correcting and changing functions provided by hardware and software in a combined manner.

[0013]

FIG. 1 is a block diagram showing the principle of an information processing apparatus according to the present invention. According to the first aspect of the present invention, in an information processing apparatus in which at least a part of hardware is constituted by a programmable gate array, setting information relating to connection between logic elements inside the programmable gate array is constituted by rewritable storage elements A setting information holding unit 111 for holding the setting information, a setting unit 112 for setting a connection state inside the programmable gate array according to the setting information in the setting information holding unit 111 in response to turning on of the information processing apparatus, Change information input means 113 for receiving input of change information relating to change of setting information
And setting information changing means 114 for changing the setting information in the setting information holding means 111 according to the change information.

According to the present invention, according to the change information input through the change information input means 113, the setting information changing means 11
4 operates, the setting information in the setting information holding unit 111 can be changed. That is, according to the present invention, the setting information of the programmable gate array can be changed in the same manner as the patch processing of the firmware.
2 operates, the changed setting information is reflected as the connection state of the logic elements on the programmable gate array, so that the firmware and the hardware constituted by the programmable gate array are collectively corrected and changed. It is possible to

[0015]

Embodiments of the present invention will be described below in detail with reference to the drawings. FIG. 2 shows an embodiment of the information processing apparatus of the present invention. The information processing apparatus shown in FIG. 2 uses an EEPROM instead of the ROM 401 shown in FIG.
M and a hard disk drive 405.
Then, the configuration information is stored together with the firmware.

The above-described write processing unit 202
2, the configuration information is read from the hard disk device 405 via the disk control unit 406, and the configuration information is written to the nonvolatile storage unit 201 corresponding to the setting information holding unit 111. Also, in response to the release of the reset state by the CPU 402, the download control unit 403
Operates as the setting unit 112, and the nonvolatile storage unit 2
01 to the FPGA 404
, So that the FPGA 4
Each logic element in 04 is connected according to the above-mentioned configuration information.

Hereinafter, a method of changing the priority in the interrupt control function will be described as an example of correcting and changing the function provided by the firmware and the hardware formed by the FPGA 404. FIG. 3 is a flowchart showing the operation of the information processing apparatus to which the present invention is applied.
Prior to the operation of the information processing apparatus, a patch file for correcting the operation of the interrupt control unit 414 is created and stored on a floppy disk or the like.
With the combinational circuit formed by 404, it is necessary to create configuration information for selecting an interrupt signal according to a new priority, and similarly store it on a floppy disk or the like.

If the maintenance worker has inserted the above-mentioned floppy disk into the floppy disk device 408 and instructed to carry out a process of modifying / changing the function of the information processing device, an affirmative determination is made in step 301, and In response, CPU 402 resets download control unit 403 (step 302). Next, CPU4
In step 02, the patch file is read from the floppy disk via the floppy disk device 408 (step 303), and the firmware in the hard disk device 405 is modified using the patch file via the disk control unit 406 (step 304). .

Thereafter, the CPU 402 reads configuration information (abbreviated as CONFIG. Information in FIG. 3) from a floppy disk (abbreviated as FD in FIG. 3) via the floppy disk device 408 (step 305). ), Disk control unit 4
Then, the configuration information in the hard disk device (HD in FIG. 3) 405 may be rewritten (step 306), and the modification / change processing may be terminated.

As described above, during the maintenance work, the CPU 40
2 according to the instruction from the floppy disk drive 40
8, disk control unit 406 and hard disk device 4
05 operates to change the configuration information in the hard disk device 405, thereby realizing the function of the change information input means 113, and accepting the change information including the patch file and the configuration information stored in the floppy disk. Becomes possible.

Thus, the hard disk drive 40
After the correction of the firmware and the configuration information in 5 has been completed, the above-mentioned floppy disk is removed by the maintenance worker, and a normal start-up operation is instructed. First, the CPU 402 may read the configuration information in the hard disk 405 via the disk control unit 406 (Step 307), and use it for the processing of the write processing unit 202.

In response, the write processing unit 202 rewrites the configuration information in the nonvolatile storage unit 201 using the configuration information received in step 307 (step 308), and responds to the completion of the rewrite processing. Then, the CPU 402 may release the reset (step 309), terminate the startup process, and start a normal operation.

At this time, if the configuration information in the hard disk device 405 and the configuration information in the nonvolatile storage unit 201 are the same, there is no need to rewrite the nonvolatile storage unit 201. As described above, at the time of the normal start-up operation, the write processing unit 202 operates according to the instruction from the CPU 402, and stores the configuration information rewritten at the time of the above-described maintenance work in the nonvolatile storage unit 201. By writing, the function of the setting information changing unit 114 is realized, and new configuration information can be provided to the processing of the download control unit 403.

In this case, similarly to the modification / change operation of the firmware, the combination information formed by the FPGA 404 is modified / changed by modifying / changing the configuration information stored in the hard disk device 405, and the combination is modified. The priority when selecting the interrupt signal can be changed by the circuit.

Thus, the maintenance worker can perform the modification / change work of the firmware and the modification / change work of the hardware realized by the FPGA at a time, thereby greatly reducing the work load of the maintenance worker. It is possible to reduce the time and cost required for maintenance of the information processing apparatus. In addition, since the functions of the hardware realized by the FPGA can be modified and changed after the delivery of the information processing device in this manner, it is possible to flexibly cope with a change in specifications that occur after the delivery. So you can
It is also possible to improve the service for the user of the information processing device.

Note that the present invention can be applied to an FPGA having a download control unit therein. In this case, the download control unit in the FPGA may download the configuration information stored in the nonvolatile storage unit 201 in response to the release of the reset.

[0027]

As described above, according to the present invention, the setting information of the programmable gate array can be changed in the same manner as the firmware patch processing. The hardware modification and change work realized by the gate array can be performed collectively, greatly reducing the workload of maintenance workers and reducing the time and cost required for maintenance of information processing equipment can do.

[Brief description of the drawings]

FIG. 1 is a principle block diagram of an information processing apparatus according to the present invention.

FIG. 2 is a diagram showing an embodiment of the information processing apparatus of the present invention.

FIG. 3 is a flowchart illustrating an operation of the information processing apparatus to which the present invention is applied.

FIG. 4 is a diagram illustrating a configuration example of a conventional information processing apparatus including an FPGA.

[Explanation of symbols]

 111 setting information holding means 112 setting means 113 change information input means 114 setting information changing means 201 nonvolatile storage unit 202 write processing unit 401 ROM 402 CPU 403 download control unit 404 FPGA 405 hard disk device 406 disk control unit 407 memory 408 floppy disk Device 411 Timer control unit 412 LAN control unit 413 RS232C control unit 414 Interrupt control unit

Claims (1)

[Claims] 1. An information processing apparatus in which at least a part of hardware is constituted by a programmable gate array, wherein the information processing apparatus is constituted by a rewritable storage element, and sets information on connection between logic elements inside the programmable gate array. Setting information holding means to be held; setting means for setting a connection state inside the programmable gate array in accordance with setting information in the setting information holding means in response to power-on of the information processing apparatus; An information processing apparatus comprising: change information input means for receiving input of change information relating to change of setting information; and setting information changing means for changing setting information in the setting information holding means according to the change information. .