JPH10164601A - Input signal discriminating device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a concise input signal discriminating device which discriminates the reception of, for example, NTSC broadcast and EDTV-II broadcast from each other. SOLUTION: The radio waves broadcast through a channel designated from a microcomputer 13 are received by means of an antenna 11 and a tuner 12 and outputted to a video signal processing circuit 15 and a synchronizing signal generating circuit 16 and I-, Q-, and Y-signals are inputted to linear filters 20-22. The filters 20 and 21 update and hold the integrated value of discrimination control signals from the generating circuit 16 in each bit period and output the integrated values to the microcomputer 13. The Y-output of the processing circuit 14 is inputted to a 4/7-fsc band-pass filter 23 and the absolute value output of an absolute value circuit 24 is also inputted to the microcomputer 13 through a low-pass filter 25. The microcomputer 13 discriminates the reception of, for example, EDTV-II by using the result of low-speed matrix conversion on the input data.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an input signal discriminating apparatus for discriminating, for example, an EDTV-II signal from an input signal to a television receiver or the like.

[0002]

2. Description of the Related Art In a television receiver, the aspect ratio of the display surface is 4: 4 in current television broadcasting.
3, but a wider aspect ratio of 1
Widescreen television receivers with a 6: 9 ratio are on the market. Further, EDTV-II broadcasting has been started, and receivers for receiving the EDTV-II broadcasting have been developed.

[0003] The EDTV-II broadcast is a broadcast in which a picture of a screen having an aspect ratio of 16: 9 is transmitted in a letterbox system, and horizontal and vertical auxiliary signals are multiplexed on a main surface portion and upper and lower non-image portions. You. In this case, compatibility is taken into consideration so that a current television receiver can also receive the signal. In the EDTV-II broadcast, a signal called an identification control signal is carried on 22H and 258H.

The identification control signal includes a color subcarrier cycle S
A 27-bit area called B1 to B27 is set with a time width seven times C. Here, B1 to B5 and B24
Is an NRZ waveform representing "1" and "0" at a direct current (DC) level. In B6 to B23, a chrominance subcarrier frequency having an amplitude of ± 20 IRE is provided, and the phase of the color burst signal is "0" and the opposite phase. Represents "1". Also, B25-27
Is called a confirmation signal, and a frequency that is 4/7 times the chrominance subcarrier frequency is applied. Therefore, if this identification control signal can be detected, it can be distinguished from NTSC broadcasting. By decoding the identification command (shown in Table 1) in the identification control signal, it is possible to know the presence / absence of a reinforcement signal and the like. Can be.

[0005]

[Table 1]

* 1 Signal without upper / lower screen (4: 3 NTSC
Or squeeze signal) * 2 Even parity for B3 and B5 * 3 Reserved for future expansion. The output is "0". * 4 It is optional to use or not use as a field signal. However, when not used, it is always "0". * 5 Frame A and Frame B at the EDTV-II end. * 6 In the case of broadcasting with an aspect ratio of 4: 3, the augmentation signal is not multiplexed, and B8 to B10 are set to "0". * 7 Undefined for the time being, but reserved for squeeze display. At the time of squeeze display, "1" is set. * 8 Assigned to broadcast station operation bits. * 9 Will not be used for expansion in the future. Then, it is set to “0” when it is sent to an external system. * 10 Undefined, but assumes “still image film mode display” in the future. Investigate the usefulness at related organizations. (Note) In the BTA, B12, B13, and B14 have been arranged as follows when operating at broadcasting stations.

[0007]

[Table 2]

FIG. 8 shows an example of a signal discriminating apparatus for discriminating an input signal used in a conventional television receiver. A television broadcast wave received by an antenna 50 is designated by a user, for example, by a microcomputer 51. The selected channel is selected, and the tuner 52 is controlled by the microcomputer 51. The tuner 52 converts the selected broadcast radio wave into an intermediate frequency and outputs the intermediate frequency to the video detection circuit 53.The tuner 52 converts the signal converted into the intermediate frequency into a video signal, and converts the composite video signal into a video signal processing circuit 54. And synchronization signal generation circuit 55
To supply.

The video signal processing circuit 54 is supplied with clocks such as a vertical synchronizing signal fv, a horizontal synchronizing signal fh, and a signal fsc synchronized with the color subcarrier from the synchronizing signal generating circuit 55. Fourth frequency (4fsc) of fsc synchronized with the input composite video signal
A / D conversion is performed at a sampling rate of Then, video signal processing such as separation into a luminance signal Y and color signals I and Q and color demodulation is performed, and a 4 fsc
Output at the sampling rate.

The color signal output circuit 56 converts the signal into an analog primary color signal suitable for the CRT 57 and outputs the signal. The deflection coil of the cathode ray tube 57 is supplied with a deflection signal from a deflection circuit 58. The deflection circuit 58 receives a vertical synchronization signal fv and a horizontal synchronization signal fv from a synchronization signal generation circuit 55.
In response to the supply of h, the deflection control of the cathode ray tube 57 is performed.

In addition to the basic configuration of such a television receiver, there is further provided, for example, means for detecting broadcast radio waves by EDTV-II. That is, the video signal processing circuit
The luminance signal Y and the chrominance signal I from 54 are input to the matrix circuit 59 at a sampling rate of 4 fsc, and the phase of the matrix circuit 59 is delayed by 33 ° from the Q axis by the clock 4 fsc input from the synchronizing signal generation circuit 55. It is converted to the level of the BY axis.

The matrix coefficient of the matrix circuit 59 is (a, b), the color signal I input is E (I), and the color signal Q
If the input is E (Q), the output E of the matrix circuit 59
(BY) is represented by the following equation.

[0013]

(Equation 1)

The output E (B-
Y) is input to a linear low-pass filter (LPF) 60, which removes high-frequency components by this filter 60 and outputs it to a detection circuit 61. The video signal processing circuit 54
Is supplied to a low-pass filter 62, and a direct current (DC) component in a discrimination control signal period is obtained.
Is input to

The Y output from the video signal processing circuit 54 is 4 /
The signal is input to a 7 fsc band-pass filter (BPF) 63, which passes only the 4/7 fsc component, takes an absolute value in an absolute value circuit 64, and removes a high-frequency component by a low-pass filter 65. Then, the DC component is supplied to the detection circuit 61.

In the detection circuit 61, when the output from the filter 60 is positive when the output from the filter 60 is positive when the identification control signals B6 to B23 are input, the corresponding command can be decoded to "1". When the value is negative, it indicates that the decoding was successful. If the absolute value of this input is within the expected level range, it can be detected that a normal discrimination control signal has been input for the fsc component.

In the output from the filter 62, when the discrimination control signals B1 to B5 are inputted, it indicates that the decoding value can be decoded to "1" if the input value is 20 IRE or more, and "0" if the input value is less than 20 IRE. Indicates that decoding was successful. In the output from the filter 65, when the identification control signal B25 to B27 is input, if the value is within the expected level range, it indicates that the identification signal is detected as "present".

As described above, the detection circuit 61 makes a comprehensive judgment based on each input, and the video signal currently received is, for example, an ED.
This is for detecting and determining whether or not it is TV-II, and outputs the detection result to the microcomputer 51. The microcomputer 51 determines that the DETV-II signal has been detected stably if the field signal, which is the detection result of the EDTV-II signal, continuously exceeds a predetermined value. The setting state of the deflection circuit 58 is controlled so that the image area is displayed on the entire 16: 9 screen.

As described above, for example, reception of a broadcast wave signal of the EDTV-II can be detected. However, in order to add such an EDTV-II detection function, a frequency band other than the band limiting filter is used. It is necessary to set a matrix circuit operating at 4 fsc and further a detection circuit,
The configuration becomes complicated.

[0020]

SUMMARY OF THE INVENTION The present invention has been made in view of the above points, and makes effective use of the existence of a video signal which has been color-demodulated on the color component axis, and uses another color component axis. A function capable of discriminating the type of the input signal using the magnitude of the component is set. For example, the EDTV-II
An object of the present invention is to provide an input signal discriminating apparatus which can discriminate reception of a broadcast.

[0021]

A signal discriminating apparatus according to the present invention receives a video signal demodulated and sampled on the axis of a first color signal component and outputs the video signal at a cycle longer than the sampling cycle of the input video signal. The image processing apparatus further includes a linear filter. The color signal is converted into a second color signal component by a color signal converter based on an output from the filter, and the type of the input video signal is determined from the output and a predetermined value.

In such a signal discriminating device, a linear filter means is arranged in front of the color signal converting means provided for signal discrimination, and the data rate of an input signal to the color signal converting means is low. Is done. Therefore,
This color signal conversion means can be configured to operate at a low speed, and can be put to practical use more simply.

[0023]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the accompanying drawings. FIG. 1 shows the configuration, in which a television broadcast wave received by an antenna 11 is input to a tuner 12, which controls the tuner 12 to select a channel specified by a user according to a command from a microcomputer 13. Is done. The tuner 12 converts the selected and received broadcast radio wave into an intermediate frequency, detects the signal converted into the intermediate frequency with a detection circuit 14, performs video detection on the obtained composite video signal, a video signal processing circuit 15, and a synchronization signal. It is supplied to the generation circuit 16.

The video signal processing circuit 15 is supplied with clocks such as a vertical synchronizing signal fv, a horizontal synchronizing signal fh, and a signal fsc of a signal synchronized with the color subcarrier from the synchronizing signal generating circuit 16 and receives a composite signal. The video signal is A / D-converted at a sampling rate of a frequency four times fsc (4 fsc) synchronized with the video signal. Then, the luminance signal Y and the color signal I
Video signal processing such as separation and color demodulation into Q and Q,
The color signal component is output to the color signal output circuit 17 at a sampling rate of 4 fsc.

The color signal output circuit 17 converts the signal into an analog primary color signal suitable for the CRT 18 and outputs the signal. A deflection signal is supplied from a deflection circuit 19 to the deflection coil of the cathode ray tube 18, and the deflection circuit 19 receives a vertical synchronization signal fv and a horizontal synchronization signal fh from a synchronization signal generation circuit 16 to control the deflection of the cathode ray tube 18. Will be

The I output from the video signal processing circuit 15 is supplied to a linear filter 20. The linear filter 20 has a start pulse and an end pulse for each bit period of the identification control signal from the synchronization signal generation circuit 16. Is supplied.

FIG. 2 shows an example of the operation of the linear filter 20. Consider a case where, for example, an identification control signal at 22H and 285H of the EDTV-II is input as a video signal (A). It is cleared by the start pulse of the bit period as shown in (B) and (E), and the input value of each bit period is cumulatively added at every pulse of 4fsc clock (D). The integrated value of 28 samples in each bit period is updated, held, and output by the end pulse of the indicated bit period.

Similarly, the Q output from the video signal processing circuit 15 is input to the linear filter 21. This linear filter 21
It receives the start pulse and the end pulse of each bit period of the identification control signal from the synchronization signal generation circuit 16, and performs the same operation as that described with reference to FIG. That is, (B) and (E)
Is cleared by the start pulse of the bit period as shown in FIG.
, And the end pulse of the bit period shown in each of (C) and (G) is used to update, hold, and output the integrated value of 28 samples in each bit period.

Here, the value of the data of one component of the first sample in the bit period of Bn (n is an integer of 1 ≦ n ≦ 27) is IBn (i), and the value of the data of the Q component is QBn (i). Then, the output integrated values are respectively expressed by the following equations.

[0030]

(Equation 2)

The output Y from the video signal processing circuit 15 is supplied to the low-pass filter 22, and the direct current (D) during the discrimination control signal period is output.
Component C) is required. Further, the Y output from the video signal processing circuit 15 is a 4/7 fsc band-pass filter (B
PF) 23, the filter 23 passes only the 4/7 fsc component, takes the absolute value in the absolute value circuit 24, and removes the high frequency component by the low-pass filter 25. Then, outputs from the filters 20 to 22 and 25 are input to the microcomputer 13 which performs a color signal component conversion operation.

Next, the operation of the microcomputer 13 will be described with reference to FIGS. First, in FIG. 3, initialization is performed in step 101, and if other processing is completed in step 102, it is determined in step 103 whether the bit number n currently being processed is larger than 27. If n is larger than 27, the process proceeds to step 104 to detect that the received broadcast wave is EDTV-II. This step 10
After step 4, or when it is determined in step 103 that n is smaller than 27, the flow advances to step 105 to determine whether or not a vertical (V) blanking period is present. If the V blanking period is detected in step 105, the contents of the memory n holding the bit number of the identification control signal currently being processed are set to "0" in the next step 106.

When the input video signal becomes 22H or 285H, the same pulse as the bit period end pulse is input from the synchronizing signal generation circuit 16 to the edge trigger interrupt input of the microcomputer 13. In this state, the interrupt routine shown in FIG. 4 is entered from the flow of FIG. 3, and the value of n is incremented in step 111, and then data is fetched in step 112.

The period of one bit of the identification control signal is about 1.
Since this is a relatively long time of 96 μs, the system clock (for example, the sampling clock 4f
Even if the microcomputer operates with a clock that is asynchronous with sc), there is no problem if all data relating to the corresponding bit can be captured during this period.

When such an interrupt is generated 27 times and the data of all the identification control signal bits has been fetched, FIG.
EDTV-II detection subroutine is read out. In this subroutine, the value of n is set to "1" in step 121, and the value of the BY (color signal) component for each discrimination control signal bit is obtained in step 122.
In step 3, the same judgment processing as in the past is performed.

Here, step 122 corresponds to the matrix circuit in the conventional example. Since the matrix conversion operation only needs to be completed during one field period including the subsequent determination processing, there is no problem in the calculation time.

EDTV-II detection processing is performed based on the second color signal component obtained in this manner.
At 123, the value of n is compared with 27. If it is determined that n is greater than 27, the routine proceeds to step 124, where EDTV-II is detected. If it is determined in step 123 that n is smaller than 27, n is set to n + 1 in step 125, and the process returns to step 122.

Here, since the integration is a linear process, the values are equivalent to those obtained by performing a matrix transformation with the data of 4 fsc samples by changing the operation order from the equations (1) and (2) as shown in the following equation.

[0039]

(Equation 3)

In step 106 of FIG. 3, n is set to "0", and the flow advances to step 107 to stably change EDT from the state of NTSC.
It is determined whether or not the display has changed to V-II.
It is determined whether or not the state of -II has been stably changed to NTSC. If it is determined in steps 107 and 108 that each has changed, the flow advances to step 109 to control the deflection, and the processing is executed in step 110.

As described above, since the data rate of the input signal to the color signal conversion means is reduced,
The microcomputer after the color signal conversion means can also be used as a microcomputer, or can be allocated to an idle time for video signal processing mainly processed by a DSP or the like.

FIG. 6 illustrates the second embodiment. The same components as those of the first embodiment shown in FIG. 1 are denoted by the same reference numerals, and the description thereof will be omitted. Then, the video signal processing circuit 15
Are output from the linear filter 31 respectively.
And supply to 32. The start pulse and the end pulse of the burst period from the synchronization signal generation circuit 16 are input to the video signal processing circuit 15.

The operation of the linear filters 31 and 32 will be described with reference to FIG. 7. For the input video signal shown in FIG. Cleared. And
(C) The integrated value of the burst period is updated and held by the end pulse of the burst period shown in the figure, and is output. The output from each of the linear filters 31 and 32 is input to a matrix circuit 33. The matrix circuit 33 receives the integrated I and Q output and converts it to the BY axis level every 1H period.

The conversion output from the matrix circuit 33 is input to the detection circuit 34. If the input value is within a predetermined level range, it is detected that a color burst exists. The detection output from the detection circuit 34 is supplied to the microcomputer 13 to detect its temporal continuity. If it is detected that a color burst exists continuously for a predetermined number of field periods, it is determined that the video signal of the channel currently being received is a color broadcast, and the microcomputer 13 It is assumed that the middle channel is a color broadcast, and an indicator lamp during color broadcast reception (not shown) is turned on.

That is, in this embodiment, the operating frequency of the matrix circuit 34 which constitutes the color signal converting means is lowered, so that the configuration of the input signal discriminating device can be reduced in cost. Can be
A configuration of low-speed operation can be adopted.

[0046]

As described above, according to the signal discriminating apparatus according to the present invention, the data rate of the input signal to the color signal conversion circuit portion is reduced, and therefore, the speed is lower after the color signal conversion means. It is possible to have a configuration that can operate, and it can be configured at low cost,
It is also possible to share, and the cost can be reduced.

[Brief description of the drawings]

FIG. 1 is a circuit configuration diagram for explaining a first example of an embodiment of the present invention.

FIGS. 2A to 2H are signal waveform diagrams for explaining the operation of a linear filter for explaining the embodiment.

FIG. 3 is a flowchart illustrating a basic operation of the microcomputer.

FIG. 4 is a flowchart illustrating an interrupt routine in the operation of the microcomputer.

FIG. 5 is a flowchart illustrating an EDTV-II detection routine.

FIG. 7 is a circuit diagram illustrating a second embodiment of the present invention.

FIG. 8 is a circuit diagram illustrating a conventional input signal determination device.

[Explanation of symbols]

11 antenna, 12 tuner, 13 microcomputer, 14 video detection circuit, 15 video signal processing circuit, 16 synchronization signal generation circuit, 17 color signal output circuit, 18 cathode ray tube, 19 deflection circuit, 21- 22, 23, 25: low-pass filter, 31, 32: linear filter, 24: absolute value circuit, 34: detection circuit.

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[Procedure amendment]

[Submission date] January 17, 1997

[Procedure amendment 1]

[Document name to be amended] Statement

[Correction target item name] Brief description of drawings

[Correction method] Change

[Correction contents]

[Brief description of the drawings]

FIG. 1 is a circuit configuration diagram for explaining a first example of an embodiment of the present invention.

FIGS. 2A to 2H are signal waveform diagrams for explaining the operation of a linear filter for explaining the embodiment.

FIG. 3 is a flowchart illustrating a basic operation of the microcomputer.

FIG. 4 is a flowchart illustrating an interrupt routine in the operation of the microcomputer.

FIG. 5 is a flowchart illustrating an EDTV-II detection routine.

FIG. 6 is a circuit configuration diagram for explaining a second embodiment of the present invention.

FIG. 7 is a view for explaining the operation of the second embodiment of the present invention.

FIG. 8 is a circuit diagram illustrating a conventional input signal determination device.

[Description of Signs] 11 antenna, 12 tuner, 13 microcomputer, 14 video detection circuit, 15 video signal processing circuit, 16 synchronization signal generation circuit, 17 color signal output circuit, 18 cathode ray tube, 19 ... Deflection circuits, 21 to 22, 23, 25: low-pass filters, 31, 32: linear filters, 24: absolute value circuits, 34: detection circuits.

Claims (3)

[Claims] 1. A means for demodulating a received input video signal on the axis of a first color signal component, a signal obtained by sampling the demodulated signal being input, and outputting the signal at a period longer than a sampling period of the signal. Linear filter means; and means for converting to a second color signal component based on the output from the linear filter means. The signal type is determined based on the output of the color signal component conversion means and a predetermined value. An input signal discriminating apparatus characterized in that it is made to be. 2. The EDTV-II according to claim 1, wherein said linear filter means is an EDTV-II.
2. The input signal according to claim 1, wherein the input signal is output to the second color signal conversion means for each bit of the identification command by configuring an integration means for clearing and integrating each identification command bit of the identification control signal. Discriminator. 3. The linear filter means comprises a low-pass filter for a period corresponding to a color burst of an input video signal, and outputs one set of results for the period corresponding to the color burst to determine the presence or absence of a color burst. 2. The input signal discriminating apparatus according to claim 1, wherein: