JPH089342A - High-vision signal receiver - Google Patents

Abstract

PURPOSE:To reduce the cost by giving a motion detection output of a 3-dimension YC separator circuit to a scanning line conversion circuit through a sample rate conversion circuit and a gain conversion circuit so as to reduce the scale of a memory and an LSI. CONSTITUTION:A motion detection output from a 3-dimensional YC separator circuit 6 is inputted to a sample rate conversion circuit 11 in a motion information processing means 10. The motion detection output is restored into an analog signal at once by a D/A converter circuit 13. Then an A/D converter circuit 14 is used to convert the analog signal into a digital signal again and the sample rate is converted by using a separate sample clock of the D/A converter circuit 13 from a conversion clock of the A/D converter circuit 14. Moreover, a field memory circuit 15 is used to correct a deviation caused from a difference of number of scanning lines between a High-Vision signal and an NTSC signal and provides an output of the result. Then a gain conversion circuit 12 converts the gain of the signal and inputs its output to a scanning line conversion circuit 9.

Description

Detailed Description of the Invention

[0001]

The present invention relates to a high-definition signal and N signal.
The present invention relates to a high-definition television receiver capable of receiving both TSC signals.

[0002]

2. Description of the Related Art FIG. 8 is a block diagram showing the structure of a conventional high-definition television receiver. In the figure, 1 is a satellite broadcast receiving tuner (hereinafter referred to as a BS tuner), UHF. V
HF tuner (hereinafter referred to as UV tuner), 3 is a video signal input terminal, 4 is a MUSE decoder, 5 is a selector, 6 is a three-dimensional YC separation circuit, 7 is a video chroma jungle (hereinafter, VCJ), and 8 is an aspect conversion. Circuit, 9 scan line conversion circuit, 16 video switching circuit, 1
Reference numeral 7 is a video amplifier, 18 is a CRT drive circuit, and 19 is a cathode ray tube (hereinafter referred to as CRT).

FIG. 9 is a block diagram showing the structure of the three-dimensional YC separation circuit 6 shown in FIG. In the figure, 20 is an input terminal, 21 is YC separation between frames, 22 is YC separation within a field, 23 is a motion detection circuit, 24 is a mixing circuit,
25 is an output terminal.

FIG. 10 shows a scanning line conversion circuit 9 in FIG.
FIG. 3 is a block diagram showing the configuration of FIG. In the figure, 27 is an input terminal, 29 is a field memory, 30 is a low-pass filter (hereinafter referred to as LPF), 31 is an intra-field scanning line conversion circuit, 32 is an inter-field scanning line conversion circuit, 33.
Is a difference circuit, 34 is a mixing circuit, 35 is an addition circuit, 36 is an enhancer, 37 is an output terminal, 40 is an edge detection circuit,
Reference numeral 41 represents a determination circuit.

Next, the operation will be described. The satellite broadcast received in FIG. 8 is converted into a baseband signal by the BS tuner 1. When the received signal is a high-definition signal, after being decoded by the MUSE decoder 4, the video switching circuit 16 and the video amplifier 17, the CRT
The CRT 19 is driven through the drive circuit 18. On the other hand, terrestrial broadcasting is converted into a baseband signal by the UV tuner 2. One of the signals input from the NTSC system satellite broadcast, terrestrial broadcast, or video signal input terminal 3 is selected by the selector 5 and separated by the three-dimensional YC separation circuit 6 into a luminance signal and a color signal, A luminance signal and a color difference signal are generated by the VCJ7, and the aspect conversion circuit 8
The signal is converted so that the roundness is displayed correctly on the landscape screen. After that, after being converted into a high-definition scanning line by the scanning line conversion circuit 9, an image switching circuit 16
And CR through video amplifier 17 and CRT drive circuit 18.
Drive T19.

Three-dimensional YC in the high-definition receiver of FIG.
The separation circuit 6 is configured as shown in FIG.
The composite video signal input to 0 is YC separation 21 between frames.
Is input to the intra-field YC separation 22 and the motion detection circuit 23. The inter-frame YC separation 21 is a method of performing YC separation by taking a difference for each frame and is suitable for a still image. On the other hand, the in-field YC separation 22 is a method of performing YC separation by taking the difference between lines in the field and is suitable for moving images. Therefore, if the outputs of the inter-frame YC separation 21 and the intra-field YC separation 22 are mixed by the mixing circuit 24 using the output of the motion detection circuit 23, the properly separated luminance signal and chrominance signal can be obtained at the output terminal 25. I can.

Further, the scanning line conversion circuit 9 of FIG. 8 is constructed as shown in FIG. 10, and the signal input from the input terminal 27 is time-axis converted into the high-definition clock rate by the field memory 29, and then the intra-field scanning is performed. The line conversion circuit 31 creates interpolation scanning lines from the preceding and succeeding lines to increase the number of scanning lines. This process is suitable for moving images. LPF3
The inter-field scanning line conversion circuit 32 creates an interpolated scanning line from the preceding and succeeding fields for the low-frequency component of the signal that has passed 0, and this processing is suitable for a still image. Of these outputs, only the low frequency component that has passed through the LPF 30 is mixed by the mixing circuit 34. The high frequency components are extracted by the difference circuit 33, mixed and then added by the addition circuit 35 to be combined. The mixing circuit 34 is controlled by the amount of movement. For the amount of motion, the outputs of the edge detection circuit 40 and the motion detection circuit 23 are determined by the determination circuit 41.
Is used to output only the still image edge portion. The output of the adder circuit 35 is output to the output terminal 37 through the enhancer 36.

[0008]

Since the conventional high-definition television receiver is constructed as described above, it is necessary to have a motion detection circuit in each of the three-dimensional YC separation circuit and the scanning line conversion circuit, and the circuit scale of the LSI is required. However, there is a problem in that the memory capacity increases, the memory requirement increases, and the cost increases.

The present invention has been made to solve the above problems, and by reducing the number of motion detection circuits, the scale of memory and LSI can be reduced to obtain a low-cost HDTV receiver. The purpose is to

[0010]

A high-definition television receiver according to claim 1 of the present invention is a scanning line for converting the NTSC signal into a high-definition signal by adaptively switching between moving image processing and still image processing based on NTSC motion information. Converter circuit and NT
A three-dimensional YC separation circuit that detects motion information using a motion detection unit that detects motion information of an SC composite signal, and adaptively switches between moving image processing and still image processing based on the motion information to separate a luminance signal and a color signal. Then, after re-sampling the motion detection force output from the three-dimensional YC separation circuit by using the D / A conversion circuit and the A / D conversion circuit, time compression is performed by using the field memory circuit to obtain the sample rate. It has a sample rate conversion circuit and a gain conversion circuit for conversion, and
The motion information output from the dimension YC separation circuit is input to the scanning line conversion circuit through the sample rate conversion circuit and the gain conversion circuit.

Further, in the high-definition television receiver according to claim 2 of the present invention, in the sample rate conversion circuit, after inserting 0 data between data, re-sampling is performed by using a low pass filter for limiting the band. This is performed and time compression is performed using a field memory circuit.

An HDTV receiver according to claim 3 of the present invention has a frame memory for delaying the motion information output from the three-dimensional YC separation circuit by one frame, a multiplication means, and an addition means, It has a function of integrating the motion information in the time axis direction.

[0013]

In the HDTV receiver according to the first aspect of the present invention, the motion detection circuit of the three-dimensional YC separation circuit can be shared with the motion detection circuit in the scanning line conversion circuit, so that the number of circuits can be reduced.

Further, in the high-definition television receiver according to claim 2 of the present invention, all circuits can be configured by digital circuits, so that the circuit configuration can be simplified.

Further, in the high-definition television receiver according to the third aspect of the present invention, since the motion detection force can be matched with the scanning line conversion characteristic, an image with less image deterioration due to motion detection omission can be obtained.

[0016]

【Example】

Example 1. First Embodiment FIG. 1 is a block diagram showing a high-definition television receiver according to a first embodiment of the present invention. In the figure, 10 is a motion information processing means, 11 is a sample rate conversion circuit, 1
2 is a gain conversion circuit, 13 is a D / A conversion circuit, and 14 is A /
Reference numeral 15 denotes a D conversion circuit, which is a field memory circuit. Figure 2
2 is a block diagram showing the configuration of the three-dimensional YC separation circuit 6 in FIG. 1, and in the figure, 26 indicates a motion detection force input terminal. FIG. 3 is a block diagram showing the configuration of the scanning line conversion circuit 9 in FIG. 1, and in the figure 28 is a motion detection input terminal. The same reference numerals as those in the conventional example indicate the same or corresponding parts.

Next, the operation will be described. In FIG. 1, it is the same as the conventional example until the signal received by the BS tuner 1 and the UV tuner 2 and the decoded video signal input from the video input terminal 3 are displayed on the CRT 19. In the figure, the motion detection force from the three-dimensional YC separation circuit 6 is input to the sample rate conversion circuit 11 in the motion information processing means 10. Here, the motion detection force is once returned to an analog signal by the D / A conversion circuit 13. After this, the A / D conversion circuit 14
, The digital value is converted to a digital value again. At this time, if the sample clock of the D / A conversion circuit 13 and the conversion clock of the A / D conversion circuit 14 are different, the sample rate conversion can be performed. Further, the field memory circuit 15 corrects the deviation of the signal generated due to the difference in the number of scanning lines between the high-definition signal and the NTSC signal and outputs the corrected signal. After that, the gain conversion circuit 1
The gain is changed at 2 and input to the scanning line conversion circuit 9. In this embodiment, as shown in FIG. 2, the motion detection force input terminal 26 is provided so as to output the motion detection of the three-dimensional YC separation circuit to the outside.
Was set up. Further, as shown in FIG. 3, a portion related to motion detection is deleted from the scanning line conversion circuit, a motion detection input terminal 28 is provided, and the mixing circuit 34 is controlled by the motion detection signal input from the motion detection input terminal 28. Configured to.

Generally, the motion detection force of the three-dimensional YC separation circuit is often synchronized with four times the burst signal in the NTSC signal. On the other hand, the mixed circuit portion in the scan line conversion circuit operates at the high definition rate. Further, there is a difference between the magnitude of the motion detection amplitude used in the three-dimensional YC separation circuit 6 and the magnitude of the motion detection amplitude used in the scanning line conversion circuit 9. Therefore, the motion detection force of the three-dimensional YC separation circuit 6 is converted by the sample rate conversion circuit 11 from the NTSC rate to the high definition rate in the clock frequency and the number of lines.

Example 2. FIG. 4 is a block diagram showing the configuration of a high-definition television receiver according to Embodiment 2 of the present invention,
The digital filter circuit 38 replaces the D / A conversion circuit 13 and the A / D conversion circuit 14 in the sample rate conversion circuit 11 in the first embodiment.

FIG. 5 is a diagram for explaining a processing method in the digital filter circuit 38 in FIG. FIG. 6 is a diagram for explaining another processing method in the digital filter circuit 38 in FIG.

Next, the operation will be described. In FIG. 4, the motion detection force from the three-dimensional YC separation circuit 6 is sample rate converted by the digital filter circuit 38 and the field memory circuit 37, the gain is changed by the gain conversion circuit 12, and is input to the scanning line conversion circuit 9. It

Next, a processing method in the digital filter circuit 38 will be described. As shown in FIG. 5, for the original signal (a), the number of samples is increased by the least common multiple of the clock rate on the input side and the clock rate on the output side, and 0 data is inserted between the original data and the data to insert 0 data. Make (b). After that, interpolation data (c) is obtained digitally through a low-pass filter. Then, only the data at the sampling point of the output clock is thinned out and resampled data (d) is output.

Next, another processing method in the digital filter circuit 38 will be described. As shown in FIG. 6, according to the phase information of the input side clock and the output side clock, the original signal (a)
The average value is interpolated from the resampled data (b).

Example 3. FIG. 7 is a block diagram showing the configuration of a high-definition television receiver according to Embodiment 3 of the present invention.
The time expansion circuit 39 is added before the motion information processing means of the first and second embodiments.

Generally, the three-dimensional YC separation circuit 6 performs arithmetic processing in frame units. Therefore, the motion detection required for the three-dimensional YC separation circuit 6 can satisfy the required performance if the time is expanded in frame units. On the other hand, since the scan line conversion performs the calculation processing between fields, the motion detection omission occurs only by the time expansion of the frame unit, and the place where the moving image processing should be performed is the still image processing. A double image is generated. Therefore, by inserting the time expansion circuit 39 for each field in front of the sample rate conversion circuit 11 and expanding the motion detection force by time, it is possible to prevent the above-mentioned omission of motion detection.

[0026]

According to the high-definition television receiver of the first aspect of the present invention, the motion detection force of the three-dimensional YC separation circuit is input to the scanning line conversion circuit through the sample rate conversion circuit and the gain conversion circuit. Therefore, since the motion detection circuit in the scanning line conversion circuit can be reduced, the scale of the memory and the LSI can be reduced, and a low-cost high-definition television receiver can be configured.

Further, according to the high-definition television receiver of the second aspect of the present invention, in the sample rate conversion circuit,
Since a digital filter circuit is used, all circuits can be configured by digital circuits, so that the circuit configuration is simple and the circuit scale can be reduced.

According to the high-definition television receiver of the third aspect of the present invention, the motion information output from the three-dimensional YC separation circuit is prevented from being missed by the time detection circuit and the image quality is improved.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a high-definition television receiver according to a first embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of a three-dimensional YC separation circuit in FIG.

3 is a block diagram showing a configuration of a scanning line conversion circuit in FIG.

FIG. 4 is a block diagram showing a configuration of a high-definition television receiver according to a second embodiment of the present invention.

5 is a diagram for explaining a processing method in the digital filter circuit in FIG.

6 is a diagram for explaining another processing method in the digital filter circuit in FIG.

FIG. 7 is a block diagram showing a configuration of a high-definition television receiver in Embodiment 3 of the present invention.

FIG. 8 is a block diagram showing a configuration of a conventional high-definition television receiver.

9 is a block diagram showing a configuration of a three-dimensional YC separation circuit in FIG.

10 is a block diagram showing a configuration of a scanning line conversion circuit in FIG.

[Explanation of symbols]

1 BS tuner, 2 UV tuner, 3 video signal input terminal, 4 MUSE decoder, 5 selector, 6
Three-dimensional YC separation circuit, 7 VCJ, 8 aspect conversion circuit, 9 scanning line conversion circuit, 10 motion information processing means,
11 sample rate conversion circuit, 12 gain conversion circuit,
13 D / A conversion circuit, 14 A / D conversion circuit, 15
Field memory circuit, 16 Video switching circuit, 17
Video amplifier, 18 CRT drive circuit, 19 CR
T, 21 YC separation between frames, 22 Y in field
C separation, 23 motion detection circuit, 24 mixing circuit, 26
Motion detection output terminal, 28 Motion detection input terminal, 29 field memory, 30 LPF, 31 intra-field scanning line conversion circuit, 32 inter-field scanning line conversion circuit, 3
3 subtraction circuit, 34 mixing circuit, 35 addition circuit, 36
Enhancer, 38 digital filter circuit, 39 time expansion circuit, 40 edge detection circuit, 41 judgment circuit.

Claims (3)

[Claims] 1. A scanning line conversion circuit for adaptively switching between moving image processing and still image processing based on NTSC motion information to convert the NTSC signal into a high-definition signal, and a motion detection means for detecting motion information of an NTSC composite signal. A three-dimensional YC separation circuit that detects motion information by using the three-dimensional YC separation circuit that adaptively switches between moving image processing and still image processing based on the above-described motion information to separate a luminance signal and a color signal, and a motion output from the three-dimensional YC separation circuit. It has a sample rate conversion circuit and a gain conversion circuit for converting the sample rate by re-sampling the detected power using the D / A conversion circuit and the A / D conversion circuit and then time-compressing it using the field memory circuit. , Above 3D YC
A high-definition television receiver configured to input motion information output from a separation circuit to the scanning line conversion circuit through the sample rate conversion circuit and the gain conversion circuit. 2. In the sample rate conversion circuit,
2. The high-definition television receiver according to claim 1, wherein after inserting 0 data between data, re-sampling is performed using a low pass filter that limits a band and time compression is performed using a field memory circuit. 3. A frame memory for delaying the motion information output from the three-dimensional YC separation circuit by one frame, a multiplication means, and an addition means, and a function of integrating the motion information in the time axis direction. The high-definition television receiver according to claim 1 or 2.