JPH10163256A - Chip supporting board for semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a chip supporting board for semiconductor devices capable of manufacturing small-sized semiconductor packages free from package cracks, and excellent in reliability. SOLUTION: Outer connections 2 and through holes 3 are formed in a polyimide bonding sheet 1. After copper foil is stuck, inner connections and developed wirings 5 up to the outer connections are formed. An insulating paste containing a filler is screen-printed in the internal peripheral part of a semiconductor chip and on wirings in the semiconductor-chip-mounted region of a supporting substrate using a mesh-165 screen mask. This is dried and a chip supporting substrate for semiconductor devices having an insulating adhesive 6 are formed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a chip supporting substrate for a semiconductor device.

[0002]

2. Description of the Related Art As the degree of integration of semiconductors increases, the number of input / output terminals increases. Therefore, a semiconductor package having a large number of input / output terminals is required. Generally, I / O terminals are arranged in a line around the package,
There is a type that is arranged in multiple rows not only around but also inside.
The former is a QFP (Quad Flat Package).
e) is representative. In order to increase the number of terminals, it is necessary to reduce the terminal pitch. However, in the region of 0.5 mm pitch or less, advanced technology is required for connection with a wiring board. On the other hand, the latter array type is suitable for increasing the number of pins because terminals can be arranged at a relatively large pitch. Conventionally, an array type has a PGA (Pin) having connection pins.
Grid Array) is generally used, but the connection with the wiring board is of an insertion type and is not suitable for surface mounting. For this reason, a surface mountable BGA (Ball Grid A
(rray) has been developed.

[0003] On the other hand, with the miniaturization of electronic equipment, the demand for further miniaturization of the package size has increased. To cope with this miniaturization, a so-called chip size package (CS
P; Chip Size Package) has been proposed. This is a package having a connection portion with an external wiring board in a mounting region, not in a peripheral portion of a semiconductor chip. As a specific example, a polyimide film with bumps is adhered to the surface of a semiconductor chip, and after electrically connecting the chip to a gold lead wire, epoxy resin or the like is potted and sealed (NIKKEI MATERI).
ALS & TECHNOLOGY 94.4, No.
140, pp. 18-19), and a method in which metal bumps are formed on the temporary substrate at positions corresponding to connection portions between the semiconductor chip and the external wiring board, and the semiconductor chip is face-down bonded and then transfer molded on the temporary substrate ( Sm
allest Flip-Chip-Like Pac
kage CSP; The Second VLSI
Packaging Works of Jap
an, p. 46-50, 1994). However, the conventionally proposed semiconductor package, which is small in size and adapted for high integration, has a problem that cracks occur in the package due to heat when the package is soldered to a printed wiring board. The cause is considered as follows. That is, the moisture adsorbed on the interface between various materials constituting the package is soldered (solder reflow)
At a temperature of about 240 ° C., the sealed water vapor expands in volume and there is no escape, so the internal pressure rises and eventually the package is cracked.

[0004]

SUMMARY OF THE INVENTION An object of the present invention is to provide a chip supporting substrate for a semiconductor device which can prevent a package crack and can manufacture a small semiconductor device having excellent reliability.

[0005]

According to the present invention, there is provided a semiconductor device chip supporting substrate comprising: B. two or more wirings are formed on one surface of the insulating support substrate, and the wirings have at least a semiconductor chip mounting area; B. the wiring is arranged so that a semiconductor chip is mounted in a semiconductor chip mounting area of the two or more wirings; B. at least one or more through-holes are provided in the insulating support substrate in the semiconductor chip mounting area where the semiconductor chip is mounted; In the semiconductor chip mounting region, an insulating adhesive is formed at a portion other than the through hole. According to the present invention, at least one of the through holes is made of an insulating adhesive so that a gap formed by the insulating support substrate, the wiring and the end face of the insulating adhesive, and the semiconductor chip can communicate with the outside of the package through the through hole. So that it is not blocked. Therefore, steam during solder reflow is not sealed inside. As a result, since the internal pressure of the package does not increase, no package crack occurs, and a highly reliable and small semiconductor package can be provided.

[0006]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the chip supporting substrate for a semiconductor package of the present invention are described in A '. Two or more wirings are formed on one surface of the insulating support substrate, and the wirings have at least a semiconductor chip mounting area and an inner connection part; B ′. The wiring is arranged so that a semiconductor chip is mounted in a semiconductor chip mounting area of the two or more wirings, and C ′. At least one or more through-holes are provided in the insulating support substrate in a semiconductor chip mounting area where the semiconductor chip is mounted; D '. In the insulating support substrate, an opening is provided at a position where the wiring of the insulating support substrate is formed and at a position where an outer connection portion that is electrically connected to the inner connection portion is provided. , E '. A semiconductor device chip support substrate in which an insulating adhesive is formed in a portion other than the through hole in the semiconductor chip mounting region.

[0007] As the insulating support substrate, a plastic film such as polyimide, epoxy resin or polyimide, or a substrate such as glass nonwoven fabric impregnated with a plastic such as polyimide, epoxy resin or polyimide and cured can be used. In order to form two or more wirings on one surface of the insulating support substrate, a method of etching a copper foil, a method of plating a predetermined portion with copper, a method of using them in combination, or the like can be used.
An opening such as an external connection portion or a through hole can be provided in the insulating support substrate by mechanical processing such as drilling or punching, or laser processing such as excimer laser or carbon dioxide gas laser. Also, a method is provided in which an opening is provided in advance on an insulating base material having adhesiveness, and the opening is bonded to a metal foil for forming a wiring such as a copper foil. It is possible to provide them, use them together, or the like. The outer connection portion that is electrically connected to the inner connection portion can be formed by forming a bump or the like on the opening of the insulating support substrate by soldering, plating, or the like. This is connected to an external substrate or the like.

[0008] An insulating adhesive is formed on such an insulating support substrate in a portion other than the through hole in the semiconductor chip mounting region. It is necessary that the insulating adhesive has an insulating function with the chip wiring and an adhesive function with the chip. For example, (1) an adhesive that can be directly bonded to the chip is formed at a predetermined position. Method,
(2) There is a method in which an insulating film is formed in a predetermined region, and an adhesive capable of bonding a chip is formed in a predetermined location. Specifically, the following method is used to form the insulating adhesive at a predetermined location. (A) An insulating adhesive paste is formed by a printing method. (B) An insulating material (insulating paste) is formed by a printing method, and an adhesive (adhesive paste) is further formed on the insulating material (insulating paste) by a printing method. The insulating material (insulating paste) and the adhesive (adhesive paste) may be the same or different. (C) A film-like solder-resist is applied, exposed and developed to form an insulating material, and an adhesive (adhesive paste) is further formed on the insulating material.
Is formed by a printing method. The solder resist may be liquid. (D) The film adhesive is punched and pasted into a predetermined shape. (E) An adhesive (adhesive paste) is formed by stamping and sticking a film-shaped insulating material into a predetermined shape by a printing method. In this case, the insulating adhesive may be formed so as to cover the edge of the wiring pattern. At least one through hole is formed in the semiconductor chip mounting region. The hole diameter is not particularly limited, but is preferably, for example, 0.05 mm or more and 1.000 mm or less. The arrangement is not particularly limited, but it is preferable to arrange a plurality of holes as evenly as possible, and the diameter and arrangement of these holes are selected according to the wiring pattern.

One of the methods of manufacturing a semiconductor package using the chip supporting substrate for a semiconductor package of the present invention is as follows. A semiconductor chip is adhered to the surface, and the semiconductor chip electrodes are connected to wires (inner connection portions) of the support substrate by wire bonding or the like. Furthermore, a semiconductor package can be manufactured by sealing at least the semiconductor chip electrode surface of the semiconductor chip with a resin and mounting a solder ball on the outer connection portion.

[0010]

【Example】

Embodiment 1 An embodiment of the present invention will be described with reference to FIG. Polyimide adhesive applied to both sides of polyimide film.
An outer connecting portion 2 and a through hole 3 are formed in a 07 mm polyimide bonding sheet 1. Next, thickness 0.01
After bonding the 8 mm copper foil, the developed wiring 5 extending to the inner connecting portion 4 and the outer connecting portion 2 is formed by a normal etching method. Furthermore, electroless nickel plating (film thickness: 5 μm) and electroless gold plating (film thickness: 0.8 μm)
m) are sequentially applied (not shown). Next, a support substrate having a plurality of sets of inner connection portions, developed wiring, and outer connection portions is prepared by punching out a frame using a punching die (FIG. 1A). Next, a filler-containing insulating paste is screen-printed on the inner peripheral portion of the semiconductor chip (0.5 mm width) and on the wiring in the semiconductor chip mounting region of the support substrate by using a 165 mesh screen mask by a screen printing method. This is left in a drying oven at a temperature of 120 ° C. for 5 minutes to form a semiconductor device chip supporting substrate having an insulating adhesive material 6 of about 20 μm. The insulating paste used was based on the resin component of our company's die bonding paste EN-4322, which contained 70% by weight of glass powder having a maximum particle size of 10 μm, and had a viscosity of 2,000 ps at room temperature.
Under these drying conditions, the printed insulating paste is still in a semi-cured state, and the insulating adhesive 6 has an adhesive property, and the insulating adhesive has a pattern deformation even when the chip 8 is mounted. It does not block the through hole. Thereafter, the semiconductor chip is dried and the semiconductor chip is fixed on the supporting substrate. The insulating adhesive after printing or after mounting the chip may be formed over the side wall of the wiring end as long as it is not a through hole. Further, the semiconductor chip electrode and the inner connection portion 4 are electrically connected by bonding gold wires 9 (FIG. 1C). The material thus formed is loaded into a transfer mold,
Epoxy resin for semiconductor encapsulation 10 (Hitachi Chemical Industry Co., Ltd.)
(CL-7700) (FIG. 1d). As described above, the insulating adhesive 6 (insulating paste film) is printed on the peripheral portion inside the chip. Thus, while the semiconductor chip is bonded to the insulating support substrate via the insulating adhesive, the sealing epoxy resin does not flow into the chip mounting area and does not block the through hole. Thereafter, the solder balls 11 are arranged at the outer connection portions and melted (FIG. 1e), and finally separated into individual packages by punches (FIG. 1f). The sample prepared in this example was subjected to 30 ° C., 60% RH, 192 h
The sample was allowed to absorb moisture under the condition of rs, and a reflow test was performed at a temperature of 230 ° C., and there was no reflow cracked sample (10 samples).

Embodiment 2 This will be described with reference to FIG. When forming the insulating adhesive film, screen printing was performed twice in order to increase the dimensional accuracy of the printed pattern. The insulating paste 6 with the filler is printed using the same screen mask as in the first embodiment. This is left in a drying oven at a temperature of 120 ° C. for 20 minutes to form a semiconductor device chip supporting substrate having an insulating layer film (insulating adhesive 6) of about 15 μm. The insulating paste used is based on the resin component of our die bonding paste EN-4322, which contains 65% by weight of silicon oxide having a maximum particle size of 10 μm, and has a viscosity at room temperature of 1500 ps. Thereafter, the filler-containing insulating paste is again screen-printed on the dried insulating paste film using the same screen mask (FIG. 1B). After printing, the chip 8 is mounted and dried to fix the semiconductor chip on the supporting substrate within a time period during which the insulating adhesive 7 does not dry. Since the dried insulating layer film (insulating adhesive 6) absorbs the organic binder of the insulating paste (insulating adhesive 7) extremely well, the insulating adhesive 7 has almost no pattern shift and has a through hole when the chip is mounted. No blocking occurs. As described above, since the insulating layer film (insulating adhesive 6) contains silicon oxide having a particle diameter of 10 μm, the insulating layer film 6 ensures a predetermined insulating film thickness and insulation between the semiconductor chip and the metal pattern. At the same time, the semiconductor chip could be fixed by the insulating paste film (insulating adhesive 7). Although the same insulating paste is screen-printed on the insulating adhesive 6 and the insulating adhesive 7, an insulating paste different from the insulating adhesive 6 may be used for the insulating adhesive 7. 3μm particle size as insulating paste for insulating adhesive 7
Even in experiments using insulating paste containing filler,
The reflow test results were good.

Embodiment 3 It is important for the insulating adhesive 6 to ensure insulation between the semiconductor chip and the metal pattern, and it is necessary that the insulating adhesive 6 has a predetermined thickness without pinholes. A photosensitive solder resist film (manufactured by Hitachi Chemical Co., Ltd., SR230) as the insulating adhesive 6
0G), and a desired solder resist pattern was formed in the semiconductor chip mounting area by exposure and development.
The lamination conditions were a roll pressure of 2.0 kgf / cm2, a roll temperature of 100 ° C., and an exposure amount of 600 mJ / cm2.
It is. For development, use a sodium carbonate solution (solution temperature 38).
(° C., liquid concentration: 1.0 wt%). Thereafter, an insulating adhesive 7 was formed by a printing method, and the chip was fixed. The reflow results were also good in this experiment because the through holes were not blocked.

Fourth Embodiment In the first embodiment, the insulating adhesive 6 or the insulating adhesive 7 is formed on the wiring pattern in the semiconductor chip mounting area. However, the insulating adhesive may not block the through holes. This is a necessary condition, and the insulating adhesive pattern is not necessarily a wiring pattern. As shown in FIGS. 3 to 6, a sample was prepared by printing a wiring pattern and a linear pattern extending over a part of the insulating support substrate. At least one of the through holes is not closed by the insulating adhesive so that a gap formed by the insulating support substrate, the wiring, the end face of the insulating adhesive, and the semiconductor chip can communicate with the outside of the package through the through hole. You can do so. Therefore, even if the semiconductor chip mounting area is divided into a plurality of gaps by a combination of a plurality of linear patterns and a curved pattern such as a lattice pattern (FIG. 4 is divided into 10 places, FIG. 5 is divided into 3 places, FIG. 3C 1
Since the at least one through hole in each space was not closed with the insulating adhesive, the reflow test result was good using any pattern. FIG. 7 (plan view) shows a state before the insulating paste is screen-printed. 8 'is a semiconductor chip mounting area, and 10' is a resin sealing area.

Example 5 In Examples 1 to 4, an insulating paste was used as an insulating adhesive, and this was screen-printed to form a pattern. However, in the case of patterns that are connected to each other, such as the lattice patterns shown in FIGS. 4 and 5, a die bonding film for chip connection can be formed by a punching die and used as an insulating adhesive film. A die bond film (manufactured by Hitachi Chemical Co., Ltd., having a thickness of 30 μm) containing polyimide and epoxy as main components is molded using a mold, and then temporarily press-bonded. Temporary crimping conditions are 160 ° C for 5 hours.
Second, the pressure is 3 kgf / cm2. The semiconductor chip 8 is mounted on a predetermined position of the die bond film, and the temperature 22
The chip was completely press-bonded at 0 degree, for 5 seconds, and at a pressure of 300 gf / cm2. The reflow test results were also good for the samples made by this process.

[0015]

The insulating adhesive material is a die bond material for mounting the semiconductor chip while securing the insulation between the semiconductor chip and the wiring pattern, and has a strong adhesive force with the semiconductor chip, the insulating layer film and the wiring, and It is necessary to prevent the deformation of the insulating support substrate and the semiconductor chip by the internal pressure generated during the reflow. For this purpose, there must be no closed air gap at the interface between the semiconductor chip and the insulating adhesive or at the interface between the insulating adhesive and the wiring pattern. As a material for fixing a semiconductor chip to a substrate, a die bond paste, and more recently, a die bond film have begun to be used. Although it is possible to eliminate the presence of a sealed gap at the interface between the semiconductor chip and the insulating adhesive for both materials by the conventional technology, it is possible to eliminate the gap at the interface between the insulating adhesive and the wiring pattern. difficult. The reason is that, since the wiring pattern is formed by etching a copper foil, a step of about 15 μm is usually formed on the insulating support substrate, and a gap is easily generated near the step. The present invention is characterized in that the insulating layer film does not block the through-hole so that it does not become a closed system even if there is a gap near the wiring step, forming an insulating adhesive material,
When the semiconductor chip is mounted, the through hole can be prevented from being covered with the insulating adhesive.

Using the semiconductor package chip supporting substrate of the present invention: a. Bonding the semiconductor chip to the surface of the support substrate on which the inner connection portion is provided, using an insulating adhesive; b. Connecting the semiconductor chip electrode to the inner connection portion of the substrate by wire bonding; c. In a semiconductor package manufactured by resin-sealing at least a semiconductor chip electrode surface of a semiconductor chip, there is sufficient insulation between the semiconductor chip and wiring. Further, according to the present invention, since the gap formed by the insulating support substrate, the end face of the wiring and the insulating layer film, and the semiconductor chip communicates with the outside of the package through the through hole, the water vapor during the solder reflow is not sealed inside. . As a result, since the internal pressure of the package does not increase, no package crack occurs, and a highly reliable and small semiconductor package can be provided. In addition, since the chip supporting substrate for mounting a semiconductor of the present invention has a simple substrate structure, the number of manufacturing processes is small, and as a result, a package can be manufactured at low cost.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view showing a semiconductor package manufacturing process for explaining one embodiment of the present invention.

FIG. 2 is a cross-sectional view showing a semiconductor package manufacturing process for explaining another embodiment of the present invention.

FIG. 3 is a plan view showing an inner connection portion and an expanded wiring on which an insulating adhesive is formed, for explaining one embodiment of the present invention.

FIG. 4 is a plan view showing an inner connection portion and an expanded wiring on which an insulating adhesive is formed, for explaining another embodiment of the present invention.

FIG. 5 is a plan view showing an inner connection portion on which an insulating adhesive is formed and a developed wiring for explaining another embodiment of the present invention.

FIG. 6 is a plan view showing an inner connecting portion and an expanded wiring on which an insulating adhesive is formed, for explaining another embodiment of the present invention.

FIG. 7 is a plan view showing an inner connection portion and a developed wiring before an insulating adhesive is formed.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Polyimide bonding sheet 2 Outer connection part 3 Through hole 4 Inner connection part 5 Expansion wiring 6 Insulating adhesive 7 Insulating adhesive 8 Semiconductor chip 9 Gold wire 10 Epoxy resin for semiconductor sealing 11 Solder ball 8 'Semiconductor chip mounting area Part 10 'Resin sealing area part

 ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Toshio Yamazaki 48 Wadai, Tsukuba, Ibaraki Pref.Hitachi Chemical Industry Co., Ltd.Tsukuba Development Laboratory Co., Ltd. Within the Research Laboratory (72) Inventor Shigeki Ichimura 48 Wadai, Tsukuba, Ibaraki Prefecture Hitachi Chemical Co., Ltd.Tsukuba Development Laboratory Co., Ltd. Inside

Claims (2)

[Claims] 1. A. B. two or more wirings are formed on one surface of the insulating support substrate, and the wirings have at least a semiconductor chip mounting area; B. the wiring is arranged so that a semiconductor chip is mounted in a semiconductor chip mounting area of the two or more wirings; B. at least one or more through-holes are provided in the insulating support substrate in the semiconductor chip mounting area where the semiconductor chip is mounted; A chip support substrate for a semiconductor device, wherein an insulating adhesive is formed in a portion other than the through hole in the semiconductor chip mounting region. 2. The semiconductor device chip supporting substrate according to claim 1, wherein the insulating adhesive is formed by a printing method.