JP3394875B2 - Chip support substrate for semiconductor device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device chip support substrate.

[0002]

2. Description of the Related Art The number of input / output terminals has increased as the degree of integration of semiconductors has improved. Therefore, a semiconductor package having a large number of input / output terminals has been required. Generally, I / O terminals are arranged in a row around the package,
There is a type that arranges not only the periphery but also the interior in multiple rows.
The former is QFP (Quad Flat Packag)
e) is typical. When the number of terminals is increased, it is necessary to reduce the terminal pitch, but in the area of 0.5 mm pitch or less, a high level technique is required for connection with the wiring board. On the other hand, the latter array type is suitable for increasing the number of pins because the terminals can be arranged at a relatively large pitch. Conventionally, the array type has a PGA (Pin
Grid Array) is generally used, but the connection with a wiring board is an insertion type and is not suitable for surface mounting. Therefore, surface mountable BGA (Ball Grid A)
A package called rray) has been developed.

On the other hand, with the miniaturization of electronic equipment, there is an increasing demand for further miniaturization of the package size. To cope with this miniaturization, a so-called chip size package (CS
P; Chip Size Package) has been proposed. This is a package having a connection portion with an external wiring board in the mounting area, not in the peripheral portion of the semiconductor chip. As a specific example, a polyimide film with bumps is adhered to the surface of a semiconductor chip, an electrical connection is made between the chip and a gold lead wire, and then epoxy resin or the like is potted and sealed (NIKKEI MATERI).
ALS & TECHNOLOGY 94.4, No.
140, p18-19), or metal bumps are formed on the temporary substrate at positions corresponding to the connection portions of the semiconductor chip and the external wiring substrate, the semiconductor chip is face-down bonded, and then transfer molded on the temporary substrate ( Sm
allest Flip-Chip-Like Pac
case CSP; TheSecond VLSI
Packing Workshop of Japan
an, p. 46-50, 1994). However, the conventionally proposed semiconductor package, which has a small size and is intended for high integration, has a problem that cracks are generated in the package due to heat generated when the package is soldered to a printed wiring board. The cause of this is considered as follows. That is, moisture adsorbed on the interface of various materials that make up the package is soldered (solder reflow)
It is vaporized at a temperature (about 240 degrees) at the time of heating, the volume of the sealed vapor expands and there is no escape, so that the internal pressure rises and finally the package cracks.

[0004]

SUMMARY OF THE INVENTION The present invention provides a chip supporting substrate for a semiconductor device, which can prevent a package crack and can manufacture a small semiconductor device having excellent reliability.

[0005]

The chip supporting substrate for a semiconductor device of the present invention comprises: Two or more wirings are formed on one surface of the insulating support substrate, and the wirings have at least a semiconductor chip mounting region, B. The wiring is arranged so that a semiconductor chip is mounted in the semiconductor chip mounting area of the two or more wirings. At least one or more hole diameters in the insulating support substrate in the semiconductor chip mounting area where the semiconductor chip is mounted
Is 0.05 mm or more and 1.000 mm or less, and D. In the semiconductor chip mounting area, the insulating property
It is characterized in that an insulating adhesive material is formed on a portion of the supporting substrate other than the through holes. According to the present invention, at least one of the through holes is an insulating adhesive so that the voids formed by the insulating support substrate, the wiring and the insulating adhesive, and the semiconductor chip can communicate with the outside of the package through the through holes. Can be blocked by. Therefore, water vapor during solder reflow is not sealed inside. As a result, since the internal pressure of the package does not rise, package cracks do not occur, and it is possible to provide a highly reliable and compact semiconductor package.

[0006]

BEST MODE FOR CARRYING OUT THE INVENTION A preferred embodiment of the chip support substrate for a semiconductor package of the present invention is A '. Two or more wirings are formed on one surface of the insulating support substrate, and the wirings have at least a semiconductor chip mounting region and an inner connecting portion, B '. The wiring is arranged such that a semiconductor chip is mounted in a semiconductor chip mounting area of the two or more wirings, and C ′. At least one or more through holes are provided in the insulating support substrate in the semiconductor chip mounting area portion on which the semiconductor chip is mounted, D '. An opening is provided in the insulating support substrate at a location where the wiring of the insulating support substrate is formed and where an outer connecting portion that is electrically connected to the inner connecting portion is provided. , E '. In the semiconductor chip mounting area portion, an insulating adhesive material is formed in a portion other than the through hole, which is a semiconductor device chip support substrate.

As the insulating support substrate, a plastic film of polyimide, epoxy resin, polyimide or the like, or a material obtained by impregnating and hardening a substrate such as glass nonwoven fabric with plastic such as polyimide, epoxy resin or polyimide can be used. In order to form two or more wirings on one surface of the insulating support substrate, a method of etching a copper foil, a method of plating a predetermined portion with copper, a method of using them in combination, or the like can be used.
The insulating support substrate can be provided with an external connection portion, an opening such as a through hole, or the like by mechanical processing such as drilling or punching, laser processing such as excimer laser or carbon dioxide laser, and the like. Also, an opening is provided in advance on an adhesive insulating base material and the like, and it is attached to a metal foil for forming a wiring such as copper foil, or an opening is provided on an insulating base material with a copper foil or in which wiring is formed in advance. It is possible to provide them and to use them together. The outer connecting portion that is electrically connected to the inner connecting portion can be formed by forming bumps or the like on the insulating support substrate opening by solder balls, plating, or the like. This is connected to an external board or the like.

On such an insulating support substrate, an insulating adhesive material is formed on the semiconductor chip mounting region except for the through holes. This insulating adhesive needs to have an insulating function with respect to the chip wiring and an adhering function with the chip, and as its formation mode, for example, (1) an adhesive that can be directly adhered to the chip is formed at a predetermined position. Method,
(2) There is a method of forming an insulating film in a predetermined region and further forming an adhesive material at a predetermined place to bond the chip. The following method is specifically used to form the insulative adhesive at a predetermined position. (A) An insulating adhesive paste is formed by a printing method. (B) An insulating material (insulating paste) is formed by a printing method, and an adhesive material (adhesive paste) is further formed on the insulating material (insulating paste) by a printing method. The insulating material (insulating paste) and the adhesive material (adhesive paste) may be the same or different. (C) A film-like solder resist is attached, exposed and developed to form an insulating material, and an adhesive material (adhesive paste) is formed on the insulating material.
Stroke) is formed by a printing method. The solder resist may be liquid. (D) Punching and adhering the film adhesive into a predetermined shape. (E) An adhesive (adhesive paste) for punching and sticking a film-shaped insulating material into a predetermined shape is formed by a printing method. In the above case, the insulating adhesive may be formed so as to cover the edge portion of the wiring pattern. At least one through hole is formed in the semiconductor chip mounting region. The hole diameter is not particularly limited, but is preferably 0.05 mm or more and 1.000 mm or less, for example. The arrangement is not particularly limited, but it is preferable that a plurality of them are arranged as evenly as possible, and the hole diameter and the arrangement thereof are selected according to the wiring pattern.

As one of the methods for manufacturing a semiconductor package using the semiconductor package chip supporting substrate of the present invention, first, an insulating adhesive material for the semiconductor package chip supporting substrate of the present invention is used. The semiconductor chip is adhered to the surface, and the semiconductor chip electrode is connected to the wiring (inner connection portion) of the supporting substrate by wire bonding or the like. Further, at least the semiconductor chip electrode surface of the semiconductor chip is resin-sealed, and solder balls are mounted on the outer connecting portions, whereby a semiconductor package can be manufactured.

[0010]

【Example】

Embodiment 1 An embodiment of the present invention will be described with reference to FIG. Thickness of polyimide adhesive coated on both sides of polyimide film.
An outer connecting portion 2 and a through hole 3 are formed on a 07 mm polyimide bonding sheet 1. Then 0.01
After adhering the copper foil of 8 mm, the developed wiring 5 up to the inner connecting portion 4 and the outer connecting portion 2 is formed by a usual etching method. Furthermore, the exposed wiring has electroless nickel plating (film thickness: 5 μm), electroless gold plating (film thickness: 0.8 μ).
m) are sequentially applied (not shown). Next, using a punching die, it is punched into a frame shape to prepare a support substrate on which a plurality of sets of inner connection portions, developed wirings, and outer connection portions are formed (FIG. 1a). Next, an insulating paste containing a filler is screen-printed on the inner peripheral portion (0.5 mm width) of the semiconductor chip and on the wiring of the semiconductor chip mounting region of the support substrate by a screen printing method using a 165 mesh screen mask. This is left in a drying oven at a temperature of 120 ° C. for 5 minutes to form a chip support substrate for a semiconductor device having an insulating adhesive material 6 of about 20 μm. The insulating paste used is based on the resin component of our company's die bonding paste EN-4322, contains 70% by weight of glass powder with a maximum particle size of 10 μm, and has a viscosity at room temperature of 2000 ps.
Under these drying conditions, the printed insulating paste is still in a semi-cured state, and this insulating adhesive material 6 has adhesiveness, and even when the chip 8 is mounted, the insulating adhesive material undergoes pattern deformation. It does not block the through hole. Then, it is dried to fix the semiconductor chip on the supporting substrate. The insulating adhesive material after printing or mounting a chip may be formed over the side wall of the wiring end portion as long as it is not a through hole. Further, the semiconductor chip electrode and the inner connecting portion 4 are electrically connected by bonding a gold wire 9 (FIG. 1c). The thing formed in this way is loaded into a transfer mold die,
Epoxy resin for semiconductor encapsulation 10 (Hitachi Chemical Co., Ltd.)
Manufactured by CL-7700) (Fig. 1d). As described above, the insulating adhesive 6 (insulating paste film) is printed on the peripheral portion of the chip. Therefore, while the semiconductor chip is bonded to the insulating support substrate via the insulating adhesive, the sealing epoxy resin does not flow into the chip mounting area and block the through hole. After that, the solder balls 11 are arranged on the outer connecting portion and melted (FIG. 1e), and finally separated into individual packages by punching (FIG. 1f). The sample prepared in this example is 30 ° C., 60% RH, 192 h
The sample was allowed to absorb moisture under the condition of rs and a reflow test was performed at a temperature of 230 ° C., and there were no reflow cracked samples (10 samples).

Embodiment 2 A description will be given with reference to FIG. When forming the insulating adhesive film, screen printing was performed twice in order to improve the dimensional accuracy of the printed pattern. The insulating paste 6 containing a filler is printed using the same screen mask as in the first embodiment. This is left in a drying oven at a temperature of 120 ° C. for 20 minutes to form a chip supporting substrate for a semiconductor device having an insulating layer film (insulating adhesive 6) of about 15 μm. The insulating paste used was based on the resin component of our company's die bonding paste EN-4322, contained 65 wt% of silicon oxide having a maximum grain size of 10 μm, and had a viscosity at room temperature of 1500 ps. After that, the above-described insulating paste containing filler is screen-printed again on the dried insulating paste film using the same screen mask (FIG. 1B). After printing, the chip 8 is mounted within a time period during which the insulating adhesive 7 does not dry, and is dried to fix the semiconductor chip on the supporting substrate. Since the dried insulating layer film (insulating adhesive material 6) absorbs the organic binder of the insulating paste (insulating adhesive material 7) very well, the insulating adhesive material 7 has almost no pattern displacement when the chip is mounted and the through hole is formed. No blocking occurs. As described above, since the insulating layer film (insulating adhesive 6) contains silicon oxide having a grain size of 10 μm, the insulating layer film 6 ensures a predetermined insulating film thickness and insulation between the semiconductor chip and the metal pattern. At the same time, the semiconductor chip could be fixed by the insulating paste film (insulating adhesive 7). The insulating adhesive 6 and the insulating adhesive 7 are screen printed with the same insulating paste, but the insulating adhesive 7 may be different from the insulating paste 6. As an insulating paste for the insulating adhesive 7, the grain size is 3 μm
Insulating property in experiments using the insulating paste with filler
The result of the reflow test was good.

Example 3 It is important for the insulating adhesive 6 to secure the insulating property between the semiconductor chip and the metal pattern, and a predetermined film thickness without pinholes is required. As the insulating adhesive material 6, a photosensitive solder resist film (SR230 manufactured by Hitachi Chemical Co., Ltd.)
0G) was laminated, and a desired solder resist pattern was formed in the semiconductor chip mounting region by exposure and development.
Lamination conditions are a roll pressure of 2.0 kgf / cm2, a roll temperature of 100 ° C., and an exposure dose of 600 mJ / cm2.
Is. For development, sodium carbonate solution (liquid temperature 38
C., liquid concentration 1.0 wt%) was used for spraying. After that, an insulating adhesive 7 was formed by a printing method to fix the chip. The reflow result was also good in this experiment because the through hole was not blocked.

Example 4 In Example 1, the insulating adhesive 6 or the insulating adhesive 7 was formed on the wiring pattern in the semiconductor chip mounting region, but the insulating adhesive may not close the through hole. This is a necessary condition, and the insulating adhesive material pattern is not always a wiring pattern. As shown in FIGS. 3 to 6, a sample was prepared by printing a wiring pattern and a line-shaped pattern in which a part of the insulating support substrate is formed. At least one of the through holes is not covered with the insulating adhesive so that the voids formed by the insulating support substrate, the wiring, the end surface of the insulating adhesive, and the semiconductor chip can communicate with the outside of the package through the through holes. You can Therefore, even if the semiconductor chip mounting area is divided into a plurality of voids by a combination of a plurality of linear patterns and curved patterns such as a grid pattern (FIG. 4 is divided into 10 places, FIG. 5 is divided into 3 places, and FIG. ; 1
At least one through hole in each void is not covered with an insulating adhesive, so that the reflow test result was good regardless of which pattern was used. Note that FIG. 7 (plan view) shows a state before screen printing the insulating paste. Reference numeral 8'denotes a semiconductor chip mounting area portion and 10'denotes a resin sealing area portion.

Example 5 In Examples 1 to 4, an insulating paste was used as an insulating adhesive, and this was screen-printed to form a pattern. However, in the case of mutually connected patterns such as the lattice patterns shown in FIGS. 4 and 5, a die bonding film for chip connection can be formed by a punching die and used as an insulating adhesive film. A die bond film containing polyimide and epoxy as main components (manufactured by Hitachi Chemical Co., Ltd., thickness: 30 μm) is molded using a mold, and then temporarily pressure-bonded. The conditions for temporary pressure bonding are a temperature of 160 degrees and time of 5
Second, pressure is 3 kgf / cm 2. The semiconductor chip 8 is mounted at a predetermined position on this die bond film, and the temperature is set to 22.
The chip was finally pressure-bonded at 0 ° C. for 5 seconds at a pressure of 300 gf / cm 2. The reflow test results were also good for the samples prepared by this process.

[0015]

The insulating adhesive material is a die-bonding material for mounting the semiconductor chip while ensuring the insulation between the semiconductor chip and the wiring pattern, and has a strong adhesive force with the semiconductor chip, the insulating layer film and the wiring. It is necessary to prevent deformation of the insulating support substrate and the semiconductor chip by the internal pressure generated during reflow. For this purpose, there should be no air gaps sealed at the interface between the semiconductor chip and the insulating adhesive and at the interface between the insulating adhesive and the wiring pattern. As a material for fixing a semiconductor chip to a substrate, a die bond paste, and more recently, a die bond film has begun to be used. For both materials, it is possible to prevent the airtight gap at the interface between the semiconductor chip and the insulating adhesive from existing technology, but it is possible to eliminate the void at the interface between the insulating adhesive and the wiring pattern. difficult. The reason is that since the wiring pattern is formed by etching a copper foil, a step of about 15 μm usually occurs on the insulating support substrate, and a void is likely to be generated in the vicinity of the step. The present invention is characterized in that the insulating layer film does not close the through hole so that a closed system is not formed even if there is a void near the wiring step.
It is possible to prevent the through hole from being covered with the insulating adhesive when the semiconductor chip is mounted.

Using the chip support substrate for a semiconductor package of the present invention, a. Adhering the semiconductor chip to the surface of the support substrate on which the inner connection portion is provided, using an insulating adhesive, b. Connecting the semiconductor chip electrode to the inner connection portion of the substrate by wire bonding, c. In a semiconductor package manufactured by resin-sealing at least the semiconductor chip electrode surface of the semiconductor chip, there is sufficient insulation between the semiconductor chip and the wiring. Further, according to the present invention, the insulating support substrate, the end faces of the wiring and the insulating layer film, and the void formed by the semiconductor chip communicate with the outside of the package through the through holes, so that the water vapor during the solder reflow is not sealed inside. . As a result, since the internal pressure of the package does not rise, package cracks do not occur, and it is possible to provide a highly reliable and compact semiconductor package. Further, since the semiconductor mounting chip supporting substrate of the present invention has a simple substrate structure, the number of manufacturing processes is small, and as a result, the package can be manufactured at low cost.

[Brief description of drawings]

FIG. 1 is a cross-sectional view showing a semiconductor package manufacturing process for explaining an embodiment of the present invention.

FIG. 2 is a cross-sectional view showing a semiconductor package manufacturing process for explaining another embodiment of the present invention.

FIG. 3 is a plan view showing an inner connection portion and an expanded wiring in which an insulating adhesive is formed, for explaining one embodiment of the present invention.

FIG. 4 is a plan view showing an inner connecting portion formed with an insulating adhesive and a developed wiring, for explaining another embodiment of the present invention.

FIG. 5 is a plan view showing an inner connecting portion formed with an insulating adhesive and a developed wiring for explaining another embodiment of the present invention.

FIG. 6 is a plan view showing an inner connecting portion formed with an insulating adhesive and a developed wiring for explaining another embodiment of the present invention.

FIG. 7 is a plan view showing an inner connection portion and a developed wiring before an insulating adhesive material is formed.

[Explanation of symbols]

1 Polyimide bonding sheet 2 Outer connection 3 through holes 4 Inner connection part 5 Deployment wiring 6 Insulating adhesive 7 Insulating adhesive 8 semiconductor chips 9 gold wire 10 Epoxy resin for semiconductor encapsulation 11 solder balls 8'semiconductor chip mounting area 10'resin sealing area portion

Front page continuation (72) Inventor Satoo Yamazaki 48 Wadai, Tsukuba City, Ibaraki Prefecture Hitachi Chemical Co., Ltd. Tsukuba Development Laboratory (72) Inventor Hiroto Obata 48 Wadai, Tsukuba City, Ibaraki Hitachi Chemical Co., Ltd. Tsukuba Development In-lab (72) Inventor Shigeki Ichimura 48 Taidai, Tsukuba, Ibaraki Prefecture Hitachi Chemical Co., Ltd. Tsukuba Development Laboratory (72) Inventor Yoshiaki Tsubomatsu 48 Taiwa, Tsukuba, Ibaraki Hitachi Chemical Co., Ltd. Tsukuba Development In the laboratory (56) Reference JP 10-144723 (JP, A) JP 4-335540 (JP, A) JP 8-167678 (JP, A) JP 7-307411 (JP, A) ) JP-A 8-153824 (JP, A) JP-A 9-148475 (JP, A) JP-A 9-148481 (JP, A) JP-A 10-74861 (JP, A) 139429 (JP, U) (58) Fields surveyed (Int.Cl. ⁷ , DB name) H01L 23/12 H01L 21/60 H01L 23/28

Claims (2)

(57) [Claims] 1. A. Two or more wirings are formed on one surface of the insulating support substrate, and the wirings have at least a semiconductor chip mounting region, B. The wiring is arranged so that a semiconductor chip is mounted in the semiconductor chip mounting area of the two or more wirings. At least one or more hole diameters in the insulating support substrate in the semiconductor chip mounting area where the semiconductor chip is mounted
Is 0.05 mm or more and 1.000 mm or less, and D. In the semiconductor chip mounting area, the insulating property
An insulating adhesive material is formed on a portion of the supporting substrate other than the through holes, the semiconductor device chip supporting substrate. 2. The chip supporting substrate for a semiconductor device according to claim 1, wherein the insulating adhesive material is formed by a printing method.