JPH10154816A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a highly reliable semiconductor device. SOLUTION: In a thin film transistor of a multi-gate structure, the width of a channel formation region 108 closest to a drain region 102 is made the smallest. Thereby, it can be lightened that a transistor structure closest to the drain region is preferentially deteriorated. By intentionally making large the channel length of an active layer near its center, the amount of current flowing therethrough can be reduced to consequently prevent a deteriorating phenomenon caused by accumulated heat.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

TECHNICAL FIELD [0001] The invention disclosed in the present specification is:
The present invention relates to a semiconductor device using a thin film semiconductor. In particular, the present invention relates to a configuration of a gate electrode of an insulated gate transistor.

[0002]

2. Description of the Related Art A thin film transistor (TFT) has attracted attention as a semiconductor device using a thin film semiconductor. Particularly recently, a TFT capable of operating at high speed using a crystalline silicon film (for example, a polysilicon film) has been put into practical use.

On the other hand, a thin film transistor using a crystalline silicon film as an active layer has a high mobility (field-effect mobility), but has a disadvantage of a large off current (current flowing when the TFT is in an off state). I have. In addition, there is a problem that the higher the mobility, the lower the breakdown voltage, and the more the deterioration is remarkable.

[0004] As a means for solving such a problem, a technique described in Japanese Patent Publication No. 5-44195 is known. This technique disperses voltages applied to individual thin film transistors by equivalently adopting a configuration in which a plurality of thin film transistors are connected in series (also referred to as a multi-gate structure).

FIG. 4 is a structural diagram of an active layer and a gate electrode of a thin film transistor manufactured by using the technique described in the above publication. In FIG. 4, reference numeral 401 denotes a source region, 402 denotes a drain region, and gate electrodes 403 to 406 are arranged above the active layer via a gate insulating film (not shown). At this time, the gate electrodes 403 to 406 are the same electrode commonly connected.

[0006] Channel formation regions 407 to 410 are formed immediately below the gate electrodes 403 to 406 corresponding to the shapes of the gate electrodes 403 to 406, respectively, so that a plurality of thin film transistors are connected in series. There is a feature in the point.

However, the present inventors have experimentally confirmed using a TFT having a configuration as shown in FIG. 4, and found that the thin film transistor closest to the drain region 402 is most severely deteriorated. Then, it has been found that when a high voltage is applied between the source and the drain, destruction or deterioration proceeds sequentially from the transistor closer to the drain region.

According to another experiment, it has been found that, in a TFT constituted by an active layer having a wide channel width, the vicinity of the center of the active layer (near the center in the channel width direction) is most severely deteriorated.

[0009]

SUMMARY OF THE INVENTION In the present invention, in a configuration in which a plurality of semiconductor devices are connected in series equivalently, the concentration of an electric field on a semiconductor device near the drain side is alleviated and the breakdown or deterioration of the semiconductor device is prevented. It is an object to prevent the above.

It is another object of the present invention to suppress a current flowing near the center of the active layer and prevent deterioration caused at the center of the active layer.

[0011]

The first aspect disclosed in the present specification is described below.
The configuration of the invention of the active layer, a gate insulating film, a gate electrode that overlaps with the active layer via the gate insulating film,
Wherein the gate electrode has a structure that can be regarded as substantially a plurality of gate electrodes connected in common, and a width of a gate electrode closest to a drain region among the plurality of gate electrodes is It is characterized by being the narrowest.

In the above structure, the fact that the width of the gate electrode closest to the drain region is the narrowest means that the width of the channel formation region formed directly below the gate electrode (also referred to as the channel length) is the narrowest. .

According to another aspect of the present invention, there is provided a semiconductor device having at least an active layer, a gate insulating film, and a gate electrode overlapping the active layer via the gate insulating film. Has a structure that can be regarded as substantially a plurality of gate electrodes connected in common, and the width of the plurality of gate electrodes is gradually reduced as approaching the drain region.

[0014] In this case as well, it means that the width of the channel forming region gradually decreases as approaching the drain region.

These structures reduce the resistance component of the channel formation region by reducing the width of the gate electrode near the drain region, that is, the width of the channel formation region, and reduce the voltage applied to the channel formation region. The purpose is.

According to a second aspect of the present invention, there is provided a semiconductor device having at least an active layer, a gate insulating film, and a gate electrode overlapping the active layer via the gate insulating film. Wherein the width of the gate electrode changes in the channel width direction of the active layer.

According to another aspect of the present invention, there is provided a semiconductor device having at least an active layer, a gate insulating film, and a gate electrode overlapping the active layer via the gate insulating film. The width of the gate electrode increases from the end in the channel width direction to the inside of the active layer.

The above two configurations are intended to increase the width of the gate electrode near the center of the active layer to widen the channel formation region, increase the resistance component, and suppress the amount of current flowing. .

As described above, the basic purpose of the present invention is to intentionally change the width of the channel forming region in the active layer, thereby setting the resistance component of the channel forming region to obtain desired characteristics. Is to do. That is, this is a technique for controlling the distribution of voltage applied to the channel formation region and the amount of current flowing through a specific portion of the channel formation region.

[0020]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The first invention is a technique for preventing an electric field from being concentrated on a channel forming region near a drain region in a multi-gate thin film transistor. For this purpose, a configuration as shown in FIG. 1 is adopted.

Channel formation regions 106 to 108 are formed in the active layer according to the shape of the gate electrode. Since the gate width is gradually reduced in the order of the gate electrodes 103, 104, and 105, the channel formation regions 106, 10
The channel length becomes shorter in the order of 7 and 108 (the channel forming region 108 is the shortest).

With such a structure, the voltage applied to the channel formation region 108 is minimized in accordance with Ohm's law, and the electric field concentrated on the drain-side end of the channel formation region 108 is also reduced. Therefore, it is possible to reduce the phenomenon that the electric field is concentrated closer to the drain region as in the related art.

The second invention is a technique for preventing the deterioration or destruction from proceeding preferentially near the center of the active layer. For this purpose, the configuration is as shown in FIG.

In FIG. 5, the gate electrode 503 is patterned so that the area near the center of the active layer is the largest. Therefore, the channel formation region 504 has the longest channel length near the center of the active layer.

With this configuration, the amount of current flowing near the center of the active layer can be suppressed, and the amount of generated heat can be reduced. Therefore, it is possible to prevent a deterioration phenomenon that is considered to be caused by heat accumulation.

[0026]

【Example】

[Embodiment 1] In this embodiment, the structure of an active layer and a gate electrode of a thin film transistor using the first invention will be described using a thin film transistor as an example of a semiconductor device. Note that the gate electrode has a triple-gate type multi-gate electrode structure divided into three in a region overlapping with the active layer, but is not limited thereto.

In FIG. 1, reference numeral 101 denotes a source region, 10
Reference numeral 2 denotes a drain region, which is formed by adding an impurity element imparting one conductivity (such as phosphorus or boron). Also, 1
03 is a gate electrode of width a, 104 is a gate electrode of width b,
Reference numeral 105 denotes a gate electrode having a width c. As shown in FIG. 1, the gate electrodes 103 to 105 are commonly connected.

The regions indicated by reference numerals 106 to 108 are channel formation regions formed corresponding to the gate electrodes 103 to 105, respectively, and are substantially intrinsic regions to which no impurity element is intentionally added (undoped regions). Area).

The structure of the first invention is that the drain region 102
It is characterized in that the width of the gate electrode (the width of the channel formation region) becomes narrower as the distance approaches, and in FIG. 1, the width becomes smaller in the order of a, b, and c.

The scope of application of the first invention is not limited to the shapes of the active layer and the gate electrode shown in FIG. 1, but can be freely determined by a practitioner. Further, specific numerical values such as the width (channel length) of the channel formation region need to be experimentally obtained by the practitioner.

Further, in this embodiment, the configuration in which the width of the gate electrode is gradually reduced as approaching the drain region has been described. However, only the gate electrode closest to the drain region is made thinner than all the other gate electrodes. Even if the widths of all the gate electrodes are the same, the effect of the first invention can be obtained.

Here, a process until the present inventor reaches the first invention will be described. Since the channel formation region is substantially intrinsic, it behaves as a high resistance region. Therefore, even when the thin film transistor is in the ON state, it is considered that the longer the channel length is, the higher the resistance component becomes. That is, in the configuration shown in FIG. 1, the resistance of the channel formation region indicated by 108 is considered to be the lowest.

When it is assumed that the amount of current flowing between the source and the drain is constant, a higher voltage is applied to a region having a higher resistance according to Ohm's law. That is, the voltage applied to the channel formation region 108 is the lowest.

Further, it is considered that the voltage applied to both ends of the channel forming region is applied concentratedly to the end (channel / drain junction) near the drain side of the channel forming region to form a high electric field. ing. Therefore, it can be said that the lower the voltage applied to the channel formation region, the smaller the electric field concentrated on the drain side end.

Summarizing the above considerations, it is understood that in the configuration shown in FIG. 1, the electric field formed at the drain side end portion decreases in the order of the channel forming regions indicated by 106, 107 and 108.

Therefore, in the prior art, a higher electric field was apt to be formed, and the channel / drain junction was closer to the drain region, and was likely to be deteriorated or destroyed. However, by implementing the first invention, the channel becomes closer to the drain region. Since the electric field applied to the drain / drain junction can be reduced, deterioration can be alleviated.

[Embodiment 2] In this embodiment, an example in which the configuration of the active layer is different from that of Embodiment 1 will be described with reference to FIG. In FIG. 2, the same reference numerals are used for the portions corresponding to those in FIG.

The configuration shown in FIG. 2 differs from that shown in FIG. 1 in that the active layer has a zigzag or meandering shape. Such a shape is effective in reducing the area occupied by the active layer. The second different point from FIG. 1 is the shape of the gate electrode.

By adjusting the design pattern of the gate electrode, a channel forming region having a desired width can be formed. In this embodiment, the channel forming region 10 having the channel length a is used.
In order to form 6, a gate electrode portion as shown by 201 is formed. Further, a channel forming region 1 having a channel length b
In order to form the channel formation region 108 having a channel length of 07 and a channel length c, gate electrode portions 202 and 203 are formed, respectively.

Of course, the shape of the active layer and the shape of the gate electrode to which the first invention can be applied are not limited to the shapes shown in this embodiment, but may be appropriately determined by the practitioner as needed. Needless to say, it's good.

By using the gate electrode as described above, it is possible to form an active layer in which the width of the channel formation region becomes narrower as approaching the drain region 102 (a>b> c in the figure). it can.

[Embodiment 3] The configurations shown in the embodiments 1 and 2 are effective when the positions of the source region and the drain region are fixed. For example, when configuring a drive circuit of an active matrix electro-optical device, the source / drain regions are fixed.

However, the pixels T arranged in the pixel matrix circuit of the active matrix electro-optical device
Since the FT repeats charging and discharging of electric charge, the source region and the drain region are replaced each time charging / discharging is performed. In this case, the first invention cannot be implemented with the configurations shown in the first and second embodiments.

Therefore, in such a case, as shown in FIG. 3, the widths of the gate electrodes 303 and 305 on the side closer to the source region (or drain region) 301 and the drain region (or source region) 302 are changed. It is necessary to have a configuration that is narrower than that.

In this embodiment, when the channel length of the channel formation region 307 is b, the channel formation regions 306 and 30
Channel length a shorter than channel length b
And It is desirable that the gate electrode has a symmetrical structure on the source side and the drain side in order to maintain the symmetry of the TFT operation.

[Embodiment 4] In this embodiment, the structure of an active layer and a gate electrode of a thin film transistor utilizing the second invention will be described. FIG. 5 is used for the description.

In FIG. 5, reference numeral 501 denotes a source region;
2 is a drain region and 503 is a gate electrode. The gate electrode 503 has a structure in which the electrode width is locally increased. Therefore, the channel forming region 504 formed according to the shape of the gate electrode 503 becomes wider from the end in the channel width direction of the active layer toward the inside of the active layer (toward the direction indicated by the arrow in the figure).

Here, a process until the present inventor reaches the second invention will be described. With regard to the phenomenon that a thin film transistor using an active layer having a wide channel width tends to deteriorate from the vicinity of the center of the active layer, the present inventors consider that the effect of heat accumulation due to the difficulty in radiating heat near the center of the active layer is large. Thought.

Therefore, it is necessary to reduce the amount of current flowing near the center of the active layer and to suppress the generation of heat. Therefore, it was considered important to increase the channel length near the center of the active layer and form a region having a large resistance component to suppress the amount of current.

This embodiment shows a technique invented on the basis of the inventor's idea as described above, in which the shape of the gate electrode 503 is locally changed (widened) above the active layer. Thus, a large current is prevented from flowing near the center of the active layer.

As described above, the gist of the second invention shown in this embodiment is to increase the channel length near the center of the active layer,
It is to suppress the generation of heat due to a large current. Therefore,
With this in mind, the structure and shape of the gate electrode can be freely designed as required by the practitioner.

[Embodiment 5] In this embodiment, an example is shown in which the heat radiation effect by the shape of the active layer is combined with the second invention shown in Embodiment 4. FIG. 6 is used for the description.

The feature of the active layer shown in FIG. 6 is that a slit is provided locally. That is, a part of the active layer is hollowed out, and three active layers having a substantially narrow channel width are connected in parallel. Note that the number of slits can be changed as appropriate.

In FIG. 6, reference numeral 601 denotes a source region;
2 is a drain region, 603 is a gate electrode, 604 to 60
Reference numeral 6 denotes a channel forming region formed immediately below the gate electrode 603. The channel forming regions 604 and 606 have the same channel length, and the channel forming region 605 has a longer channel length than other regions.

The feature of this embodiment is that since the active layer is provided with slits, the generated heat can be easily radiated. Therefore, the generation of high heat is suppressed by reducing the amount of current flowing according to the second invention,
Further, by providing the slit, the heat radiation effect can be more efficiently performed.

[Embodiment 6] The first embodiment described in Embodiments 1-3
By combining the present invention with the second invention described in Embodiments 4 and 5, a thin film transistor having a more reliable multi-gate structure can be manufactured.

That is, according to the first invention, it is possible to prevent the thin film transistor near the drain region from deteriorating, and according to the second invention, it is possible to prevent deterioration of the active layer near the center due to heat generation.

This embodiment is a technique particularly effective for, for example, a thin film transistor for a drive circuit which operates at a high speed while handling a large current. [Embodiment 7] The thin film transistors described in Embodiments 1 to 6 can constitute an active matrix type electro-optical device (liquid crystal display device, EL display device, EC display device, etc.). For example, in a liquid crystal display device in which a pixel matrix circuit and a drive circuit are integrally formed on the same substrate, the first invention is effective for a pixel matrix circuit to which a high voltage is applied. Is effective in the second invention.

The thin film transistor using the present invention can be applied to electronic equipment using the above electro-optical device as a display medium. The electronic device will be described below with reference to the drawings.

As a semiconductor device utilizing the present invention, a TV
Examples include a camera, a head-mounted display, a car navigation, a projection, a video camera, and a personal computer. A brief description is given with reference to FIG.

FIG. 7A shows a mobile computer, which includes a main body 2001, a camera section 2002, and an image receiving section 200.
3, an operation switch 2004, and a display device 2005. The present invention is applied to the display device 2005 and the integrated circuit 2006 incorporated in the device.

FIG. 7B shows a head-mounted display, which includes a main body 2101, a display device 2102, and a band 2
103. Two display devices 2102 having a relatively small size are used.

FIG. 7C shows a car navigation system.
Main body 2101, display device 2102, operation switch 210
3. It is composed of an antenna 2104. The present invention can be applied to the display device 2102 and the integrated circuit 2105 in the device.

FIG. 7D shows a mobile phone, which is a main body 230.
1, audio output unit 2302, audio input unit 2303, display device 2304, operation switch 2305, antenna 2306
It consists of. The present invention can be applied to the display device 2304 and the integrated circuit 2105 in the device.

FIG. 7E shows a video camera,
401, display device 2402, audio input unit 2403, operation switch 2404, battery 2405, image receiving unit 240
6. The present invention can be applied to the display device 2402 and the integrated circuit 2407 in the device.

FIG. 7F shows a front projection, which includes a main body 2501, a light source 2502, and a reflective display device 2.
503, an optical system 2504, and a screen 2505. Since the screen 2505 is a large screen used for presentation, the display device 2503
Requires high resolution.

It should be noted that the semiconductor device in this specification is a word indicating a “device driven by using a semiconductor”.
The above-described electro-optical device, electronic device, and the like are considered to be included in the category of the semiconductor device.

As described above, by implementing the present invention, the reliability of various semiconductor devices can be improved. Therefore, the present invention can be said to be a very useful technology in industry or industry.

[0069]

According to the present invention, a phenomenon in which an electric field is locally concentrated in a thin film transistor having a multi-gate structure can be reduced. In other words, it is possible to prevent the deterioration which has a high probability of occurring as approaching the drain region.

Further, by suppressing the amount of current flowing near the center of the active layer, it becomes possible to reduce destruction or deterioration due to heat.

As described above, by using the present invention, the destruction or deterioration of a semiconductor device (semiconductor element) typified by a thin film transistor is prevented, and a semiconductor device having high reliability using such a semiconductor element is used. Can be configured.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating a configuration of an active layer and a gate electrode.

FIG. 2 is a diagram illustrating a configuration of an active layer and a gate electrode.

FIG. 3 is a diagram illustrating a configuration of an active layer and a gate electrode.

FIG. 4 is a diagram illustrating the configuration of an active layer and a gate electrode.

FIG. 5 is a diagram for explaining a configuration of an active layer and a gate electrode.

FIG. 6 is a diagram illustrating a configuration of an active layer and a gate electrode.

FIG. 7 illustrates an example of an electronic device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 101 Source region 102 Drain region 103 Gate electrode 104 Gate electrode 105 Gate electrode 106 Channel formation region 107 Channel formation region 108 Channel formation region

Claims (7)

[Claims] 1. A semiconductor device comprising at least an active layer, a gate insulating film, and a gate electrode overlapping with the active layer via the gate insulating film, wherein the gate electrode is substantially connected in common. A semiconductor device having a structure that can be regarded as a plurality of gate electrodes, and a width of a gate electrode closest to a drain region among the plurality of gate electrodes is the narrowest. 2. A semiconductor device having at least an active layer, a gate insulating film, and a gate electrode overlapping the active layer via the gate insulating film, wherein the gate electrode is substantially connected in common. A semiconductor device having a structure that can be regarded as a plurality of gate electrodes, and wherein the widths of the plurality of gate electrodes are gradually reduced as approaching the drain region. 3. A semiconductor device having at least an active layer, a gate insulating film, and a gate electrode overlapping the active layer via the gate insulating film, wherein the gate electrode is substantially connected to a common electrode. A semiconductor device having a structure that can be regarded as a plurality of gate electrodes, and the width of a channel formation region formed in the active layer is narrower as the channel formation region is closer to the drain region. 4. A semiconductor device having at least an active layer, a gate insulating film, and a gate electrode overlapping the active layer via the gate insulating film, wherein the gate electrode is substantially connected to a common electrode. A semiconductor device having a structure that can be regarded as a plurality of gate electrodes, and wherein the width of a channel formation region formed in the active layer gradually decreases as approaching the drain region. 5. A semiconductor device having at least an active layer, a gate insulating film, and a gate electrode overlapping with the active layer via the gate insulating film, wherein the gate is formed in a channel width direction of the active layer. A semiconductor device, wherein the width of an electrode changes. 6. A semiconductor device having at least an active layer, a gate insulating film, and a gate electrode overlapping with the active layer via the gate insulating film, wherein an end of the active layer in a channel width direction is provided. A width of the gate electrode increases as approaching the inside of the active layer. 7. The semiconductor device according to claim 1, wherein said active layer is formed of a crystalline silicon film.