JPH10150117A - Tape type ball grid array semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a tape type ball grid array semiconductor device with which the reliability of connection by solder balls can be improved and the distortion generated on the solder balls can be reduced by a method wherein the difference in thermal expansion between a tape type wiring substrate and an external substrate when a semiconductor package is heated up is decreased and the generation of warpage of the tape type wiring substrate is suppressed. SOLUTION: A frame 5 is bonded to a tape type wiring substrate 2 on which a semiconductor chip 1 is mounted. A notch 8 is provided at least on the outer circumferential part of a part of the tape type wiring substrate 2 and the frame 5. A notch is provided on the corner part on the outer circumferential side of the frame 5 and a plurality of notches are provided on the outer circumferential part of the frame 5. Besides, the circumferential surface of the frame 5 may be integrally sealed together with the semiconductor chip 1 and the tape type wiring substrate 2 by sealing resin 4.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a ball grid array type semiconductor device using a tape type wiring substrate, and more particularly to a tape type ball grid array type semiconductor device suitable for improving the reliability of connection to an external substrate. Related to the device.

[0002]

2. Description of the Related Art An example of a semiconductor device having a structure using a tape-type wiring board is disclosed in, for example, JP-A-5-2515.
As disclosed in Japanese Patent Laid-Open Publication No. 02-102, there is a Tape Carrier Package (hereinafter abbreviated as TCP) using a tape-type wiring substrate. In this method, electrical connection with an external substrate is performed using leads, and a structure in which a thermal expansion difference between the mounted semiconductor package and the external substrate is absorbed by deformation of the tape-type wiring substrate and the external leads. In addition, a filler having high elasticity, a low coefficient of thermal expansion, and moisture resistance is added to the inner lead portion that electrically connects the semiconductor chip and the tape-type wiring substrate so that a difference in thermal expansion from the external substrate is not added. An epoxy-based encapsulant is used to seal around the inner leads and the circuit surface of the chip. Further, the tape-type wiring board is warped due to heating when mounted on an external board. In the above-mentioned prior art, a countermeasure against the warp is specified. However, TCP in this prior art
Then, since the semiconductor package itself has a flexible structure, it is possible to correct the position shift of the lead due to the warpage of the tape-type wiring board by mounting the external lead or the like by deforming, and the allowable value of the warpage is as follows. It is considered relatively large.

[0003] A tape-type ball grid array (hereinafter, abbreviated as BGA) has been developed for the TCP. This is because, as shown in cross section in FIG.
Solder balls are arranged on the lower surface of the tape-type wiring board of the CP, and are mounted on an external substrate using the solder balls. That is, a tape-type wiring board 1 having a wiring pattern and solder pads connected to the wiring pattern
2, a semiconductor chip 11 is loaded inside the semiconductor chip 1.
The electrode 1 and the wiring pattern on the tape-type wiring substrate 12 are electrically connected by the inner leads 13, and the circuit surface of the semiconductor chip 11 and the periphery of the inner leads 13 are formed of the sealing resin 1.
4 and two-dimensionally arranged solder balls 16 for establishing electrical continuity with the external substrate 18. The wiring pattern on the tape-type wiring board 12 and each of the solder pads are electrically insulated by the solder resist 17.

[0004]

A BG as shown in FIG.
The A-type semiconductor device has an external substrate 18 formed by solder balls 16 two-dimensionally arranged on the lower surface of the tape-type wiring substrate 12.
Therefore, the solder balls 16 directly bear the difference in thermal expansion between the semiconductor package and the external substrate 18. The thermal expansion coefficient of a polyimide tape generally used as a base material of the tape-type wiring substrate 12 has a variety of types, from those close to the mounting substrate 18 to those having a considerably small value. In the part, the thermal deformation of the tape type wiring board 12 is
Be bound by. For this reason, the difference in thermal expansion between the tape type wiring board 12 and the external board 18 increases, and the solder balls 16
Therefore, there is a problem in that the connection reliability including the fatigue strength of the connection portion is reduced due to the above. Moreover, recently, the number of pins (the number of leads) of the semiconductor device has been increasing more and more, and the size of the semiconductor chip 11 has increased as the number of pins has increased. Since the distance to the connection part is shortened, the load on the connection part by the solder ball 16 is further increased.

At this time, the sealing resin 14 for sealing the inner leads 13 and the circuit surface of the semiconductor chip 11 is
If the material is changed to a material having a lower elasticity and a higher thermal expansion than that used in the CP, the restraint of the thermal deformation of the tape-type wiring substrate 12 by the semiconductor chip 11 is eased.
6 is reduced. However, making the sealing resin 14 low in elasticity means reducing the filler content in the material, so that the semiconductor chip 11
The moisture resistance, which is important for protecting the circuit surface, deteriorates. Therefore, it is not preferable to decrease the filler content of the sealing resin to lower the elasticity and increase the coefficient of thermal expansion.

Also, for example, when the semiconductor chip 11 is heated during operation or the like, the tape-type wiring board 12 is warped. However, in the above-described TCP, the warp does not cause a problem in connection reliability. However, in the case of the BGA, the occurrence of warpage of the tape-type wiring board 12 becomes a problem. This is because, when the tape-type wiring board 12 is warped due to heating at the time of mounting on the external board 18, the height of the solder ball 16 changes depending on the location. This is because the solder ball 16 and the external substrate 18 may sometimes be in a non-contact state. Moreover, as the number of pins increases in recent semiconductor devices, the area of the tape-type wiring board increases and the solder ball diameter also decreases, so that the allowable value of the warpage of the tape-type wiring board becomes smaller. Therefore, realizing a structure that suppresses the warpage of the tape-type wiring board when the semiconductor package is heated is indispensable for improving the connection reliability.

An object of the present invention is to reduce the difference in thermal expansion between a tape-type wiring substrate and an external substrate when a semiconductor package is heated and to suppress the occurrence of warpage of the tape-type wiring substrate. An object of the present invention is to provide a tape-type ball grid array type semiconductor device capable of improving connection reliability and reducing a distortion generated in a solder ball.

[0008]

According to the present invention, there is provided a tape type wiring board having a semiconductor chip, a wiring pattern and a solder pad connected to the wiring pattern, and a tape type wiring board on the tape type wiring board. A solder resist that electrically insulates between each of the wiring patterns and the solder pads; an inner lead that electrically connects an electrode of the semiconductor chip to a wiring pattern on the tape-type wiring board; Tape-type ball grid array type having a sealing material for sealing a circuit surface and inner leads, and a solder ball disposed on a lower surface of the tape-type wiring board for establishing electrical continuity between an external substrate and a solder pad. In the semiconductor device, a frame for reinforcing the tape-type wiring board is bonded to the upper surface of the tape-type wiring board, and is bonded. Tape-type Ball Grid Array semiconductor device characterized by providing a notch on at least a portion of the outer peripheral portion in are provided.

Here, the notch may be provided at the outer peripheral corner of the frame, or a plurality of the notches may be provided at the outer peripheral portion of the frame.

Further, in addition to the frame, a notch may be provided in at least a part of an outer peripheral portion of the tape-type wiring board. And may be provided at the same position as.

By the way, when the semiconductor package is heated, the outer peripheral portion of the tape-type wiring substrate undergoes thermal deformation according to the thermal expansion coefficient of the tape itself, whereas the inner peripheral portion of the tape-type wiring substrate has its inner peripheral portion. Due to the high rigidity of the encapsulating material sealing, the semiconductor material is thermally deformed while being restrained by the semiconductor chip,
A difference in thermal deformation occurs between the outer peripheral portion and the inner peripheral portion. As a result, the outer peripheral portion of the tape-type wiring board is more deformed, and warpage occurs in the vertical direction. This warpage is particularly large at the outer corner, and the amount of warpage is further increased by the bimetal effect between the wiring pattern of the copper foil, the solder resist, or the adhesive and the tape-type wiring board. On the other hand, by bonding the frame to almost the entire upper surface of the tape-type wiring board, it is possible to secure the rigidity of the solder ball portion. Warpage occurs due to the difference in thermal deformation between the inner peripheral portion and the outer peripheral portion of the frame.

In the present invention, the difference in the amount of thermal deformation between the inner peripheral side and the outer peripheral side of the tape-type wiring board and the occurrence of warpage are reduced by providing notches in at least a part of the outer peripheral portion of the bonded frame. it can. If a frame is adhered to the entire upper surface of the tape-type wiring board, the amount of warpage is substantially reduced by half as compared with the case where no frame is provided. Or at the corners,
By providing notches on at least a part of the outer peripheral portions of both the tape-type wiring board and the frame, warpage can be reduced while securing the rigidity of the solder ball portion (by providing a plurality of notches on the outer peripheral portion of the frame) ( (See FIG. 4). In this way, the thermal expansion difference between the tape-type wiring board and the external board when the semiconductor package is heated is reduced, and the occurrence of warpage of the tape-type wiring board is suppressed, thereby improving the reliability of connection by solder balls. It is possible to do. In addition, it is possible to greatly reduce the distortion caused by the thermal deformation of the frame, particularly at the solder ball connection portion near the semiconductor chip.

Further, according to the present invention, a semiconductor chip,
A tape-type wiring substrate having a wiring pattern and a solder pad connected to the wiring pattern, a solder resist for electrically insulating between the wiring pattern and the solder pad on the tape-type wiring substrate, and an electrode of the semiconductor chip. An inner lead for electrically connecting a wiring pattern on the tape-type wiring board; a sealing material for sealing a circuit surface of the semiconductor chip and the inner lead; In a tape type ball grid array type semiconductor device having a solder ball for taking electrical conduction between a substrate and a solder pad,
A frame for reinforcing the tape-type wiring board is bonded to the upper surface of the tape-type wiring board, and an inner peripheral side surface of the frame is integrally sealed with the semiconductor chip and the tape-type wiring board by the sealing material. And a tape-type ball grid array type semiconductor device.

Here, a notch may be provided in at least a part of an outer peripheral portion of the frame, and in addition, a notch may be provided in at least a part of an outer peripheral portion of the tape-type wiring board. Good.

As described above, the inner peripheral side surface of the frame is integrally sealed with the semiconductor chip and the tape-type wiring board by the sealing material, so that the frame is adhered to almost the entire upper surface of the tape-type wiring board, or Irrespective of whether a notch is provided in at least a part of the portion, it is possible to increase the rigidity of the sealing material and prevent the tape-type wiring board from warping.

[0016]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A first embodiment of the present invention will be described with reference to FIGS. FIG. 1 is a perspective view of the semiconductor device according to the present embodiment, and FIG. 2 is a sectional view of the semiconductor device according to the present embodiment. However, in FIG. 1, a part is shown in a sectional view. As shown in FIGS. 1 and 2, a semiconductor chip 1 is mounted on an inner peripheral portion of a frame-shaped tape-type wiring substrate 2 provided with a wiring pattern and a solder pad on a lower surface, and provided on a peripheral portion of the semiconductor chip 1. The electrode and the wiring pattern are connected by the inner lead 3. The circuit surface of the semiconductor chip 1 and the window around the inner leads are sealed by the sealing resin 4, and the solder pads are provided with solder balls 6 for establishing electrical continuity with the external substrate. Further, the tape type wiring board 2
A frame 5 is adhered to the upper surface of the tape type wiring board 2, and a notch 8 is provided at a corner on the outer peripheral side of the tape-type wiring board 2 and the frame 5.

An outline of a procedure for manufacturing the semiconductor device will be described. The tape-type wiring board 2 uses a polyimide tape as a base material, is cut into a frame shape, and has a notch 8 at a corner on the outer peripheral side. It is preferable to use a tape-type wiring board 2 having a coefficient of linear expansion larger than that of the semiconductor chip 1. A copper foil is adhered to the base material of the polyimide tape by an adhesive, and an etching process is performed according to a wiring pattern shape and a solder pad shape, thereby forming a wiring pattern and an inner lead portion. Further, in order to prevent a leak (short circuit) between the wiring patterns formed on the base material, a solder resist 7 is applied between the wiring patterns excluding the solder pad surface to perform electrical insulation. First, the semiconductor chip 1
The surface opposite to the circuit surface is fixed by suction or the like, and the outer peripheral portion of the semiconductor chip 1 and the inner peripheral portion of the frame-shaped tape-type wiring board 2 are loaded together. Next, TAB is placed on the gold ball formed on the electrode in the peripheral portion of the semiconductor chip 1.
The inner leads 3 are bonded by a (Tape Automated Bonding) method. Alternatively, the inner leads 3 obtained by plating a copper foil with Ni or Au may be bonded one by one on the aluminum electrodes of the semiconductor chip 1.

Next, in order to maintain the moisture resistance of the semiconductor device (semiconductor package) and the connection reliability of the inner leads, the circuit surface of the semiconductor chip 1 and the window around the inner leads 3 are sealed with an epoxy-based sealing resin 4. Seal. In this case, as the sealing resin 4, the one having a larger filler content is more excellent in moisture resistance, so it is better to use at least a liquid resin containing a filler.

As the frame 5, for example, a thin plate material similar to the material used for a lead frame is used, and a notch 8 is provided at a corner on the outer peripheral side by punching or etching. Then, the frame 5 is fixed to the tape-type wiring board 2 via an adhesive. Alternatively, in the same step as forming the wiring pattern, the frame 5 may be formed using a copper foil of the same material as the wiring pattern. The size of the frame 5 is preferably made slightly smaller on the inner peripheral side than on the outer periphery of the tape-type wiring board 2, as well as on the outer peripheral side of the semiconductor chip 1. .1 to 0.3 mm
It is preferable to set the value within the range. The material of the frame 5 is such that the coefficient of linear expansion is equal to or greater than the coefficient of linear expansion of the base material (polyimide tape) of the tape-type wiring board 2 and the linear expansion coefficient of the external board (generally, glass epoxy) It is preferable to use copper-based or aluminum-based material because it is better to be close to the coefficient of expansion.However, when using an organic material such as resin, select a material that has high rigidity and meets the above-described conditions of the linear expansion coefficient. I decided to.

The solder balls 6 are formed by transferring the manufactured solder balls to predetermined positions using a mask and heating them at a high temperature, or printing solder paste on solder pads on the tape-type wiring board 2 using a mask. And formed by high-temperature heating.

Next, the operation and effect of this embodiment will be described.
First, a description will be given of a warping mechanism of the tape-type wiring board when the semiconductor package is heated when the frame 5 is not bonded as described above with reference to FIG. However, FIG.
Is a diagram showing a part of a semiconductor device as a whistle, with solder balls and the like omitted. When the semiconductor package is heated, the outer peripheral portion of the tape-type wiring substrate 12 undergoes thermal deformation according to the thermal expansion coefficient of the tape itself, whereas the inner peripheral portion of the tape-type wiring substrate 12 seals the inner peripheral portion. Since the sealing resin 14 has high rigidity, it is thermally deformed while being restrained by the semiconductor chip 11, and a difference in thermal deformation occurs between the outer peripheral portion and the inner peripheral portion. Thereby, the tape type wiring board 12
The outer peripheral portion is more deformed and warps vertically. This warp is particularly large at the outer peripheral corner,
Further, the amount of warpage is further increased by the bimetal effect between the wiring pattern of the copper foil, the solder resist, or the adhesive and the tape-type wiring substrate.

On the other hand, by bonding the frame to almost the entire upper surface of the tape-type wiring board 12, it is possible to secure the rigidity of the solder balls. Since the thermal deformation follows the thermal deformation of the frame, it is inevitable that warpage occurs due to the difference in thermal deformation between the inner peripheral portion and the outer peripheral portion of the frame.

However, in this embodiment, the notch 8 is provided in at least a part of the outer peripheral portion of the bonded frame 5, specifically, the outer peripheral corner and the outer peripheral corner of the tape-type wiring board 2. Thereby, the difference in the amount of thermal deformation between the inner peripheral side and the outer peripheral side of the tape type wiring board 2 and the occurrence of warpage can be reduced.

FIG. 4 shows the relative value of the amount of warpage of the tape-type wiring board due to temperature change (heating). Here, (A) the case of the entire frame (the case where the frame is provided on the entire surface of the tape-type wiring board), (B) the case of the outer peripheral corner notch (the frame at the outer peripheral corner of the tape-type wiring board and the frame) ), (C)
(D) When notches are provided on the outer peripheral corners of only the frame (described later in the second embodiment), (D) When a plurality of notches are provided on the outer peripheral side of the frame (described later in the third embodiment) , (E) were compared without the frame. In the case where the entire frame is provided (A), the amount of warpage is halved compared to the case without the frame (E). However, in the case where the frame is provided at the outer peripheral corner of the tape-type wiring board and the frame (B), or only the frame is provided. In the case where a notch is provided in the outer peripheral side corner (C) or in the case where a plurality of notches are provided on the outer peripheral side of the frame (D), the amount of warpage is further reduced.

According to the present embodiment as described above, the notch 8 is provided at the outer peripheral corner of the frame 5 and the tape-type wiring board 2, so that the heat on the inner peripheral side and the outer peripheral side of the tape-type wiring board 2 can be improved. The difference in the amount of deformation and the occurrence of warpage can be reduced. As a result, the reliability of the connection by the solder ball 6 can be improved, and the distortion generated in the solder ball 6 can be greatly reduced.

Next, second and third embodiments of the present invention will be described with reference to FIGS. 5 and 6, respectively. FIGS. 5 and 6 are perspective views of the semiconductor device according to the second and third embodiments, respectively.
In FIG. 6, the same members as those in FIG. 1 are denoted by the same reference numerals. In the second embodiment, a notch 8a is provided on the outer peripheral corner of only the frame 5, and in the third embodiment, a plurality of notches 8b are provided on the outer peripheral side of only the frame 5. 5 corresponds to FIG. 4C, and FIG. 6 corresponds to FIG. 4D. According to these embodiments, substantially the same effects as those of the first embodiment can be obtained. In the case of the third embodiment, a plurality of notches may be provided on the outer peripheral portion of the tape-type wiring board 2.

Next, a fourth embodiment of the present invention will be described.
This will be described with reference to FIG. FIG. 7 is a sectional view of the semiconductor device according to the present embodiment, and the same reference numerals are given to members equivalent to those in FIG.

In this embodiment, the manufacturing procedure is slightly different from that of the first embodiment. Before bonding the inner leads 3 formed on the tape-type wiring substrate 2 to the electrodes on the semiconductor chip 1, the frame 5 is previously tape-type. It is fixed to the wiring board 2 via an adhesive. The inner periphery of the frame 5 at this time is the semiconductor chip 1
Larger than the outer circumference of. When the circuit surface of the semiconductor chip 1 and the window around the inner leads 3 are sealed with the epoxy-based sealing resin 4, the inner surface of the frame 5 and the tape-type wiring board 2 are integrally sealed together. I do.

As described above, the inner peripheral side surface of the frame 5 is integrally sealed together with the semiconductor chip 1 and the tape-type wiring board 2 by the sealing resin 4, so that the frame 5 covers almost the entire upper surface of the tape-type wiring board 2. The rigidity of the sealing resin 4 can be increased to prevent the tape-type wiring board 4 from warping, regardless of whether the bonding is performed or a notch is provided in at least a part of the outer peripheral portion of the frame 5. As a result, the reliability of the connection by the solder ball can be improved, and the distortion generated in the solder ball is greatly reduced.

Next, a fifth embodiment of the present invention will be described.
This will be described with reference to FIG. FIG. 8 is a perspective view of the semiconductor device according to the present embodiment, and the same members as those in FIG. 1 are denoted by the same reference numerals. In the present embodiment, similarly to the fourth embodiment, the inner peripheral side surface of the frame 5 is integrally sealed together with the semiconductor chip 1 and the tape-type wiring board 2 by the sealing resin 4. Similarly, a notch 8 is provided in the outer peripheral corner of the frame 5 and the tape-type wiring board 2. According to this embodiment, the effects of both the first embodiment and the fourth embodiment can be obtained, and the reliability of connection by the solder balls 6 can be further improved. In this embodiment, as in the second or third embodiment,
A notch may be provided on the outer peripheral side corner of only the frame, or a plurality of notches may be provided on the outer peripheral side of the frame.

[0031]

According to the present invention, a notch is provided in at least a part of the outer peripheral portion of the bonded frame (for example, a notch is provided at an outer peripheral corner of the frame, or a plurality of notches are provided at the outer peripheral portion of the frame). Alternatively, by providing a notch in at least a part of the outer peripheral portion of both the tape-type wiring board and the frame,
The difference in the amount of thermal deformation between the inner peripheral side and the outer peripheral side of the tape-type wiring board and the occurrence of warpage can be reduced. As a result, the reliability of the connection by the solder ball can be improved, and the distortion generated in the solder ball can be greatly reduced.

Further, since the inner peripheral side surface of the frame is integrally sealed together with the semiconductor chip and the tape-type wiring substrate, the frame is adhered to almost the entire upper surface of the tape-type wiring substrate, or a notch is formed in at least a part of the outer peripheral portion. Regardless of the provision, the rigidity of the sealing material can be increased to prevent the tape-type wiring board from warping.

[Brief description of the drawings]

FIG. 1 is a perspective view of a semiconductor device according to a first embodiment of the present invention, showing a partial cross section.

FIG. 2 is a sectional view of the semiconductor device shown in FIG. 1;

FIG. 3 is a diagram for explaining a warp generation mechanism of the tape-type wiring board when the semiconductor package is heated.

FIG. 4 is a diagram comparing the relative values of the amount of warpage of the tape-type wiring board due to a temperature change (heating).

FIG. 5 is a perspective view of a semiconductor device according to a second embodiment of the present invention, showing a partial cross section.

FIG. 6 is a perspective view of a semiconductor device according to a third embodiment of the present invention, showing a partial cross section.

FIG. 7 is a sectional view of a semiconductor device according to a fourth embodiment of the present invention.

FIG. 8 is a perspective view of a semiconductor device according to a fifth embodiment of the present invention, showing a partial cross section.

FIG. 9 is a sectional view of a conventional general tape-type ball grid array (BGA).

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Semiconductor chip 2 Tape-type wiring board 3 Inner lead 4 Sealing resin 5 Frame 6 Solder ball 7 Solder resist 8, 8a, 8b Notch

 ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Naotaka Tanaka 502 Kandate-cho, Tsuchiura-shi, Ibaraki Pref. Machinery Research Laboratory, Hitachi, Ltd. (72) Inventor Ichiro Yasui 5--20-1, Josuihoncho, Kodaira-shi, Tokyo Hitachi Semiconductor Co., Ltd. (72) Ryo Haruta, Inventor 5--20-1, Kamimizu Honcho, Kodaira-shi, Tokyo Hitachi Semiconductor Co., Ltd. (72) Inventor Asao Nishimura 5-Chome, Josui-Honcho, Kodaira-shi, Tokyo No. 20 No. 1 Hitachi Semiconductor Co., Ltd. (72) Inventor Junichi Saeki 292 Yoshida-cho, Totsuka-ku, Yokohama, Kanagawa

Claims (8)

[Claims] 1. A tape type wiring board having a semiconductor chip, a wiring pattern and a solder pad connected to the wiring pattern, and a solder for electrically insulating each of the wiring pattern and the solder pad on the tape type wiring board. A resist, an inner lead that electrically connects the electrode of the semiconductor chip and the wiring pattern on the tape-type wiring board, a sealing material that seals the circuit surface of the semiconductor chip and the inner lead, In a tape-type ball grid array type semiconductor device having a solder ball disposed on a lower surface of the tape-type wiring substrate and for establishing electrical continuity between the solder pad and an external substrate, the tape-type wiring is provided on an upper surface of the tape-type wiring substrate. A frame for reinforcing the substrate is bonded, and at least a part of an outer peripheral portion of the bonded frame is cut out. Tape-type Ball Grid Array type semiconductor device, wherein a is provided. 2. The tape-type ball grid array type semiconductor device according to claim 1, wherein the notch is provided at an outer peripheral side corner of the frame. 3. The tape-type ball grid array type semiconductor device according to claim 1, wherein a plurality of the notches are provided on an outer peripheral portion of the frame. . 4. The tape-type ball grid array type semiconductor device according to claim 1, further comprising a notch provided in at least a part of an outer peripheral portion of said tape-type wiring substrate. Characteristic tape type ball grid array type semiconductor device. 5. The tape-type ball grid array type semiconductor device according to claim 4, wherein a notch in an outer peripheral portion of the tape-type wiring board is provided at the same position as a notch in the frame. Tape type ball grid array type semiconductor device. 6. A tape type wiring board having a semiconductor chip, a wiring pattern and a solder pad connected to the wiring pattern, and a solder for electrically insulating each of the wiring pattern and the solder pad on the tape type wiring board. A resist, an inner lead that electrically connects the electrode of the semiconductor chip and the wiring pattern on the tape-type wiring board, a sealing material that seals the circuit surface of the semiconductor chip and the inner lead, In a tape-type ball grid array type semiconductor device having a solder ball disposed on a lower surface of the tape-type wiring substrate and a solder ball for establishing electrical conduction between the solder pad and an external substrate, A frame for reinforcing a wiring board is bonded, and the inner peripheral side surface of the frame is formed by the semiconductor chip and the tape type. Tape-type Ball Grid Array type semiconductor device which is characterized in that sealed integrally sealed by the sealing material together with the line board. 7. The tape type ball grid array type semiconductor device according to claim 6, wherein a notch is provided in at least a part of an outer peripheral portion of the frame. Semiconductor device. 8. The tape-type ball grid array semiconductor device according to claim 7, further comprising a notch provided in at least a part of an outer peripheral portion of said tape-type wiring board. Type semiconductor device.