JPH10144876A - High integration ferroelectric memory - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a high integration ferroelectric memory in which relative number of malfunctioning element elements can be decreased even if fine patterning is accelerated by specifying the half-band width of X-ray diffraction and diffraction angle indicative of the ferroelectricity of a crystalline ferroelectric material constituting a ferroelectric capacitor. SOLUTION: The high integration ferroelectric memory comprises a ferroelectric capacitor wherein the half-band width Δωdeg. of the rocking curve of X-ray diffraction from the crystalline structure indicative of ferroelectricity of a crystalline ferroelectric material constituting the capacitor and the diffraction angle θ0 providing a diffraction peak of θ-2θmethod satisfy formula (b) and the degree of integration is 1Gbit or above. In the formula, θ0 degree on θ-axis, S: area of ferroelectric capacitor μm<2> , d: thickness of ferroelectric μm, r: mean radius of ferroelectric particles μm. Since a crystalline ferroelectric layer having arranged orientation is employed, fluctuation can be suppressed in the ferroelectric characteristics of a high integration ferroelectric capacitor.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] The present invention relates to a super LSI (Large S)
The present invention relates to a storage element (memory) suitable for a semiconductor device such as a cale integrated circuit.

[0002]

2. Description of the Related Art A dynamic random access memory (DRAM) has attained a fourfold higher integration in three years. However, the capacitor area has been reduced due to the higher integration, and the cell structure has been complicated and the cost has been increased. There are concerns about such issues as rising prices. Therefore, instead of silicon oxide and silicon nitride, which have been used as capacitor insulating films,
It is being studied to apply a high dielectric substance having a very large relative dielectric constant of several hundreds to several thousands, such as BST ((Ba _x Sr _1-x ) TiO ₃ ) or STO (SrTiO ₃ ), for the capacitor insulating film. . A technique related to this is described in, for example, Japanese Patent Application Laid-Open No. 7-86514.

On the other hand, PZT (Pb (Zr _x , Ti _1-x ))
O ₃ ), SBT (SrBi ₂ Ta ₂ O ₉ ), PLZT (Pb _1−y , La _y ) (Z
Research and development of so-called ferroelectric memories (or non-volatile DRAMs) that use polarization inversion hysteresis as the non-volatile principle for ferroelectrics such as r _x , Ti _1-x ) _{1-y / 4} O ₃ ) (Nikkei Electronics, February 1996).
No. 12, issue No. 655, p. 115). With respect to ferroelectric memories using PZT or PLZT, see, for example, JP-A-5-226322 and JP-A-6-177347.
JP, JP-A-7-78944, JP-A-7-94
681, JP-A-7-142600, JP-T-7-504784, JP-A-8-51165, JP-A-3-110861, and JP-A-5-343.
There are technical disclosures in JP-A-345-345 and JP-A-7-99252.

[0004]

A non-volatile DRAM using a ferroelectric uses inversion of spontaneous polarization of the ferroelectric, and the spontaneous polarization is closely related to the orientation direction of the ferroelectric. I have. At the integration of 1 megabit, the size of the capacitor is about 10 to ²⁰ μm ² , but it will be 1 gigabit in the future, and the capacitor area at this time will be about 0.12 μm ² . If the particle diameter of the ferroelectric particles is 0.1 μm, only about 10 ferroelectric particles are included in the in-plane direction of the capacitor, and one of these ferroelectric particles has a different orientation or contains impurities. If this occurs, the remanent polarization of the capacitor will be greatly reduced, and the capacitor will not operate as a memory.

As described above, as the device becomes finer, the number of ferroelectric particles contained in one memory device decreases.
In particular, in a nonvolatile memory having an integration degree of 1 gigabit or more, unless the orientation of the ferroelectric particles in the capacitor is increased, the number of malfunctioning elements increases.

The orientation of the ferroelectric material constituting the capacitance film of a memory element (memory element) is described in the above-mentioned Japanese Patent Application Laid-Open No. 7-86.
514, JP-A-5-226322, JP-A-6-177347, JP-A-7-78944, JP-A-7-94681, and JP-A-7-1426.
No. 00, JP-A-7-504784, and JP-A-8-51165 have comments. In particular, in Japanese Patent Application Laid-Open No. 7-142600, BaTiO ₃ , SrTiO ₃ , BaO, SrO, Ce are interposed between a platinum (Pt) thin film and a crystalline ferroelectric thin film made of PZT or PLZT.
By providing an orientation control layer made of O ₂ or MgO, the ferroelectric film has a film with high orientation having a peak curve in X-ray diffraction of its (111) crystal plane i having a half width of 4.4 °. It is taught to be formed as Japanese Patent Publication No. 7-504784 discloses a technique in which a conductive perovskite thin film is formed on a single crystal substrate, and a ferroelectric film made of PZT or PLZT is formed thereon. According to this publication, in order to realize an excellent ferroelectric memory, the c-axis orientation of the ferroelectric film (the c-axis of the crystal constituting the film should be oriented in the film thickness direction) should be 80% or more. Preferably, the technique is taught to be 90% or more, and as a means for achieving this, a technique is disclosed in which the ferroelectric film is grown at a transition temperature or higher and then cooled rapidly.

However, in any of the above publications, 1
In a ferroelectric memory device having an integration degree of giga bits or more, the orientation required for the ferroelectric particles constituting the capacitance film is not specifically discussed, and therefore, in producing a ferroelectric memory, No conditions (criteria) for maintaining product reliability could be found. In other words, if the crystal orientation of the capacitor film composed of ferroelectric crystals is perfectly aligned, the problem of remanent polarization does not emerge regardless of the degree of integration, but in reality, the orientation of the ferroelectric particles does not increase. It is difficult to completely suppress the variation of. For this reason, it is necessary to clarify the variation in the orientation that is allowed according to the degree of integration of the memory element, and the evaluation can be simplified by data such as X-ray diffraction (in other words, the memory in the production line). It can be checked by nondestructive inspection of the device). This demand increases as the miniaturization of the ferroelectric memory element progresses or as the degree of integration increases, and in a semiconductor device integrated with this element, the orientation of the ferroelectric particles is reduced in order to reduce the number of defective operation elements. Finding the lower limit is essential.

The problem to be solved by the present invention is to set the lower limit of the orientation of ferroelectric particles constituting a capacitor (capacitance film) required in a ferroelectric memory element having an integration degree of 1 gigabit or more. And to improve the yield of the highly integrated ferroelectric memory.

[0009]

As a result of repeated studies to solve the above-mentioned problems, we have found that in a highly integrated ferroelectric memory, the size and orientation of a capacitor required for the memory operation are required. And the relative number of malfunctioning elements can be reduced even if the elements are miniaturized.

That is, the present invention relates to a highly integrated ferroelectric memory using a ferroelectric film in which the variation in orientation is equal to or less than a certain value, and shows the ferroelectricity of a crystalline ferroelectric material constituting a ferroelectric capacitor. X-ray diffraction line (rocking curve) half width (Δω (°)) from crystal structure related to dipole moment and diffraction angle (θ ₀ , θ axis value (°) at which diffraction peak is given in θ-2θ method) ) According to the following equation (1).

[0011]

Δω / 2θ ₀ ≦ 0.068 × (S · d / ((4/3) · π · r ³ )) ^0.5 (1) where S: ferroelectric capacitor area (μm ² ), d:
Ferroelectric thickness (μm), r: average radius of ferroelectric particles (μ
m).

Hereinafter, the present invention will be described.

First, the relationship between the orientation of the ferroelectric particles and the ferroelectric properties will be described. Consider the case where the ferroelectric film is composed of ferroelectric particles. FIG. 2A illustrates the relationship between the orientation of ferroelectric particles and X-ray diffraction measurement (θ-2θ method). Assuming that the crystal plane spacing of the ferroelectric particles is d, the X-ray incident angle is θ, and the X-ray wavelength is λ, FIG.
When the crystal plane is horizontal to the substrate as in (a), an X-ray diffraction line is observed at a diffraction angle θ = θ ₀ that satisfies Expression (2) (where n is an integer).

[0014]

2d · sin θ ₀ = n · λ (2) However, the crystal plane may actually be inclined with respect to the substrate. In this case, evaluation is performed by rocking curve measurement. As shown in FIG. 2B, the crystal plane is α with respect to the substrate.
The case where it is inclined will be described. In the rocking curve method, the incident angle θ of X-rays is usually fixed to θ ₀ in equation (2), and X
The diffraction intensity is measured by scanning the diffraction angle ω of the line. In this case, an X-ray diffraction line is observed at a diffraction angle ω that satisfies the expression (3) (also defined as n: an integer).

[0015]

D · (cos (90−θ ₀ + α) + cos (90−ω + θ ₀ −α)) = n · λ (3) The variation in the direction of the crystal plane is represented by the variation of α.
In the line diffraction measurement, this is reflected in the variation of ω under the condition of equation (3).

FIG. 3 illustrates the relationship between the direction of the dipole moment of the ferroelectric particles and the dielectric polarization.

Assuming that the direction of the dipole moment (μ) of the ferroelectric particles is inclined by an angle β with respect to the direction perpendicular to the substrate, the dielectric polarization P is expressed by the following equation (4).

[0018]

P = N · μcosβ (N: number of dipoles per unit volume) (4) Variation of the direction (β) of the dipole moment indicates the dielectric polarization P
It can be seen that this is reflected in the variation in the value of. The following relationship holds between α and β (where A: constant,
Defined).

[0019]

Α = β + A (5) Therefore, from the expressions (3) and (5), the following relationship holds between β and θ (defined as n: integer, A: constant).

[0020]

D · (cos (90−θ ₀ + β + A) + cos (90−ω + θ ₀ −β−A)) = n · λ (6) The ferroelectric film composed of the ferroelectric particles is formed by two electrodes. FIG. 4B shows a typical example of the ferroelectric characteristic (hysteresis loop) of the sample (FIG. 4A) sandwiched between. Remanent polarization Pr +,
Although Pr- is generally not always the same, Pr-
In the expression, Pr is expressed by the equation (8) (B: defined as a proportional constant).

[0021]

## EQU7 ## Pr = B · P (7)

[0022]

## EQU8 ## Pr = B ・ N ・ μ ・ cosβ (8) FIG. 5B shows the memory characteristics of a circuit (FIG. 5A) using this ferroelectric sample. The output voltage (V) is (9),
It is represented by the equation (10) (defined as C: capacitance of a capacitor).

[0023]

V = 2 · Pr / C (9)

[0024]

V = 2 · B · N · μ · cos β / C (10) When the circuit of FIG. 5A is integrated, the detection voltage (V) of each circuit (FIG. 5B) Of the ferroelectric particles forming the ferroelectric capacitor forming the circuit, and the fluctuation of the diffraction angle ω observed by X-ray diffraction. And are related by equation (6).

Next, the variation of the output voltage of the integrated memory device will be considered with reference to FIG. In statistics, the standard deviation σ is an index indicating the variation in characteristics. As an example, it is assumed that the size of the ferroelectric particles is 0.05 μm and the cross section of the ferroelectric capacitor is a square. Hereinafter, for simplification, only the in-plane direction of the capacitor will be considered. One ferroelectric capacitor is 1 (pcs /
Assuming that the ferroelectric particles are composed of ferroelectric particles (in the plane of the capacitor), for example, about 10 ¹² ferroelectric capacitors can exist on a 5-inch wafer. It is considered that the output voltage from the memory follows a normal distribution with an average value m and a standard deviation σ. 1
When one memory is composed of N (pieces / capacitor plane) ferroelectric particles, the detection voltage follows a normal distribution with an average value m and a standard deviation σ / N ^0.5 .

FIG. 6B shows an example. Approximately 400 (pieces / capacitor plane) ferroelectric particles are present in a ferroelectric capacitor having a side length of 1 μm. On the other hand, when one side of the ferroelectric capacitor is 0.1 μm, the number of ferroelectric particles contained in one ferroelectric capacitor is 4 (pieces / capacitor plane), and particles per capacitor plane Even considering the number alone, the standard deviation of the output voltage increases more than 100 times. Therefore, if only the miniaturization of the memory proceeds while the material characteristics remain unchanged, the variation in the output voltage of the memory element increases, and the relative number of capacitors that cannot operate as a memory increases. .

As shown in the formulas (10) and (5), the detected voltage in the memory is closely related to the direction (β) of the dipole moment of the ferroelectric particles and the direction (α) of the ferroelectric. By reducing variations in the orientation direction of ferroelectric particles, it is possible to suppress variations in memory characteristics (output voltage), and it is possible to reduce the number of malfunctioning elements due to miniaturization of memory elements. is there.

The output voltage of the ferroelectric memory element is related to the remanent polarization Pr of the ferroelectric, as shown in equation (9).
Assuming that the allowable value of the output voltage (V) is V (average value) −10%, the relationship shown in the following expression (11) is necessary for Pr in one chip according to the expression (9).

[0029]

[Equation 11] Pr (average value) × 0.9 ≦ Pr (minimum value) (11) The crystallographic characteristics required to satisfy the above-mentioned relationship with respect to the ferroelectric characteristics will be described.

The orientation of the crystal can be determined by X-ray diffraction measurement of the crystal. FIG. 7 shows a typical diffraction pattern obtained by X-ray diffraction measurement (rocking curve). ω ₀ indicates the average value of ω, and the half value width (Δω) indicates the variation of the diffraction angle. Further, the variation in the orientation direction of the ferroelectric and the variation in the direction of the dipole moment can be determined from the half width.

On the other hand, FIG. 8 shows a normal distribution used in statistics and represented by the following equation.

[0032]

Equation 12] ^{Y = (2 × π) -0.5} × exp (-X 2/2) ... (12) In a normal distribution, the distribution is the mean value m and the standard deviation σ
M-5σ ≦ X ≦ m + 5σ within 99.
Contains over 99% of specimens.

Assuming that the X-ray diffraction characteristics can be approximated by a normal distribution, the following relationship is obtained.

[0034]

(Δω) /2≒1.1774σ (13) The variation of Pr required to keep the variation of the output voltage of the ferroelectric memory element within ± 10% is ± 10%, and the dipole Considering that the allowable variation in β is maximum when the direction of the moment is orthogonal to the substrate (β = 0), the range is represented by the following inequality.

[0035]

-26 ° ≦ Δβ ≦ 26 ° (14) From equation (5), the following relationship holds.

[0036]

Δα = Δβ (15) Accordingly, the allowable range of α is as follows.

[0037]

-26 ° ≦ Δα ≦ 26 ° (16) Here, as an example of the ferroelectric, the plane distance (d) is 0.2.
Consider a 351 nm PZT (111) plane. Assuming that the wavelength of the measured X-ray is 0.15418 nm, the diffraction angle θ ₀ that gives an X-ray diffraction peak in the θ-2θ method is determined to be 19.1415 ° from Expression (2).

Further, when 26 ° shown in the equation (16) is substituted for α in the equation (3) as an allowable range of the orientation of the ferroelectric particles, ω ₁ = 43.85 ° is obtained. Normally, the angle ω ₀ at which the diffraction intensity peak is given in the rocking curve is ω ₀ = 2θ ₀ , and therefore, the allowable range ω _A of the variation of ω is as follows.

[0039]

Ω _A = ω ₁ −ω ₀ = ω ₁ −2θ ₀ = 5.57 ° (17) Assuming that 99.99% of samples in the normal distribution fall within this range, the standard is calculated from ω _A = 5σ. The deviation is required to satisfy the following conditions.

[0040]

Σ ≦ 0.2 × 5.57 = 1.114 ° (18) Accordingly, the condition of the half width Δω required from the equation (13) is as follows.

[0041]

(Δω) /2≦1.1774×1.114=1.31° (19)

[0042]

Δω ≦ 1.31 × 2 = 2.62 ° (20) Further, the allowable value of the diffraction angle is represented by the following value when expressed as a relative value.

[0043]

Δω / (2θ ₀ ) ≦ 0.068 (21) Further, when the number of ferroelectric particles included in the ferroelectric capacitor is taken into consideration, the half width Δ in the rocking curve is obtained.
ω (°) needs to satisfy the expression (22) or (23).

[0044]

Δω / (2θ ₀ ) ≦ 0.068 × (S · d / ((4/3) · π · r ³ )) ^0.5 (22)

[0045]

Δω ≦ 2.62 × (S · d / ((4/3) · π · r ³ )) ^0.5 (23) where, in the equations (22) and (23), S: ferroelectric substance Capacitor area (μm ² ), d: ferroelectric thickness (μ
m), r: average radius of ferroelectric particles (μm), θ ₀ : θ−
It is defined as a diffraction angle (value (°) on the θ axis) giving a diffraction peak in the 2θ method.

In particular, when the crystalline ferroelectric layer constituting the capacitor has a thickness of one ferroelectric particle, (2
It is necessary to satisfy the expressions 4) and (25).

[0047]

Δω / (2θ ₀ ) ≦ 0.068 × (S / (π · r ² )) ^0.5 (24)

[0048]

Δω ≦ 2.62 × (S / (π · r ² )) ^0.5 (25) where, in equations (24) and (25), S: ferroelectric capacitor area (μm ² ), d : Ferroelectric thickness (μ
m), r: average radius of ferroelectric particles (μm), θ ₀ : θ−
It is defined as a diffraction angle (value (°) on the θ axis) giving a diffraction peak in the 2θ method.

In a memory having 1 gigabit integration, the capacitor area is about 0.12 μm ² ,
As an example, suppose that the average diameter of the ferroelectric particles constituting the ferroelectric thin film is 0.1 μm and the capacitor is a cube,
Considering the number of ferroelectric particles contained in the capacitor,
The allowable half width (Δω) in the actual X-ray diffraction measurement is estimated as follows.

[0050]

Δω ≦ 15 ° (26) Similarly, the half width (Δω) allowed at 4 gigabits is estimated as follows.

[0051]

Δω ≦ 8.5 ° (27) Further, the half width (Δω) allowed at 16 gigabits is estimated as follows.

[0052]

Δω ≦ 2.6 ° (28) In particular, the half width (Δ) allowed when the crystalline ferroelectric layer constituting the capacitor has a thickness of one ferroelectric particle.
ω) are estimated as follows according to the degree of integration.

[0053]

In the case of 1 gigabit: Δω ≦ 8.2 ° (29)

[0054]

In the case of 4 gigabits: Δω ≦ 5.8 ° (30)

[0055]

In the case of 16 gigabits: Δω ≦ 2.6 ° (31) As described above, in the ferroelectric memory having an integration degree of 1 gigabit or more, in order to reduce the number of malfunctioning elements, It is necessary to use a crystalline ferroelectric film whose half-value width in X-ray diffraction (rocking curve) satisfies any of formulas (22) to (31).

In the present invention, as the crystalline ferroelectric material, Pb (Zr _x , Ti _1-x ) O ₃ , (Pb _1-y , La
_y ) (Zr _x , Ti _1-x ) _{1-y / 4} O ₃ , bismuth layered structure ferroelectric, SrBi ₂ Ta ₂ O _9, etc. can be used. In addition, these crystalline ferroelectric materials can be used for pulse laser deposition, sputtering, sol-gel, MOCV
It is possible to form a film using a D (metal-organic chemical vapor deposition) method or the like, and Pt, Pt / Ti, Pt / IrO ₂ , Ir / Ir on a semiconductor such as Si.
It can be formed on an electrode made of O ₂ , TiN, RuOx, SrRuO ₃ or the like.

Between these electrode materials and the ferroelectric layer,
When a low dielectric layer such as BaO or SrO is interposed, the charge stored in the capacitor is reduced. Therefore, a structure in which these low dielectric layers intervene is not preferable.

As a ferroelectric memory cell, for example, a two-transistor-two-capacitor structure (FIG. 8A), a one-transistor-one-capacitor structure (FIG. 9B), and one transistor shown in FIG. Structure (FIG. 9 (c),
(D)) etc. can be used.

In each of the various ferroelectric memory elements and cell structures exemplified above, the ferroelectric crystal constituting the capacitor (for example, formed as a capacitance film) is evaluated by X-ray diffraction. Non-defective products and defective products can be selected based on whether or not the half width in the rocking curve satisfies any of the expressions (22) to (31). This sorting can be performed in the element manufacturing process, and non-defective products can be extracted without being damaged. Therefore, not only the reliability of the ferroelectric memory element of 1 gigabit or more is improved but also the advantage of increasing the production efficiency is brought.

[0060]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described in detail with reference to the following Examples 1 to 9 and related drawings.

Example 1 A sample shown in FIG. 10 was prepared by the following method. First, the Si substrate 16 is thermally oxidized to 25
A SiO ₂ film 17 of nm was formed. A Pt film 18 is formed on this substrate by magnetron sputtering at a substrate temperature of 500 ° C.
It grew 50 nm. When the X-ray diffraction (rocking curve) of this sample was measured, the half value width of the diffraction from the Pt (111) plane was 9 °. Pb (Zr, Ti) O, which is a ferroelectric, is formed on this Pt thin film by pulsed laser deposition (PLD).
₃ (PZT) film 19 was formed. The target is composition P
A sintered target of b (Zr _0.52 , Ti _0.48 ) O ₃ (density 90% or more) was used. Substrate temperature 550 ° C, growth atmosphere 200
A 175 nm PZT film was grown at mTorr.
When the X-ray diffraction measurement result (rocking curve) of this sample was measured, a clear diffraction line from the (001) plane of PZT was observed. The half width was 8 °. An Au electrode 20 was formed on this sample by vacuum evaporation to a thickness of 200 nm.
Evaporated.

Next, the Au electrode 20 was patterned by the following method. Au / PZT / Pt / SiO ₂ prepared
A positive resist was spin-coated on the Au surface of the / Si sample at 4000 revolutions for 30 seconds, and then dried at 160 ° C. for 10 minutes. This sample was 0.3
After patterning into a 5 μm × 0.35 μm square, Ar
Au was etched by ion etching.
Finally, the resist is peeled off by Ar ion + oxygen ion etching, and ultrasonic cleaning in 2-butanone is performed as shown in FIG.
Was prepared. The ferroelectric characteristics (hysteresis characteristics) of each capacitor in the sample were measured. FIG. 11 shows an example of the hysteresis characteristic. 3 as remanent polarization (Pr)
0 μC / cm ² is obtained. FIG. 12 shows the measurement results of Pr for all the gates in the sample. The characteristics of almost all the samples were included within the variation of ± 10%, and it was shown that the present invention can be applied to a ferroelectric memory of 1 gigabit integration.

Example 2 A sample similar to that of Example 1 was prepared by the following method. In the same manner as in Example 1, SiO ₂ /
An Si substrate was manufactured. On this substrate, a Pt film was grown by magnetron sputtering at a substrate temperature of 650 ° C. to a thickness of 150 nm. When the X-ray diffraction (rocking curve) of this sample was measured, the half value width of the diffraction from the Pt (111) plane was 3 °. A Pb (Zr, Ti) O ₃ (PZT) film as a ferroelectric material was formed on this Pt thin film in the same manner as in Example 1 to a thickness of 175 nm. X-ray diffraction measurement result (rocking curve) of this sample
As a result, a clear diffraction line from the (001) plane of PZT was observed. Further, its half width was 3 °. Then, the same method as in Example 1 was applied to obtain 0.27 μm ×
A 0.27 μm square Au electrode was produced. When the ferroelectric characteristics (hysteresis characteristics) of each capacitor in the sample were measured, the remanent polarization (Pr) was within ± 10% variation, and it was applicable to a ferroelectric memory with 4 gigabit integration. It has been shown.

Example 3 A sample shown in FIG. 13 was prepared by the following method. Using SrTiO ₃ (STO) as the substrate 21,
An SrRuO ₃ (SRO) electrode 22 as a lower electrode was formed on this substrate by using a pulse laser deposition (PLD) method. Prior to the growth of the SRO thin film, the target surface was polished in advance with polishing paper (# 600), and pre-sputtered in a vacuum or an oxygen atmosphere for 10 minutes to make the initial state of the target the same. The conditions for forming the thin film are as follows: laser wavelength: 248 nm, spot area: 4 mm ² , distance between target and substrate: 37 mm, energy density: 1.1 J / cm ² , substrate temperature: 500 ° C, growth atmosphere 100 m
An SRO thin film having a thickness of 65 nm was grown in an oxygen atmosphere of Torr.

On this SRO thin film, a Pb (Zr, Ti) O ₃ (PZT) film 19 which is a
m formed. When the X-ray diffraction measurement result (rocking curve) of this sample was measured, a clear diffraction line from the (001) plane of PZT was observed. The half width is 0.5
°. Subsequently, 0.19 was obtained in the same manner as in Example 1.
An Au electrode 20 of μm × 0.19 μm square was manufactured. When the ferroelectric characteristics (hysteresis characteristics) of each capacitor in the sample were measured, the remanent polarization (Pr) was within ± 10% variation, and it was applicable to a ferroelectric memory with 16 gigabit integration. It has been shown.

Example 4 A 1-gigabit highly integrated ferroelectric memory having the structure shown in FIG. 14 was formed on a silicon substrate. In this example, the method of Example 1 was used as a method for producing a ferroelectric thin film, and the other methods used were ordinary semiconductor processes.

FIG. 15 shows the result of measuring the output voltage of the 1-gigabit highly integrated ferroelectric memory manufactured in this example. As a result, almost all of the gates obtained an output voltage of 100 mV or more, the variation was within ± 10%, and a highly integrated ferroelectric memory with uniform characteristics was manufactured.

Example 5 A sample was prepared and measured in the same manner as in Example 4 except that the sputtering method described below was used as a method for forming a crystalline ferroelectric thin film in Example 4.

As a target, Pb (Zr _0.8 T
i _0.2 ) O ₃ was subjected to reactive sputtering in an Ar / O ₂ (mixing ratio: 50%) atmosphere to form a 150 nm thick ferroelectric thin film.

As a result of X-ray diffraction measurement of this sample, a clear diffraction line from the (111) plane of PZT was observed. Also,
Its half width was 2.5 °.

A 1-gigabit high-integration ferroelectric memory was fabricated in the same manner as in Example 4, and the output voltage was measured. As a result, similarly to Example 4, a highly integrated ferroelectric memory having small variations in characteristics was able to be produced.

Example 6 A sample was prepared and measured in the same manner as in Example 4 except that the sol-gel method described below was used as a method for forming a crystalline ferroelectric thin film in Example 4. .

As a starting material, Pb (CH ₃ COO) _{2.
3H 2 O, Zr (n-} OC 4 H 9) 4, Ti (i-OC 3 H 7)
The mixed solution of ₄ was used. The ratio of Zr to Ti is Zr /
Ti = 52/48 was chosen. 3000 r of this mixed solution
After spin casting at pm, it was dried at 150 ° C. for 30 minutes and calcined at 450 ° C. for 30 minutes in a dry air atmosphere. This spin casting and drying are repeated to a thickness of 200
nm film. After that, 65 in an oxygen atmosphere (1 atm)
0 ° C., 1 minute, RTA (Rapid Thermal
Annealing) treatment.

As a result of X-ray diffraction measurement of this sample, a clear diffraction line from the (100) plane of PZT was observed. Also,
Its half width was 2.5 °.

In the same manner as in Example 4, a 1-gigabit high-integration ferroelectric memory was fabricated and the output voltage was measured. As a result, as in Example 4, a highly integrated ferroelectric memory with small variations in characteristics was manufactured.

(Example 7) MOCVD (Me) described in Example 4 as a method for producing a crystalline ferroelectric thin film is described below.
tal-organic chemical vapor
r Deposition) method, and a sample was prepared and measured in the same manner as in Example 4 except for the above.

In the MOCVD method, Pb is used as a source material.
(C ₂ H ₅ ) ₄ , Zr (C ₁₁ H ₁₉ O ₂ ) ₃ , Ti (i-OC ₃ H)
₇ ) A film was formed using ₄ under the synthesis conditions shown in Table 1. The substrate temperature is 600 ° C.

[0078]

[Table 1]

As a result of X-ray diffraction measurement of this sample, a clear diffraction line from the (001) plane of PZT was observed. Also,
Its half width was 2.5 °.

In the same manner as in Example 4, a 1-gigabit high-integration ferroelectric memory was formed by the above method, and the output voltage was measured. As a result, similarly to Example 4, a highly integrated ferroelectric memory having small variations in characteristics was able to be produced.

Example 8 A thin film of SrBi ₂ Ta ₂ O ₉ was formed by the PLD method shown in Example 4. As a result of X-ray diffraction measurement of this sample, the half value width of the main diffraction line was 3 °. In the same manner as in Example 4, a 1-gigabit high-integration ferroelectric memory was formed by the above method, and the output voltage was measured. As a result, as in Example 2, a highly integrated ferroelectric memory with small variations in characteristics was able to be produced.

(Embodiment 9) MOCVD (Me) described in Embodiment 4 as a method of forming a crystalline ferroelectric thin film will be described below.
tal-organic chemical vapor
r Deposition) method, and (Pb, La)
A (Zr, Ti) O ₃ (abbreviated as PLZT) ferroelectric thin film was prepared. Otherwise, a sample was prepared and measured in the same manner as in Example 4.

Pb (C ₂ H ₅ ) ₄ , Z
_{r (C 11 H 19 O 2} ) 3, Ti (i-OC 3 H 7) 4, La (C
₁₁ H ₁₉ O ₂ ) ₃ and PLZT under the synthesis conditions shown in Table 2.
The film was grown. The substrate temperature is 600 ° C.

[0084]

[Table 2]

The result of X-ray diffraction measurement of this sample is PLZT
A clear diffraction line from the (001) plane was observed. The half width was 2.5 °.

In the same manner as in Example 4, a 1-gigabit high-integration ferroelectric memory was fabricated by the above method, and the output voltage was measured. As a result, similarly to Example 4, a highly integrated ferroelectric memory having small variations in characteristics was able to be produced.

As the ferroelectric material, Pb shown here was used.
(Zr _x , Ti _y ) O ₃ , SrBi ₂ Ta ₂ O ₉ , (P
b _1−y , La _y ) (Zr _x , Ti _1−x ) _{1−y / 4} O ₃ , bismuth layered structure ferroelectrics, and other crystalline ferroelectric materials can also be used. . In addition, as a method of manufacturing a ferroelectric film, the pulse laser deposition method, the sputtering method,
Not only the sol-gel method and the MOCVD method, but also a general thin film manufacturing method can be used.

[0088]

According to the present invention, since a crystalline ferroelectric film having a uniform orientation is used, it is possible to suppress variations in ferroelectric characteristics of a highly integrated ferroelectric capacitor, and to achieve high integration. This contributes to an improvement in the yield of the ferroelectric memory.

The present invention can be applied to crystalline ferroelectric materials in general and exerts a very useful and epoch-making effect in the development of a semiconductor memory or the like which continues to be highly integrated.

[Brief description of the drawings]

FIG. 1 is a schematic diagram illustrating a highly integrated ferroelectric memory according to the present invention.

FIG. 2 is a schematic diagram showing a relationship between an orientation direction of ferroelectric particles and a diffraction angle in X-ray diffraction measurement.

FIG. 3 is a schematic diagram showing the relationship between the direction of the dipole moment of ferroelectric particles and ferroelectric characteristics.

FIG. 4 is a diagram showing a ferroelectric characteristic measurement sample structure and its ferroelectric characteristics.

FIG. 5 is a diagram showing an equivalent circuit of a ferroelectric memory and its memory characteristics.

FIG. 6 is a schematic diagram illustrating a variation in output voltage of an integrated memory element.

FIG. 7 is a view showing a typical diffraction pattern in X-ray diffraction measurement (rocking curve).

FIG. 8 is a schematic diagram illustrating a normal distribution.

FIG. 9 is a diagram showing a basic circuit configuration of a ferroelectric memory.

FIG. 10 is a diagram showing a sample structure for measuring ferroelectric characteristics.

FIG. 11 is a diagram showing an example of a hysteresis characteristic.

FIG. 12 is a diagram showing a distribution of Pr.

FIG. 13 shows a sample structure for measuring ferroelectric characteristics.

FIG. 14 is a sectional view of a highly integrated ferroelectric memory.

FIG. 15 is a diagram showing a distribution of output voltage values.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Substrate, 2 ... Ferroelectric particles, 3 ... Lower electrode, 4 ... Ferroelectric layer, 5 ... Upper electrode, 6 ... Lead wire, 7 ... Ferroelectric capacitor, 8 ... Capacitor, 9 ... Voltmeter, 10 ... Bit line, 11 word line, 12 plate line, 13 ferroelectric capacitor, 14 transistor, 15 ferroelectric integrated cell, 16 Si substrate, 17 SiO ₂ film, 18
... Pt film, 19 ... PZT film, 20 ... Au electrode, 21 ... S
TO substrate, 22 SRO electrode, 23 p-type silicon substrate, 24 element isolation film, 25 gate oxide film, 26
Gate electrode (word line), 27: phosphorus-doped n-type impurity diffusion layer, 28: interlayer insulating film (SiO ₂ ), 29: SiO ₂
Layers, 30: polycrystalline Si, 31: SiO ₂ insulating film, 32:
Bit line, 33: SiO ₂ layer, 34: sidewall spacer (Si ₃ N ₄ ), 35: insulating film, 36: polycrystalline Si
Plug, 37: SRO film, 38: PZT ferroelectric thin film,
39 ... Au electrode.

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁶ Identification symbol FI H01L 21/8247 29/788 29/792 (72) Inventor Keiko Kushida 1-280 Higashi-Koigabo, Kokubunji-shi, Tokyo Central Research Laboratory, Hitachi, Ltd. In-house (72) Inventor Kazunori Torii 1-280 Higashi Koikekubo, Kokubunji-shi, Tokyo Inside the Hitachi, Ltd.Central Research Laboratories

Claims (8)

[Claims] 1. A half-width of a rocking curve of an X-ray diffraction line from a crystal structure showing ferroelectricity of a crystalline ferroelectric material constituting a ferroelectric capacitor (Δω (°)). And the diffraction angle (θ ₀ , the value on the θ axis (°)) that gives a diffraction peak in the θ-2θ method is Δω / (2θ ₀ ) ≦ 0.068 × (S · d / ((4 /
3) · π · r ³ )) ^0.5 (where S: ferroelectric capacitor area (μ
m ² ), d: thickness of ferroelectric substance (μm), r: average radius of ferroelectric particles (μm)), and high integration of 1 gigabit or more. . 2. The method according to claim 1, wherein the ferroelectricity of the crystalline ferroelectric material forming the capacitor is determined by the half width (Δ) of a rocking curve of an X-ray diffraction line from the crystal structure.
ω (°)) is Δω ≦ 2.62 × (S · d / ((4/3) · π ·
r ³ )) ^0.5 (where S: ferroelectric capacitor area (μ
m ² ), d: thickness of ferroelectric substance (μm), r: average radius of ferroelectric particles (μm)), and high integration of 1 gigabit or more. . 3. A ferroelectric capacitor comprising a ferroelectric capacitor, wherein a crystalline ferroelectric layer constituting the capacitor has a thickness of one ferroelectric particle, and a ferroelectric material of a crystalline ferroelectric material constituting the capacitor. The half width (Δω (°)) of the rocking curve of the X-ray diffraction line from the crystal structure showing the property and the diffraction angle (θ ₀ , the value on the θ axis (°) at which the diffraction peak is obtained in the θ-2θ method) Δω / (2θ ₀ ) ≦ 0.068 × (S / (π · r ² ))
^0.5 (however, S: ferroelectric capacitor area (μ
m ² ), r: average density of ferroelectric particles (μm)) and high integration of 1 gigabit or more. 4. A crystal comprising a ferroelectric capacitor, wherein the crystalline ferroelectric layer constituting the capacitor has a thickness of one ferroelectric particle, and exhibits a ferroelectric property of the crystalline ferroelectric material. The relationship that the half width (Δω (°)) of the rocking curve of the X-ray diffraction line from the structure is Δω ≦ 2.62 × (S / (π · r ² )) ^0.5 (where S: ferroelectric capacitor area ( μ
m ² ), r: average density of ferroelectric particles (μm)) and high integration of 1 gigabit or more. 5. The ferroelectric capacitor according to claim 1, wherein the crystalline ferroelectric material is Pb (Zr _x , Ti _1-x ) O ₃ (0 ≦ x ≦
5. The highly integrated ferroelectric memory according to claim 1, wherein the memory comprises: 6. The ferroelectric capacitor according to claim 1, wherein said crystalline ferroelectric material comprises (Pb _1-y , La _y ) (Zr _x , T
5. The highly integrated ferroelectric according to claim 1, wherein i _1-x ) _{1-y / 4} O ₃ (0 ≦ x ≦ 1, 0 ≦ y ≦ 1). memory. 7. The highly integrated ferroelectric memory according to claim 1, wherein said ferroelectric material is a bismuth layered structure ferroelectric. 8. The highly integrated ferroelectric according to claim 1, wherein said crystalline ferroelectric material constituting said ferroelectric capacitor is composed of SrBi ₂ Ta ₂ O _9. Body memory.