JPH1012627A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To set a bias point of a collector current in a low current region in all temperature ranges. SOLUTION: A first P<+> type emitter diffusion region 7 is surrounded by a second P<+> type emitter diffusion region 8, and the first and the second P<+> type emitter diffusion regions 7, 8 are surrounded by a P<+> type collector diffusion region 5. An N type well region 3 is formed so as to cover the entire device, and a base current is controlled with an N type base contact diffusion region 4. N and P type MOS transistors 15, 16 are switched with a signal from a temperature detector part 11, and a first and a second emitter electrode terminals 12, 17 are connected upon room temperature. Upon high temperature the second emitter electrode terminal 17 and a substrate contact region 18 are connected, and the second P<+> type emitter diffusion region 8 is kept at the same electric potential of the substrate 1 to reduce a current amplification rate. Hereby, a dispersion point of the collector current is moved to a low current side, and hence a collector current bias point can be set to the same point as upon the room temperature.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor device having a built-in lateral bipolar transistor.

[0002]

2. Description of the Related Art As a conventional semiconductor device, for example, FIG.
There is a semiconductor device having a built-in lateral PNP bipolar transistor as shown in FIG. FIG. 12 shows a horizontal type (surface type) in a semiconductor device in which an integrated circuit is formed on the same semiconductor substrate.
5A and 5B show a PNP bipolar transistor device region, in which FIG. 5A is a plan pattern layout view, and FIG. 5B is a cross-sectional view. In the plan pattern layout diagram of FIG. 7A, the P ⁺ -type emitter diffusion region 106 is surrounded by a P ⁺ -type collector diffusion region 10.
It is surrounded by five. N-type well region (base region) 10
3 is formed so as to cover the entire lateral PNP bipolar transistor device, and the base current is controlled by the N ⁺ type base contact diffusion region 104. The intrinsic base region is near the surface of the N-type well region 103 existing between the P ⁺ -type emitter diffusion region 106 and the P ⁺ -type collector diffusion region 105.

As shown in the cross-sectional view of FIG. 12B, a P-type epitaxial region 102 (hereinafter referred to as a P-type epi region) is formed on a P-type semiconductor substrate 101 and has a principal surface (front surface) side. After the N-type impurity is introduced from above, a deep N-type well region 103 is formed by thermal diffusion. P ⁺ type emitter diffusion region 106 and P ⁺ type collector diffusion region 10
5, a P-type impurity is introduced from the main surface side, and the N ⁺ -type base contact diffusion region 104 is formed shallow by thermal diffusion after the N-type impurity is introduced. Although the buried layer is omitted in this example, the N-type
There may be a ⁺ type buried layer. Further, other devices such as a bipolar device and a CMOS device (not shown) are formed in the semiconductor device, and are separated from the other devices by a P-type epi region 102.

When a lateral PNP bipolar transistor is used as a current amplification device, a P-type semiconductor substrate 101 is grounded, a forward bias is applied between a base and an emitter,
Generally, a reverse voltage is applied between the collectors and a positive voltage is applied to the P ⁺ -type emitter diffusion region 106. PN junction formed by the P ⁺ -type emitter diffusion region 106 and the base region is forward biased, as the PN junction formed by the P ⁺ -type collector diffusion region 105 and the base region 103 is reverse biased, N ⁺ The mold base contact diffusion region 104 is biased.

[0005] Holes are injected from the emitter to the base through the forward bias, and the injected holes diffuse through the base. If the lifetime is sufficiently longer than the base transit time, the holes hardly disappear and become connected to the collector. To reach the junction. The junction between the collector and the base has a depletion layer opened by application of a reverse bias, and holes are immediately removed by the action of an electric field existing therein and collected at the collector.

Electrons, which are majority carriers for the base region, recombine with holes and gradually decrease. However, electrons are hardly supplied from the emitter and collector regions. This is supplemented by the base current IB. When electrons are supplied by extracting the base current IB, the barrier to the diffusion of holes in the emitter decreases and the emitter current increases. Thus, the collector current IC is controlled by a slight current change of the base current IB. The current amplification factor β (= hFE) is a function of the current transmission factor α, and is expressed as β = α / (1−α).

FIG. 13 shows the state of the current amplification factor hFE with respect to the change in the collector current IC. As a characteristic curve at room temperature, a curve like a curve 201 is typical. In a region where the ratio of the collector current IC is low, the current amplification factor hFE is flat, and the circuit designer determines an appropriate bias point 202 in this flat region.

[0008]

However, when such a conventional semiconductor device is used in an environment where the temperature may be as high as 150 ° C., for example, as in an engine room of an automobile, the semiconductor device shown in FIG. As shown by the characteristic curve 203 showing the relationship between the collector current IC and the current amplification factor hFE at a high temperature, a phenomenon in which the characteristics change suddenly occurs, and the current amplification factor hFE apparently increases sharply in the low collector current IC region. Become.

The following reasons are considered as the cause. That is, in a semiconductor device, as an integrated circuit, a P-type semiconductor substrate 101 is generally connected to the lowest potential, and a PN is connected to an N-type well region (base region) 103 of each device.
By reverse biasing the junction, it is used electrically isolated. Such a PN junction has a very small leakage current in a normal temperature range of an engine room (for example, about 80 ° C. to 120 ° C., hereinafter referred to as room temperature), but does not cause much problem. PN
The reverse leakage current at the junction increases sharply. For this reason, in the case of a lateral PNP bipolar transistor, there is a problem of a leak current from the N-type well region 103 to the P-type semiconductor substrate 101.

That is, the base current I actually extracted
In a region where B is still small, the base current IB is apparently supplied by the leak current, and the collector current IC multiplied by the current amplification factor hFE flows. That is, the current amplification factor is hFE = IC / IB or hF
Since E is defined as E = ΔIC / ΔIB, the current amplification factor appears to increase sharply in the low collector current region.

As described above, in the conventional semiconductor device, the bias point of the collector current IC is set to the point 2 shown in FIG.
When set to the position 02, there is a problem that normal operation is not possible due to the influence of the above-mentioned leak current at a high temperature. Similarly, when the temperature coefficient of the current amplification factor hFE is large,
The circuit designer must design in anticipation of the increase in the current amplification factor hFE at a high temperature, and there is a problem in that the degree of freedom in circuit design is small.

As a method for solving this problem, the bias point is moved to a point 204 shown in FIG. 13, and a collector current IC that allows a negligible increase in the current amplification factor hFE due to an increase in leakage current at a high temperature is supplied in advance. It is possible. However, using such a method is disadvantageous in terms of circuit current consumption, and even if the bias point is moved only at high temperatures, it is not very advantageous in increasing the circuit current consumption at high temperatures, and the problem still remains. Contains.

In view of the above-mentioned conventional problems, the present invention can set the same bias point (operating point) in the low collector current region even at a high temperature as in a low temperature, and can reduce the power consumption over the entire temperature range. It is an object to provide a semiconductor device having a built-in lateral bipolar transistor.

Therefore, according to the present invention, there is provided a semiconductor device having an integrated circuit formed on the same semiconductor substrate.
A base region of the opposite conductivity type to the semiconductor substrate is formed on the main surface side of the semiconductor substrate, and a collector diffusion region and a plurality of emitter diffusion regions of the same conductivity type as the semiconductor substrate are formed on the main surface of the base region. Having the lateral bipolar transistor described above.

The emitter diffusion region composed of the plurality of regions has a deep emitter diffusion region formed at a central portion of the base region and a deep emitter diffusion region formed at a peripheral portion of the deep emitter diffusion region. It is desirable to form the emitter diffusion region with a shallow emitter diffusion region. Still further, it is possible to provide a temperature detecting means and a switching means for switching a potential of at least one of the plurality of emitter diffusion regions according to an output of the temperature detecting means. The emitter diffusion region for switching the potential is preferably a shallow emitter diffusion region, and preferably has the same potential as the semiconductor substrate when the environmental temperature is high.

According to a fifth aspect of the present invention, in a semiconductor device having an integrated circuit formed on the same semiconductor substrate, a base region of a conductivity type opposite to that of the semiconductor substrate is formed on a main surface side of the semiconductor substrate. A lateral bipolar transistor having an emitter diffusion region of the same conductivity type as the semiconductor substrate and a plurality of collector diffusion regions formed on the main surface of the region is provided.

Still further, it is possible to provide a temperature detecting means and a switching means for switching the plurality of collector diffusion regions according to an output of the temperature detecting means. Preferably, the switching means switches the plurality of collector diffusion regions as collectors at a normal temperature and uses a collector diffusion region lower than the normal temperature as a collector at a high temperature so as to shorten the emitter facing length. Alternatively, the plurality of collector diffusion regions have different base widths from each other, and the switching means switches the collector diffusion region having a short base width as a collector at a normal temperature and the collector diffusion region having a long base width at a high temperature. It can be.

[0018]

According to the present invention, a collector diffusion region of the same conductivity type as the semiconductor substrate is provided on the main surface of the base region.
Since the emitter diffusion region composed of the plurality of regions is formed, the current amplification factor can be changed by selectively using the plurality of emitter diffusion regions. . By setting all emitter diffusion regions as emitters when the environmental temperature is not high, the bias point of the collector current can be set in the low collector current region with a relatively large current amplification factor, especially when the ambient temperature is not high by the temperature detection means and the switching means. Can be. On the other hand, when the ambient temperature is high, by switching some of the emitter diffusion regions to the same potential as the semiconductor substrate, the transport efficiency when holes travel through the base is reduced and the current amplification factor is reduced. The diverging collector current region shifts to a lower region. Therefore, the bias point of the collector current set when the environmental temperature is not high can be used even when the environmental temperature is high.

At this time, when the plurality of emitter diffusion regions are formed by a deep emitter diffusion region and a shallow emitter diffusion region formed in the periphery thereof, when the ambient temperature is high, the shallow emitter diffusion region is formed. By making the potential of the diffusion region the same as that of the semiconductor substrate, most holes are located here because there is a shallow emitter diffusion region electrically connected to the semiconductor substrate on the way when the holes travel through the base. It is absorbed and the current amplification factor can be easily reduced.

According to the fifth aspect of the present invention, since the collector diffusion region and the emitter diffusion region composed of a plurality of regions of the same conductivity type as the semiconductor substrate are formed on the main surface of the base region, a plurality of collector diffusion regions are formed. The current amplification factor can be changed by selectively using the diffusion region. . In particular, if the collector detection region and the switching unit make the collector diffusion region smaller than the normal temperature a collector at a high temperature and the emitter facing length is shortened, holes reaching the collector are reduced and the current amplification factor is reduced.

When a plurality of collector diffusion regions have different base widths from each other, a collector diffusion region having a short base width is used as a collector at a normal temperature, and a collector diffusion region having a long base width is used as a collector at a high temperature. Since the rate decreases, the collector current region where the current amplification factor diverges shifts to a low region. Therefore, the bias point of the collector current set when the environmental temperature is not high can be used even when the environmental temperature is high.

[0022]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the drawings. FIG. 1 shows the configuration of the first embodiment of the present invention. In this embodiment, a lateral PNP bipolar transistor includes an emitter diffusion region composed of a plurality of regions, and a switching circuit 10 for switching the emitter diffusion region according to temperature.
Having. 2A and 2B are views showing a portion of a lateral PNP bipolar transistor device according to the present embodiment, wherein FIG. 2A is a plan pattern layout view, and FIG. 2B is a cross-sectional view. First, the lateral PNP bipolar transistor 1 will be described.
In the plan pattern layout diagram of FIG. 2A, the first P ⁺
The emitter diffusion region 7 is surrounded by a second P ⁺ -type emitter diffusion region 8. And these first and second P ⁺
The emitter diffusion regions 7 and 8 are surrounded by a P ⁺ -type collector diffusion region 5.

The N-type well region (base region) 3 is formed so as to cover the entire device, and the base current is controlled by the N ⁺ -type base contact diffusion region 4. The intrinsic base region is near the surface of the N-type well region 3 existing between the second P ⁺ -type emitter diffusion region 8 and the P ⁺ -type collector diffusion region 5, and has a lateral (surface) type.
PNP bipolar device is formed.

In the sectional view of FIG. 2B, a P-type epitaxial region 2 (hereinafter referred to as a P-type epi region) is formed on a P-type semiconductor substrate 9. After N-type impurities are introduced from the main surface (front surface) side of P-type epi region 2, deep N-type well region 3 is formed by thermal diffusion. The first P ⁺ -type emitter diffusion region 7, the second P ⁺ -type emitter diffusion region 8, and the P ⁺ -type collector diffusion region 5 are formed by introducing a P-type impurity from the main surface side and then forming an N ⁺ -type base contact diffusion region 4.
Are formed shallowly by thermal diffusion after introducing N-type impurities.

The depth of the first P ⁺ type emitter diffusion region 7 is
Although the impurity is simultaneously introduced so as to have the same depth as the P ⁺ -type collector diffusion region 5, the second P ⁺ -type emitter diffusion region 8 is changed into the first P ⁺ -type emitter diffusion region 7 by changing the impurity introduction step. On the other hand, it is formed shallower. As for the base width, which is the distance between the emitter and the collector, the distance between the second P ⁺ -type emitter diffusion region 8 and the P ⁺ -type collector diffusion region 5 is the same as that of the conventional example shown in FIG. The distance is set in the same manner as the distance between the P ⁺ type emitter diffusion region 106 and the P ⁺ type collector diffusion region 105. Although the buried layer is omitted, an N ⁺ -type buried layer may exist below the N-type well region (base region) 3.

Next, the switching circuit 10 shown in FIG. 1 will be described. On the same semiconductor substrate 9 as the lateral PNP bipolar transistor 1, a temperature detecting section 11 composed of, for example, a thermistor element as a temperature detecting means, and a switching circuit 10 composed of an n-channel MOS transistor 15 and a p-channel MOS transistor 16 are formed. I have. The switching circuit 10 as a switching means switches between the n-channel MOS transistor 15 and the n-channel MOS transistor 16 according to the output of the temperature detecting unit 11.

That is, the n-channel MOS transistor 15 includes the second emitter electrode terminal 17 drawn from the second P ⁺ type emitter diffusion region 8 and the substrate contact region 1.
8 and a p-channel MOS transistor 1
Reference numeral 6 is provided between the first emitter electrode terminal 12 drawn from the first P ⁺ type emitter diffusion region 7 and the second emitter electrode terminal 17. And n channel MO
A signal from the temperature detector 11 is input to each gate of the S transistor 15 and the p-channel MOS transistor 16.

At a normal room temperature, the temperature detector 11 outputs a low
A signal is output and n-channel MOS transistor 15
Is OFF, p-channel MOS transistor 16 is ON
I do. Thus, the first emitter electrode terminal 12 drawn from the first P ⁺ type emitter diffusion region 7 and the second emitter electrode terminal 17 drawn from the second P ⁺ type emitter diffusion region 8 are connected to each other.

When the temperature becomes high, the temperature detecting section 11 outputs H
An "high" signal is output. While this High signal is being output, the n-channel MOS transistor 15
The N and p channel MOS transistors 16 are turned off. As a result, the second emitter electrode terminal 17 and the substrate contact region 18 are connected. Note that the temperature detection unit 11
Can be configured as an over-temperature detection circuit or the like. The set temperature to be switched is the temperature that changes from the normal temperature (room temperature) range to the high temperature range. If a circuit that does not operate normally but operates when there is a high temperature abnormality such as an over-temperature detection circuit is applied, set the temperature near the detection temperature. can do. Further, the temperature detecting unit 11
The output logic of n channel M
The same operation can be obtained even if the OS transistor 15 and the p-channel MOS transistor 16 are exchanged.

When the lateral PNP bipolar transistor 1 is used as a current amplification device, the P-type semiconductor substrate 9 is grounded, and a positive voltage is applied to the first P ⁺ -type emitter diffusion region 7 and the second emitter diffusion region 8. The PN junction formed by the first P ⁺ -type emitter 8 and the N-type base region 3 is forward-biased, and the PN junction formed by the P ⁺ -type collector diffusion region 5 and the N-type base region 3 is reverse-biased. Generally, holes are injected from the two emitters into the base through a forward bias, and the injected holes diffuse through the base. If the lifetime is sufficiently longer than the base transit time, the holes hardly disappear and the collectors disappear. And reach the junction.

At the junction between the collector and the base, a depletion layer is opened by application of a reverse bias, and holes are immediately removed and collected by the collector by the action of an electric field existing therein. Electrons, which are majority carriers for the base region, recombine with holes and gradually decrease. However, electrons are hardly supplied from the emitter and collector regions. This is supplemented by the base current IB. When electrons are supplied by extracting the base current, the barrier to diffusion of holes in the emitter is reduced and the emitter current is increased. Thus, the collector current IC is controlled by a slight current change of the base current IB.

From Kirchhoff's first law, IE = IB
+ IC relationship is maintained, and the current transmission rate α is

(Equation 1) Is defined as The current amplification factor β = hFE is defined as an important parameter that determines the current amplification operation. β =
IC / IB, and β = α / (1
−α).

The current transfer rate α is also expressed as α = αe · αt · αc. Here, αe is the injection efficiency, αt is the transport efficiency, and αc is the collector efficiency. To explain each of them, first, the injection efficiency αe indicates the ratio of the minority carrier current (hole current) to the base region in the emitter current, and is a value represented by a schematic expression (1).

(Equation 2)

Here, DnE: diffusion constant of electrons in the emitter DpB: diffusion constant of holes in the base W: base width LnE: diffusion length of electrons in the emitter NB: base impurity density NE: emitter impurity density.

The transport efficiency αt is obtained by setting the hole current at the emitter-base PN junction end to IpB (0) and the hole current at the collector-base PN junction end to IpB (0).
(W), it is expressed as in equation (2).

(Equation 3) Here, τpB is the minority carrier lifetime, and tB is the running time of the minority carrier in the base. In order to increase the transport efficiency, it is necessary to make (tB / τpB) as small as possible.

The collector efficiency αc is a ratio of the collector current IpC to the hole current IpB (W) at the collector-base PN junction. α is a value smaller than 1 and 1
The closer to, the higher the efficiency. Current amplification factor β (=
hFE) is a function of α, and it can be seen that the efficiency increases when the above efficiencies are improved, and decreases when the efficiencies are reduced.

FIG. 3 shows the current amplification factor hFE with respect to the change of the collector current IC in this embodiment. At room temperature that is not high, a typical characteristic curve 21 similar to the conventional one is used. In a region where the ratio of the collector current IC is low, the current amplification factor hFE is flat. An appropriate IC bias point 22 can be determined in this flat area.
On the other hand, in a high temperature environment, the current amplification factor hFE is reduced to obtain a characteristic curve 25, and the IC bias point 22 set at room temperature is used without being changed.

This will be described below. 4A and 4B show characteristic curves with different current gains, wherein FIG. 4A shows a characteristic curve at a high current gain and FIG. 4B shows a characteristic curve at a low current gain. In this embodiment, the first P ⁺
Emitter diffusion region 7 and second P ⁺ -type emitter diffusion region 8
The first emitter electrode terminal 12 and the second emitter electrode terminal 17 are connected at room temperature. Therefore, the first P ⁺ -type emitter diffusion region 7 and the second P ⁺ -type emitter diffusion region 8 are electrically short-circuited.

Since the distance between the second P ⁺ -type emitter diffusion region 8 and the P ⁺ -type collector diffusion region 5 is the same as that of the conventional example, as shown in FIG. Similar to the curve. Therefore, in a high-temperature environment, the characteristic curve 23 is obtained, and the current amplification factor hFE diverges at a relatively high level in the low collector current region. Therefore, when the current amplification factor is high, the IC-
Only curve 21 of the hFE characteristic curve is used. In other words, since hFE does not diverge at room temperature, a high current amplification factor can be obtained.

In a high temperature environment, the second emitter electrode terminal 17 and the substrate contact region 18 are connected. Therefore, in a high-temperature environment, the first P ⁺ -type emitter diffusion region 7 at the center is used as an emitter, and the relatively shallow second P ⁺ -type emitter diffusion region 8 at the periphery is electrically connected to the semiconductor substrate 9. Become. As a result, the distance (base width) between the first P ⁺ -type emitter diffusion region 7 and the P ⁺ -type collector diffusion region 5 increases, and the current transfer rate decreases and the current amplification rate decreases.

That is, at a high temperature, an apparent base current IB is supplied by a leak current from the N-type well region 3 to the P-type semiconductor substrate 9, and holes injected from the emitter diffuse in the base and P Attempts to reach ⁺ type collector diffusion region 5. However, the semiconductor substrate 9
Most of the holes are absorbed here and do not reach the P ⁺ -type collector diffusion region 5 because the shallow second P ⁺ -type emitter diffusion region 8 is electrically connected to the P ⁺ -type emitter diffusion region 8. On the other hand, since there is a difference in the depth between the first P ⁺ -type emitter diffusion region 7 and the second P ⁺ -type emitter diffusion region 8, a part of the hole that diffuses a portion deeper than the surface in the base is partially P ⁺ -type. It will reach the collector diffusion region 5.
This ensures the function of the bipolar transistor.

In a high-temperature environment, leakage current from the base region 3 to the semiconductor substrate 9 poses a problem. However, as described above, the transport efficiency when holes travel through the base is reduced, so that current transmission is difficult. Becomes smaller, and the current amplification factor hFE
Goes down. As a result, as shown in FIG. 4B, the current amplification factor hFE generally decreases, and the room temperature characteristic curve 2
4. A high temperature characteristic curve 25 is obtained. In the characteristic curve 25 at the time of high temperature, the region of the collector current IC where the current amplification factor hFE diverges shifts to a lower level side than the characteristic curve 23 at the high current amplification factor in FIG. Therefore, in a high-temperature environment, by using the characteristic curve 25 with a low current amplification factor, the IC bias point 22 set at room temperature is reduced.
Can be used without changing.

Since the present embodiment is constructed as described above, the effective base width is increased in a high-temperature environment while the operation of the bipolar transistor is ensured, and the current amplification factor hFE is increased.
As a result, the bias point of the collector current IC can be set in a low IC region even at a high temperature, and low power consumption can be realized. In addition, the current amplification factor h under a high temperature environment
Since the absolute value of FE can be reduced, the apparent temperature coefficient can be reduced. Therefore, the degree of freedom in circuit design is increased, and it is possible to focus on miniaturization and low power consumption.

FIG. 5 shows a second embodiment of the present invention.
In this embodiment, the switching between the temperature detecting means and the semiconductor substrate 9 is performed.
Is provided outside the device. Since the configuration of the lateral bipolar transistor 1 is the same as that of the first embodiment, the same reference numerals are given and the description is omitted. The first emitter electrode terminal 32 extracted from the first P ⁺ type emitter diffusion region 7 and the second
A second emitter electrode terminal 37 extracted from the P ⁺ type emitter diffusion region 8 is connected via a switch 41 such as a bimetal which is an external switching means. Also,
The second emitter electrode terminal 37 and the substrate contact region 38 are connected via a thermistor element 42 as an external temperature detecting means. The switch 41 is turned on at room temperature.
N, and turned off at high temperature. The thermistor element 42 has a high resistance at room temperature, and its resistance decreases at a high temperature. Other configurations are the same as those of the first embodiment shown in FIG.

In this embodiment, since the switch 41 is ON at room temperature, the first emitter electrode terminal 32 and the second emitter electrode terminal 37 have the same potential, and the first P ⁺ -type emitter diffusion region 7 and the second P ^{The +} type emitter diffusion region 8 functions as an emitter together. The thermistor element 42 has a high resistance at room temperature, and the second emitter electrode terminal 37 and the substrate contact region 38 are not at the same potential. As the temperature rises, the resistance value R of the thermistor element 42 decreases in the relation of R = A / exp (B / T). A and B are constants.

When the temperature exceeds a certain temperature, the bimetal switch 41 is turned off, and the first emitter electrode terminal 32 and the second emitter electrode terminal 37 are electrically separated. on the other hand,
The second emitter electrode terminal 37 has a substrate potential and functions to suck up holes. Thus, the operation is performed in the same manner as in the high temperature environment in the first embodiment.

According to this embodiment, the same effects as those of the previous embodiment can be obtained, and since the switch 41 and the thermistor element 42 are provided outside the semiconductor substrate 9, it is possible to cope independently. .

Next, a third embodiment of the present invention will be described. FIG. 6 is an overall configuration diagram, FIG. 7 is a plan configuration diagram of a lateral bipolar transistor in the third embodiment, and FIG.
Is an equivalent circuit diagram thereof. First, referring to FIG.
The NP bipolar transistor 60 includes an emitter diffusion region 51 formed at a central portion, and a first collector diffusion region 52 and a second collector diffusion region 53 formed around and around the emitter diffusion region 51. A first collector electrode terminal C1 extends from the first collector diffusion region 52, and a second collector electrode terminal C2 extends from the second collector diffusion region 53.

The first collector diffusion region 52 and the second collector diffusion region 53 are connected to each other to change the current amplification factor hFE.
The base widths B1 and B2 are different from each other. In this embodiment, B1 <B2. It should be noted that the base widths B1 and B2 can be formed differently on the mask pattern. E is an emitter electrode terminal. As described in detail in the description of the first embodiment, the current amplification factor hFE has a deep relationship between the emitter injection efficiency and the base transport efficiency. When the base width is increased, the base transport efficiency decreases, and the current amplification factor hFE decreases. Decrease.

As shown in FIG. 6, a lateral bipolar transistor 60 has a first collector electrode terminal C1 and a second
A changeover switch for switching between the collector electrode terminal C2 is connected. The changeover switch 63 is a changeover signal generator 62 that receives a signal from the temperature detector 61 as an input.
Operate based on output from The temperature detector 61 as a temperature detecting means includes, for example, a diffusion resistor having a so-called temperature characteristic, a thermistor, a forward voltage drop (Vbe) of a PN junction, and a PTAT (current source proportional to the absolute temperature).
Etc. can be used.

The switching signal generator 62 includes the temperature detector 6
When a signal from the first terminal C1 is received and the temperature becomes equal to or higher than a predetermined temperature, a signal for switching the terminal connected to the collector terminal C from the first collector electrode terminal C1 to the second collector electrode terminal C2 is output to the changeover switch 63. Switch the electrode terminals. As a result, the lateral PNP bipolar transistor 60 becomes a transistor whose base width is increased from B1 to B2. Here, the switching signal generator 62 and the switch 63 constitute the switching means of the present invention.

FIG. 9 shows an IC-hFE characteristic curve when the collector electrode terminal is switched. FIG. 9A shows a transistor having a base width B1 formed when the collector terminal C is connected to the first collector electrode terminal C1. (B) is an IC-hFE characteristic curve of a transistor having a base width B2 formed when the collector electrode terminal C is connected to the second collector electrode terminal C2. When the collector terminal C is connected to the first collector electrode terminal C1,
When the current amplification factor hFE is generally high and the collector electrode terminal C is connected to the second collector electrode terminal C2, the current amplification factor hFE relatively decreases.

Also in this embodiment, the current amplification factor hF is low in a high temperature environment as shown in FIG.
The collector current ICmin when E sharply rises is
The current amplification factor hFE has shifted to a lower region as compared with the case of FIG. Therefore, when the collector terminal C is connected to the first collector electrode terminal C1 having the base width B1 near room temperature where the temperature is not high, the collector terminal C2 is connected to the second collector electrode terminal C2 having the base width B2 at high temperature. The region can be shifted to the low current side. Thereby, the bias point of the collector current can be set in a low IC region even in a high temperature environment, and low power consumption is realized.

According to this embodiment, the same effects as those of the above embodiments can be obtained, and the structure is simple since only the collector electrode terminals of the respective collector diffusion regions are switched.

FIG. 10 is a plan view of a lateral bipolar transistor according to a fourth embodiment of the present invention, and FIG. 11 is an equivalent circuit diagram thereof. In this embodiment, while the third embodiment switches a plurality of collector terminals having different base widths, the current amplification factor hFE is substantially switched by switching the emitter facing length. The lateral PNP bipolar transistor 80 includes an emitter diffusion region 71 formed at the center, and a first collector diffusion region 72 and a second collector diffusion region 73 formed around and around the emitter diffusion region 71. Both the first collector diffusion region 72 and the second collector diffusion region 73 have the same base width B1. A first collector electrode terminal C1 is drawn out of the first collector diffusion region 72, and a second collector diffusion region 73
From the second collector electrode terminal C2.

As shown in FIG. 11, the lateral bipolar transistor 80 has first and second collector electrode terminals C as shown in FIG.
1. A changeover switch 83 for switching the connection destination of C2 is connected. The changeover switch 83 operates based on the output from the changeover signal generator 62 (see FIG. 6 of the previous embodiment). At room temperature, the first and second collector electrode terminals C1 and C2 are commonly connected to the collector terminal C as shown in FIG. Thus, the first and second collector diffusion regions 72 and 73 are used as collectors.

On the other hand, when the environmental temperature is high, the first collector electrode terminal C1 is connected to the substrate, and only the second collector electrode terminal C2 is connected to the collector terminal C, as shown in FIG. Thus, since only the second collector diffusion region is used as the collector, the opposing length of the emitter is reduced. For this reason, the rate at which holes injected from the emitter reach the collector and become a collector current is large at room temperature and small at high temperatures. That is, the current amplification factor hFE at a high temperature is lower than that at a low temperature. Therefore, the IC-hFE characteristic curves are the same as those in FIG. 9 described in the third embodiment, and the same effects as in the previous embodiment can be obtained. Here, the switching signal generator 62 and the switch 83 constitute the switching means of the present invention.

In each of the above embodiments, a lateral bipolar transistor having a PNP structure has been described as an example. However, it is needless to say that the present invention can be applied to a lateral NPN bipolar transistor having an opposite polarity. Further, in each of the embodiments, the current amplification factor hFE is switched in two stages. However, the current amplification factor hFE can be switched in three or more stages depending on the circuit configuration.

[0059]

As described above, according to the first aspect of the present invention, the main surface of the base region has the same conductivity type as the semiconductor substrate.
Since the semiconductor device has a bipolar transistor in which a collector diffusion region and an emitter diffusion region composed of a plurality of regions are formed, the collector current-current amplification factor characteristics are changed by selectively using the plurality of emitter diffusion regions. be able to.

In particular, when all the emitter diffusion regions are used as emitters when the environmental temperature is not high, the current amplification factor can be made relatively large by using the temperature detecting means and the switching means. On the other hand, when the environmental temperature is high,
By switching some of the emitter diffusion regions to the same potential as the semiconductor substrate, the bias point of the collector current set when the environmental temperature is not high can be used even when the environmental temperature is high. This has made it possible to reduce power consumption over the entire temperature range.

According to the fifth aspect of the present invention, an emitter diffusion region and a plurality of collector diffusion regions of the same conductivity type as the semiconductor substrate are formed on the main surface of the base region. Similarly to the invention, the collector current-current gain characteristic can be changed by selectively using a plurality of collector diffusion regions.

In particular, when the ambient temperature is high, when the collector diffusion region is lower than the normal temperature and the emitter facing length is shortened by the temperature detecting means and the switching means, the current amplification factor can be easily reduced according to the environmental temperature.
The bias point of the collector current can be set to a low point.

Similarly, a plurality of collector diffusion regions may have different base widths, and a collector diffusion region having a short base width may be used as a collector at a normal temperature and a collector diffusion region having a long base width may be used as a collector at a high temperature. The bias point of the collector current set when the environmental temperature is not high can be used even when the environmental temperature is high.

[Brief description of the drawings]

FIG. 1 is a diagram showing a configuration of a first exemplary embodiment of the present invention.

FIG. 2 is a diagram illustrating a bipolar transistor according to a first embodiment.

FIG. 3 is a collector current-current amplification factor characteristic diagram in the first embodiment.

FIG. 4 is a diagram showing a change in collector current-current amplification factor characteristics due to a difference in current amplification factor.

FIG. 5 is a diagram showing a configuration of a second embodiment.

FIG. 6 is an overall configuration diagram of a third embodiment.

FIG. 7 is a plan view of a bipolar transistor according to a third embodiment.

FIG. 8 is an equivalent circuit diagram of a bipolar transistor according to a third embodiment.

FIG. 9 is a diagram showing a change in a collector current-current amplification factor characteristic when a collector electrode terminal is switched.

FIG. 10 is a plan view of a bipolar transistor according to a fourth embodiment.

FIG. 11 is an equivalent circuit diagram of a bipolar transistor according to a fourth embodiment.

FIG. 12 is a diagram showing a conventional example.

FIG. 13 is a collector current-current amplification factor characteristic diagram in a conventional example.

[Explanation of symbols]

1, 60 lateral PNP bipolar transistor 2, 80 P-type epitaxial region 3 N-type well region (base region) 4 P ⁺ -type base contact diffusion region 5 P ⁺ -type collector diffusion region 7 First P ⁺ -type emitter diffusion region 8 Second P ⁺ -Type emitter diffusion region 9 P-type semiconductor substrate 10 Switching circuit (switching means) 11 Temperature detecting section (temperature detecting means) 12, 32 First emitter electrode terminal 13 Base electrode terminal 14, 34 Collector electrode terminal 15 N-channel MOS transistor 16 p Channel MOS transistors 17, 37 Second emitter electrode terminals 18, 38 Substrate contact area 41 Switch (switching means) 42 Thermistor element (temperature detecting means) 51, 71 Emitter diffusion area 52, 72 First collector diffusion area 53, 73 Second Collector diffusion Pass 60 lateral PNP bipolar transistor 61 temperature detector (temperature detecting means) 62 switching signal generators 63, 83 changeover switches C collector terminal E emitter electrode terminal

Claims (8)

[Claims] In a semiconductor device having an integrated circuit formed on the same semiconductor substrate, a base region of a conductivity type opposite to that of the semiconductor substrate is formed on a main surface side of the semiconductor substrate, and a base region is formed on a main surface of the base region. A semiconductor device comprising a lateral bipolar transistor formed with a collector diffusion region and a plurality of emitter diffusion regions of the same conductivity type as the semiconductor substrate, respectively. 2. The emitter diffusion region according to claim 1, wherein the plurality of emitter diffusion regions have a deep emitter diffusion region formed in a central portion of the base region, and a shallow emitter diffusion region formed in a peripheral portion of the deep emitter diffusion region. 2. The semiconductor device according to claim 1, comprising: 3. The semiconductor device according to claim 2, further comprising: temperature detecting means; and switching means for switching a potential of at least one of the plurality of emitter diffusion regions according to an output of the temperature detecting means. 4. The emitter diffusion region for switching the potential is the shallow emitter diffusion region, and the shallow emitter diffusion region has the same potential as the semiconductor substrate when the environmental temperature is high. 4. The semiconductor device according to claim 3, wherein 5. A semiconductor device having an integrated circuit formed on the same semiconductor substrate, wherein a base region having a conductivity type opposite to that of the semiconductor substrate is formed on a main surface side of the semiconductor substrate, and a base region is formed on the main surface of the base region. A semiconductor device comprising a lateral bipolar transistor having an emitter diffusion region and a plurality of collector diffusion regions of the same conductivity type as the semiconductor substrate, respectively. 6. The semiconductor device according to claim 5, further comprising a temperature detecting means, and switching means for switching the plurality of collector diffusion regions according to an output of the temperature detecting means. 7. The plurality of collector diffusion regions are collector diffusion regions having different base widths, and the switching means uses a collector diffusion region having a short base width at a normal temperature as a collector and a collector diffusion region having a long base width at a high temperature. 7. The semiconductor device according to claim 6, wherein the region is switched to be used as a collector. 8. The switching means switches at a normal temperature such that a plurality of collector diffusion regions are used as collectors, and at a high temperature, a collector diffusion region which is lower than the normal temperature is used as a collector so as to shorten an emitter opposing length. The semiconductor device according to claim 6.