JPH10112984A - Dead time compensation circuit of inverter - Google Patents

Abstract

PROBLEM TO BE SOLVED: To suitably compensate the dead time of an inverter connected with a system via a transformer. SOLUTION: After a reactive current command value IQ* and an exciting current part IEX are added with an adder, and its result and an active current command value IP* are converted to a 3-phase AC current signal, it is inputted in a current polarity detector 14. In other case, the active current command value IP* and the reactive current command value IQ* are converted to a 3-phase AC current signal, and the result obtained by adding the signal and the exciting current part IEX with a second adder is inputted in the detector 14. The current polarity detection phase leads the conventional phase, so that a control signal correction part ±Δλ is added to a control signal λ with adequate timing. In other case, a reverse hysteresis setting apparatus is added to the current polarity detector in which the conventional current signal is inputted, and the current polarity detection time point is advanced by a constant value. Thereby the dead time of an inverter whose output is constant is compensated only by a little addition (the reverse hysteresis setting apparatus).

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an inverter dead time compensating circuit for compensating an adverse effect of a dead time provided for preventing a short circuit between upper and lower arms of a voltage-type pulse width modulation control inverter.

[0002]

2. Description of the Related Art FIG. 5 is a circuit diagram showing one phase of an inverter for converting a direct current to an alternating current, which is an anti-parallel connection of a gate turn-off thyristor (hereinafter abbreviated as GTO) and a freewheeling diode. Upper arm 5U
And the lower arm 5X having the same configuration are connected in series and connected to a DC power supply (capacitor 6). By alternately turning on and off the upper arm 5U and the lower arm 5X, a load is connected to a point A, which is a connection point between them, and an output current _IL flows. By the way, if the upper arm 5U and the lower arm 5X are simultaneously turned on for a very short time, the DC power supply is short-circuited, an excessive short-circuit current flows through both arms, and there is a possibility that the elements may be destroyed. This is a so-called arm short circuit.
Therefore, by providing a time period during which both the upper arm 5U and the lower arm 5X are turned off, it is possible to reliably prevent an arm short circuit. The period when both arms are off at the same time is called dead time, and is indicated as _Td .

FIG. 6 is an operation waveform diagram showing the operation of each section when a conventional dead time is provided in the inverter shown in FIG. 5, and FIG. 6 shows changes in the control signal λ and the carrier wave C. 6 shows a change in the voltage at the target point A, FIG. 6 shows a change in the gate signal of the GTO 5U in the upper arm, FIG. 6 shows a change in the gate signal of the GTO 5X in the lower arm, and FIG. 6 shows that the output current polarity is positive (I _L > 0). 6) shows the actual change in the voltage at the point A, and FIG. 6 shows the change in the actual point A voltage when the output current polarity is negative ( _IL <0). That is,
The voltage at the point A when I _L > 0 is different from the target value by B ₁ (see FIG. 6), and this increases the negative voltage. Further, the voltage at the point A when I _L <0 is different from the target value by B ₂ (see FIG. 6), and this increases the positive voltage.

FIG. 7 is a waveform diagram showing changes in output voltage and current when a conventional dead time is provided in the inverter shown in FIG. 5, FIG. 7 shows a waveform of the output voltage, and FIG. In each case, the solid line represents the target waveform, and the broken line represents the waveform affected by the dead time _Td . As apparent from FIG. 7, the output current I
_When the polarity of _L is negative, the output voltage is biased to the positive side,
Since the polarity of the output current I _L is positive when the output voltage is biased to the negative side, resulting in discontinuities in the output voltage at the time (i.e. the time the current polarity is switched) a current passes through the zero point. Therefore, the current control is discontinuous at this point, and the current is distorted when passing through the zero point.

The above-mentioned phenomenon can be ignored when the number of switching operations per unit time of the inverter is small. However, when the switching frequency is high as in a pulse width modulation control inverter, the ratio of dead time to the entire time increases. Therefore, the fluctuation of the output voltage greatly affects
Control performance will be degraded. Therefore, a circuit for compensating for a dead time is provided in a PWM inverter or the like having a high switching frequency.

FIG. 8 is a circuit diagram showing a conventional example of a circuit for compensating a dead time of an inverter. In recent inverters, vector control is generally used to improve the control performance. Therefore, the following description will be made assuming that the current is divided into an effective current and a reactive current which are orthogonal to each other.
In conventional circuit of FIG. 8, the active current command value I _P ^* and the reactive current command value I _Q ^* from the reverse vector de Rare 11 and calculating a current command value of the three-phase AC I ^* by a two-phase / 3-phase converter 12 Then, the deviation between the current command value I ^* and the current detection value I is input to the current controller 13, and a control signal λ that makes the input deviation zero is obtained from the current controller 13.

On the other hand, the current command value I ^* is input to a current polarity detector 14 composed of a comparator, and +1 or -1 is output each time a zero point is passed. By inputting the output of the current polarity detector 14 to the amplifier 15 having a gain of the correction amount Δλ, a control signal correction ± Δλ is obtained from the amplifier 15. The adder 16 controls the control signal λ and
Δλ and the result of the addition is provided to the PWM modulator 18 as a new control signal. The PWM modulator 18 also receives the carrier wave C from the carrier wave generator 17, and a pulse train obtained by pulse width modulation turns on and off each switching element constituting the inverter.

FIG. 9 is an operation waveform diagram showing the operation of the conventional circuit in which the influence of the dead time shown in FIG. 8 is compensated. The left side shows the case where the current polarity is positive, that is, I _L > 0.
The right side shows the case where the current polarity is negative, that is, I _L <0. FIG. 9 shows changes in the control signal λ (dot-dash line), control signal correction ± Δλ (dashed line) and carrier wave C (solid line), FIG. 9 shows a change in target point A voltage, and FIG. 9 shows a current polarity detector 14. FIG. 9 shows GTO5 of the upper arm.
Change of gate signal of U, FIG. 9 shows GTO5 of lower arm
FIG. 9 shows a change in the gate signal of X, and FIG. 9 shows a change in the actual voltage at the point A.

If I _L > 0 (left side in FIG. 9), the current polarity detector 14 is shifted by T _d / 2 by adding the correction ± Δλ to the control signal λ.
As a result, the width D of the waveform of the point A output voltage (see FIG. 9) and the width D of the point A voltage target value (see FIG. 9) become the same.
In the case of I _L <0 (right side in FIG. 9), the current polarity detector 14 subtracts the correction amount ± Δλ from the control signal λ, and the current operation before and after the current is T _d / 2. As a result, the width D of the waveform of the output voltage at the point A (see FIG. 9) is equal to the width D of the target value of the voltage at the point A (see FIG. 9).

FIG. 10 is a waveform diagram showing changes in output voltage and current of the conventional circuit in which the influence of the dead time shown in FIG. 8 is compensated. FIG. 10 shows the waveform of the output voltage.
Represents the waveform of the output current, the solid line represents the target waveform, the broken line represents the waveform affected by the dead time _Td , and the dashed line represents the waveform of the control signal correction ± Δλ. This, as shown FIG 10, when the polarity of the output current I _L is negative, by subtracting the correction waveform (dashed line) by Δλ from the waveform affected by the dead time T _d (dashed line), the output The voltage matches the target waveform (solid line). When the polarity of the output current I _L is positive, by adding the correction waveform (dashed line) by Δλ waveform affected by the dead time T _d (dashed line), in the same way as described above the output voltage target waveform ( (Solid line). As a result, no discontinuity occurs in the output voltage when the current passes through the zero point (ie, when the current polarity switches). Therefore, it is possible to avoid discontinuity of the current control at this time, and there is no possibility that distortion occurs when the current passes through the zero point.

[0011]

In a power system, it is necessary to appropriately control the reactive power of the system. In the past, a synchronous rotating machine was used, but since maintenance of bearings and brushes was troublesome, the type was switched to a stationary type in which a power capacitor was opened and closed with a switch. However, there is a disadvantage that the reactive power cannot be continuously adjusted due to the use of the capacitor, and maintenance and inspection work is still necessary, for example, the contacts of the switch are worn out. Therefore, if an inverter is connected to the power system, the reactive power of the system can be continuously adjusted by the inverter, and maintenance and inspection work can be significantly reduced. Became heavily used. The inverter for use as a static var adjuster also, in order to avoid the influence of the dead time T _d, the addition to the control signal λ corresponding to the polarity of the output current I _L of the control signal correction amount ± [Delta] [lambda] described above or It has a circuit for subtraction.

FIG. 11 is a main circuit connection diagram showing a case where an inverter is connected to a power system by a single line, wherein 2 is a power system, 3 is a connection impedance, 4 is a transformer, 5 is an inverter, and 6 is a capacitor. 7 is an inverter current detector. The inverter 5 is connected to the power system 2 via the transformer 4 because the voltage distribution of the power system 2 is generally extra high voltage. At this time, since the inverter 5 controls the current flowing through the interconnection impedance 3 as a control target, the current command value I ^*
Is the primary side current of the transformer 4, and the actual current I is the current flowing through the inverter 5 and the current flowing through the secondary side of the transformer 4. Therefore, the two currents have a deviation corresponding to the exciting current of the transformer 4.

FIG. 12 is a vector diagram showing a difference between the primary current and the secondary current of the transformer, wherein I _P ^* is an effective current command value corresponding to a loss generated by the reactive power adjusting device. Power is being received from the grid. _IQ ^* is the reactive current command value,
I _EX is an exciting current component of the transformer 4. As is apparent from this vector diagram, the current command value I ^* is obtained by the vector sum of I _P ^* and I _Q ^* , and the phase angle is θ ₁ , but the detected current value I flowing through the main body of the inverter 5 is _IP ^* and _IQ
^This is the vector sum of ^* and I _EX , and its phase angle is θ ₂ . Here, since θ ₁ > θ ₂ , the actual current I flowing through the main body of the inverter 5 has an advanced phase as compared with the current command value I ^* . The same applies to the case where the output current command is advanced and the reactive current is a reactive current.

[0014] Figure 13 is a waveform diagram showing the waveform of the vector diagram shown in FIG. 12, 13 I _P ^* (dashed line) and I _Q ^* obtained from (thick solid line) and the current command value I ^* FIG. 13 shows the waveforms of I _P ^* (broken line) and I (dashed solid line).
The waveform of the actual current I (thin solid line) obtained from _Q ^* (thick solid line) and I _EX (dot-dash line) is shown. As can be seen from FIGS. 12 and 13, since the inverter 5 is connected to the power system 2 via the transformer 4, the control signal correction amount ± ΔD for avoiding the influence of the dead time _Td is provided.
There is an inconvenience that the time point when the current command value I ^* detected when obtaining λ passes through the zero point is advanced in phase from the time point when the actual current passes through the zero point.

FIG. 14 is a vector diagram when the output current is large. The phase angle of the current command value I ^* is θ ₃ , and the phase angle of the output current I is θ ₄ . FIG. 15 is a vector diagram when the output current is small. The phase angle of the current command value I ^* is θ ₅ , and the phase angle of the output current I is θ ₆ . Comparing the difference between the two phase angles when the current is large (θ ₃ −θ ₄ ) and the difference between the two phase angles when the current is small (θ ₅ −θ ₆ ), Is bigger. That is, when the output current changes, there is a disadvantage that the leading phase angle of the current flowing through the inverter 5 with respect to the current command value also changes.
Due to these factors, in the current dead time compensation circuit, the control signal correction amount ± Δλ is not given in an appropriate phase, so that the control accuracy of the current control is reduced and extra harmonics are added to the system side. The problem such as giving out.

An object of the present invention is to make it possible to appropriately compensate for the dead time of an inverter connected to a system via a transformer.

[0017]

In order to achieve the above object, a dead time compensating circuit for an inverter according to the present invention includes an upper arm and a lower arm corresponding to a magnitude relationship between a carrier wave and a control signal. When performing power conversion by alternately turning on and off, a voltage type inverter having a dead time for preventing simultaneous turning on of the upper and lower arms is connected to a power system via a transformer, and the power source is detected from the power system. A current polarity detector for inputting an output current signal of the voltage type inverter or a current command signal of the voltage type inverter and detecting the polarity thereof; a compensation amount calculator for calculating a compensation amount corresponding to the control signal; An input signal to the current polarity detector in a dead time compensation circuit of an inverter including a circuit for adding or subtracting a compensation amount to or from the control signal in accordance with the current polarity Phase, is intended to comprise an excitation current component correction circuit for correcting in response to the exciting current of the transformer.

The exciting current component correction circuit adds the exciting current component of the transformer to the reactive current component of the active current component and the reactive current component that are orthogonal to each other. After converting to a three-phase AC current signal,
It is to be input to the current polarity detector. Or
After converting the active current component and the reactive current component into a three-phase AC current signal, the exciting current of the transformer is added, and the result of the addition operation is input to the current polarity detector.

Alternatively, the current polarity detector is constituted by a comparator, and a reverse hysteresis setting device for detecting the polarity of the input signal detected by the current polarity detector at a predetermined advance phase is added to the current polarity detector. It shall be.

[0020]

DESCRIPTION OF THE PREFERRED EMBODIMENTS In the case where an inverter is connected to a power system via a transformer, control of the inverter uses a current detected on the system side (ie, a transformer primary side current). However, the current flowing through the inverter body (that is, the secondary current of the transformer) includes the exciting current of the transformer, so that the former current and the latter have a phase difference. Incidentally, in order to compensate for the dead time of the inverter, it is necessary to detect the current polarity and add or subtract the correction amount Δλ of the control signal to or from the control signal λ in accordance with the polarity. However, since the time point at which the current passes through the zero point varies in accordance with the phase difference of the current, the correction amount Δ
The timing for adding and subtracting λ is shifted, and the control accuracy of the inverter is reduced. Therefore, in the present invention, the exciting current of the transformer is added to the reactive current of the current command value, and the current obtained as the vector sum of this and the active current is input to the current polarity detector. Alternatively, a result obtained by adding the exciting current component to the three-phase AC current command value is input to the current polarity detector. Alternatively, an influence of the exciting current is eliminated by adding a reverse hysteresis setting device to the current polarity detector, which shifts the current zero point detected by the current polarity detector by a phase that changes with the exciting current.

[0021]

FIG. 1 is a circuit diagram showing a first embodiment of the present invention. The circuit of the first embodiment is obtained by adding an exciting current compensation circuit 20 to the conventional circuit described in FIG. It is composed. Therefore, the description of each part other than the excitation current correction circuit 20 will be omitted. As described above, in the conventional circuit, the current input to the current polarity detector 14 does not consider the exciting current I _EX of the transformer 4, so that the control signal correction amount ± Δλ is added to the control signal λ. It was not done at the right time. Therefore, in the first invention, a current signal in which the exciting current _IEX is corrected is supplied from the exciting current correcting circuit 20 to the current polarity detector 14.

FIG. 2 is a circuit diagram showing a second embodiment of the present invention. The circuit of the second embodiment is configured by adding an exciting current compensation circuit 30 to the conventional circuit described in FIG. It was done. Therefore, the description of each part other than the exciting current correction circuit 30 will be omitted. The excitation current correction circuit 30 includes a first adder 31, an inverse vector drain 32 for the correction circuit, and a two-phase / three-phase converter 33 for the correction circuit. In addition,
It is assumed that the inverter 5 is separated into an active current component and a reactive current component for vector control, and the illustration of the first coordinate conversion circuit is omitted.

[0023] In the present invention, the first adder 31 adds the excitation current component I _EX and reactive current command value I _Q ^*. The result of the addition operation and the effective current command value I _P ^* are converted into a three-phase AC current signal by the inverse vector drain 32 for the correction circuit and the two-phase / three-phase converter 33 for the correction circuit to the current polarity detector 14. If given, the control signal correction ± Δλ obtained by the current polarity detector 14 and the amplifier 15 can be added to or subtracted from the control signal λ at the correct timing.

FIG. 3 is a circuit diagram showing a third embodiment of the present invention. This third embodiment is configured by adding an exciting current component correction circuit 40 to the conventional circuit described in FIG. It was done. Accordingly, the description of each part other than the exciting current component correction circuit 40 will be omitted. The excitation current component correction circuit 40 includes a correction circuit inverse vector drain 32, a correction circuit two-phase / three-phase converter 33, and a second adder 41. In addition,
It is assumed that the inverter 5 is separated into an active current component and a reactive current component for vector control, and the illustration of the first coordinate conversion circuit is omitted.

[0025] In the present invention, converted into the active current instruction value I _P ^* and the reactive current command value I _Q ^* to three-phase alternating current signal in the reverse correction circuit vector Torea 32 and the correction circuit 2-phase / 3-phase converter 33 Then, the second adder 41 adds this to the exciting current I _EX , and supplies the result of the addition to the current polarity detector 14. Therefore, the control signal correction output from the amplifier 15 ± Δλ
Is added to and subtracted from the control signal λ at the correct timing.

FIG. 4 is a circuit diagram showing a fourth embodiment of the present invention. The circuit of the fourth embodiment is different from the conventional circuit shown in FIG. Detector 5
1 and a circuit in which an inverse hysteresis setting device 52 is combined. Therefore, the description of the remaining portions excluding the current polarity detector 51 and the reverse hysteresis setting device 52 will be omitted. In the present invention, the reverse polarity hysteresis setting device 52 is added to the current polarity detector 51, and the reverse hysteresis setting device 52 sets a constant advance phase. The current polarity detector 51 is operated at a time when the phase substantially coincides with the phase of the actual current flowing through the circuit, so that the influence of the dead time can be corrected.

FIG. 16 is an operation waveform diagram showing the amount of phase advance when a current having a large current change rate flows in the circuit of the fourth embodiment, and FIG. 17 shows a small current change rate in the circuit of the fourth embodiment. FIG. 9 is an operation waveform diagram illustrating a phase advance amount when a current flows. As apparent from FIGS. 16 and 17, the fourth
In the circuit of the embodiment, since the reverse hysteresis set value is constant, there is a disadvantage that the amount of phase advance varies depending on the change rate of the flowing current. Therefore, the present invention is desirably applied to a case where the output of the inverter 5 is constant.

[0028]

When a conventional dead time compensating circuit is applied to an inverter connected to a power system via a transformer, the correction signal for compensating for the dead time in the control signal is affected by the transformer exciting current. Addition could not be performed at the right time. In each of the first, second, and third inventions, a current signal in which the transformer excitation current is considered is input to the current polarity detector, so that the current polarity switching time advances in accordance with the actual current. Become a corner. Therefore, regardless of the magnitude of the current, the correction amount for dead time compensation is added at an appropriate timing, so there is no risk of the control accuracy of the current control of the inverter being reduced, and it is possible to avoid generating extra harmonics in the system. The effect that can be obtained is obtained. In the fourth invention, the current polarity switching point is set to a constant lead angle, so that it is not possible to cope with the magnitude of the current change rate.
Since it is only necessary to add a reverse hysteresis setting device for setting a constant lead angle to the current polarity detector of the conventional dead time compensating circuit, the present invention can be applied to an inverter operating at a constant output.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a first embodiment of the present invention.

FIG. 2 is a circuit diagram showing a second embodiment of the present invention.

FIG. 3 is a circuit diagram showing a third embodiment of the present invention.

FIG. 4 is a circuit diagram showing a fourth embodiment of the present invention.

FIG. 5 is a circuit diagram showing one phase of an inverter that converts DC to AC.

6 is an operation waveform diagram showing the operation of each unit when a conventional dead time is provided in the inverter shown in FIG. 5;

FIG. 7 is a waveform diagram showing changes in output voltage and current when a conventional dead time is provided in the inverter shown in FIG. 5;

FIG. 8 is a circuit diagram showing a conventional example of a circuit for compensating a dead time of an inverter.

FIG. 9 is an operation waveform diagram showing an operation of the conventional circuit in which the influence of the dead time shown in FIG. 8 is compensated.

FIG. 10 is a waveform diagram showing changes in output voltage and current of the conventional circuit in which the influence of the dead time shown in FIG. 8 is compensated.

FIG. 11 is a main circuit connection diagram showing a case where an inverter is connected to a power system by a single line;

FIG. 12 is a vector diagram showing a difference between a transformer primary current and a secondary current.

FIG. 13 is a waveform diagram showing the vector diagram shown in FIG. 12 in a waveform.

FIG. 14 is a vector diagram when the output current is large.

FIG. 15 is a vector diagram when the output current is small.

FIG. 16 is an operation waveform diagram showing a phase advance amount when a current having a large current change rate flows in the circuit of the fourth embodiment.

FIG. 17 is an operation waveform diagram showing a phase advance amount when a current having a small current change rate flows in the circuit of the fourth embodiment.

[Explanation of symbols]

 2 Power system 3 Interconnection impedance 4 Transformer 5 Inverter 5U Upper arm 5X Lower arm 6 Capacitor 7 Inverter current detector 11 Reverse vector drain 12 Two-phase / 3-phase converter 13 Current regulator 14, 51 Current polarity detector 15 Amplifier 16 Adder 17 Carrier Wave Generator 18 PWM Modulator 20, 30, 40 Excitation Current Correction Circuit 31 First Adder 32 Reverse Vector Dreaer for Correction Circuit 33 2-Phase / 3-Phase Converter for Correction Circuit 41 Second Addition Device 52 Reverse hysteresis setting device

Claims (4)

[Claims] A dead end for preventing simultaneous turning on of the upper and lower arms when power conversion is performed by alternately turning on and off an upper arm and a lower arm in accordance with a magnitude relationship between a carrier wave and a control signal. A voltage type inverter having a time is connected to a power system via a transformer, and an output current signal of the voltage type inverter detected from the power system or a current command signal of the voltage type inverter is input to change the polarity. An inverter including a current polarity detector for detecting, a compensation amount calculator for calculating a compensation amount corresponding to the control signal, and a circuit for adding or subtracting the compensation amount to or from the control signal in accordance with the current polarity The dead time compensating circuit according to claim 1, further comprising an exciting current compensating circuit for compensating a phase of a signal input to the current polarity detector in accordance with an exciting current of the transformer. Inverter dead time compensation circuit. 2. The inverter dead time compensating circuit according to claim 1, wherein said exciting current compensating circuit converts an input signal to said current polarity detector into an active current component and a reactive current component orthogonal to each other. A first coordinate conversion circuit for decomposing; a first adder for adding an exciting current of the transformer to the reactive current component obtained from the first coordinate conversion circuit; a calculation result of the first adder and the validity Second for converting the current component into a three-phase AC current signal
A dead time compensation circuit for an inverter, comprising: a coordinate conversion circuit. 3. The inverter dead time compensating circuit according to claim 1, wherein the exciting current component correcting circuit converts a signal input to the current polarity detector into an active current component and a reactive current component orthogonal to each other. A first coordinate conversion circuit for decomposing, a second coordinate conversion circuit for converting the active current component and the reactive current component into a three-phase alternating current signal, and an output of the second coordinate conversion circuit which includes an exciting current of the transformer. A dead time compensating circuit for an inverter, comprising: a second adder for adding. 4. A dead time for preventing simultaneous turning on of the upper and lower arms when power conversion is performed by alternately turning on and off the upper arm and the lower arm in accordance with the magnitude relationship between the carrier wave and the control signal. A voltage type inverter having a time is connected to a power system via a transformer, and an output current signal of the voltage type inverter detected from the power system or a current command signal of the voltage type inverter is input to change the polarity. An inverter including a current polarity detector for detecting, a compensation amount calculator for calculating a compensation amount corresponding to the control signal, and a circuit for adding or subtracting the compensation amount to or from the control signal in accordance with the current polarity In the dead time compensation circuit, the current polarity detector is constituted by a comparator, and the polarity of the input signal detected by the current polarity detector is detected at a predetermined advance phase. A dead time compensation circuit for an inverter, wherein an inverse hysteresis setting device is added to the current polarity detector.