JPH10106159A - Data reproducing device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To always maintain frequency characteristics of a waveform-equalizing circuit at good conditions and to reproduce data in a good condition even when differences in frequency characteristics occur in reproduced output signals. SOLUTION: In order to reproduce the coded data signals by decoding the reproduced output signals of the data signals coded in compliance with a specified rule and stored in a disk in compliance with a specified rule, the data reproducing device A is so constituted to be provided with an AGC circuit 1 which outputs reproduced output signals as the reproduced signals with a definite amplitude, a waveform-equalizing circuit 2A which outputs the waveform-equalized signal obtained by waveform-equalizing this reproduced signal, a peak-hold circuit 3 which supplies a first detection signal having been obtained by detecting the peak-hold of the waveform-equalized signal to the ACC circuit 1 as a gain control signal and a low-pass filter 4. In this case, the device A is provided also with a peak-hold circuit 8, a low-pass filter 6, a system controller 5 and a waveform-equalizing circuit 2A which can change the gain at a specific frequency by a frequency-characteristic controlling signal.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a waveform equalizing circuit of a data reproducing apparatus for reproducing a data signal from a storage medium such as an optical disk or a magnetic tape in which a data signal modulated according to a predetermined rule is stored. Things,
In particular, the frequency characteristics of the waveform equalization circuit that aims to reduce the increase in decoding errors due to the reproduced output signal being distorted due to intersymbol interference or the like are always kept in a good state,
An object of the present invention is to provide a data reproducing apparatus capable of reproducing data in a good condition even when a difference in frequency characteristics occurs in a reproduced output signal due to a difference in recording state or a change over time.

[0002]

2. Description of the Related Art Hitherto, a waveform equalizing circuit has been used in a data reproducing apparatus for the purpose of removing waveform distortion due to intersymbol interference of a reproduced signal output from an optical disk or the like. Specifically, in order to change the frequency characteristics of the waveform equalization circuit in response to the difference in the reproduction signal output including (temporal fluctuations in the frequency characteristics) in the radial direction of the disk, a coarse adjustment waveform equalization circuit and a fine adjustment are used. Waveform equalization system in which two-stage waveform equalization circuits are connected in cascade (for example, Japanese Patent Application Laid-Open No. Sho 62-34).
No. 387). In addition, a waveform equalization circuit has been proposed that automatically responds to a frequency characteristic difference of a reproduced signal output between media in addition to a variation in frequency characteristic in a radial direction of a disk (for example, Japanese Patent Application Laid-Open No. 4-69864). .

[0003]

However, the waveform equalization method described in Japanese Patent Application Laid-Open No. Sho 62-34387 can be expected to have an effect on the difference in the frequency characteristics in the radial direction of the disk, but the frequency characteristics between the media can be expected. The difference cannot be handled. Further, the waveform equalizing circuit described in Japanese Patent Application Laid-Open No. 4-69864 can be expected to have an effect on a frequency characteristic difference due to a medium difference, but it is necessary to record specific information in advance on a disk. There is.

[0004]

In order to solve the above-mentioned problems, the present invention provides a data reproducing apparatus having the following configuration.

[0005] In order to reproduce the encoded data signal by decoding the reproduced output signal of the data signal encoded according to a predetermined rule and stored in a storage medium (disk) according to a predetermined rule, AGC means (A) for outputting the reproduction output signal as a reproduction signal having a constant amplitude.
GC circuit) 1, waveform equalizing means (waveform equalizing circuit) 2, 2A for outputting a waveform equalized signal obtained by equalizing the waveform of the reproduced signal.
And the first detecting the peak hold of the waveform equalized signal.
The AGC means (A
And a peak hold means (constituted by a peak hold circuit 3 and a low-pass filter (LPF) 4) for supplying to the GC circuit 1; A specific frequency signal detecting means (consisting of a peak hold circuit 8 and a low-frequency elimination filter (LPF) 6) for outputting a second detection signal having detected a peak hold of the signal as a specific frequency level signal; and the waveform equalization A process of generating the encoded data signal by decoding the signal in accordance with a predetermined rule (a process of sequentially passing through a slice circuit 9, a PLL circuit 10, a synchronization detection circuit 11, a data demodulation circuit 12, and an error correction circuit 13) The phase error signal (obtained from the PLL circuit 10) and the error number signal (obtained from the error correction circuit 13) While being fed, the gain control signal, said specific frequency level signal is supplied,
A control means (system controller) 5 for outputting a frequency characteristic control signal to the waveform equalizing means (waveform equalizing circuit) 2A;
A is a data reproducing apparatus characterized in that the gain at a specific frequency can be changed by the frequency characteristic control signal.

[0006]

According to the present invention, the frequency characteristics of the waveform equalizing circuit can always be kept in a good state without using a complicated circuit, and even if there is a difference in the frequency characteristics due to the medium or a temporal change in the frequency characteristics. Reliable data reproduction with low decoding error can be performed.

[0007]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Referring to the accompanying drawings, a description will now be given of a waveform equalizing circuit conventionally used in a data reproducing apparatus such as an optical disk apparatus, and then an embodiment of the data reproducing apparatus of the present invention. explain.

FIG. 6 is a diagram showing a waveform equalizing circuit conventionally used in a data reproducing apparatus such as an optical disk apparatus and its peripheral circuits. Taking this as an example, a waveform equalization circuit of a conventional general data reproducing apparatus will be described.

As shown in FIG. 6, a reproduced output signal obtained by reproducing a data signal which has been encoded according to a predetermined rule and stored in a disk is decoded and coded according to a predetermined rule. The reproduced output signal (before being decoded) reproduced from AGC (Auto Gain Control)
rol) Input to the circuit 1. The AGC circuit 1 converts the reproduced output signal into an output waveform having a constant amplitude and then outputs the output signal to the waveform equalization circuit 2 in order to remove an output waveform variation due to eccentricity of the disc from the input reproduced output signal.

The waveform equalizing circuit 2 converts a waveform equalized signal from a reproduced output signal having a constant amplitude from which waveform distortion due to intersymbol interference or the like has been removed, through a slice circuit 9 shown in FIG. Loop) outputs the data to a data detection system including a circuit 10, a synchronization detection circuit 11, a data demodulation circuit 12, an error correction circuit 13, and the like. In this manner, the data detection system can decode the reproduced output signal reproduced from the disc in accordance with a predetermined rule to extract the encoded data signal.

The waveform equalizing circuit 2 also outputs a waveform equalizing signal to the peak hold circuit 3. The peak hold circuit 3 detects the peak value of the input waveform equalization signal and outputs a peak hold detection signal to a low-pass filter (LPF) 4. The LPF 4 uses, as a gain control signal, a signal obtained by removing fluctuations outside the required band from the peak hold detection signal as an AGC signal.
Output to circuit 1.

The operation of the above-mentioned waveform equalizing circuit 2 is as shown in FIG. In FIG. 7, a solid line shows a time waveform of a solitary wave response of the shortest pulse of the transmission line in the data reproducing apparatus, and a broken line shows a solitary wave response of the shortest pulse which does not affect an adjacent bit described later. FIG. The horizontal axis indicates time, and the vertical axis indicates the solitary wave response level of the shortest pulse in the waveform equalized signal. .. Written on the horizontal axis are data point intervals, that is, inversion points of the bit clock. Data point intervals a to h shown in this example
Represents a solitary wave response (T is a bit clock period) having a shortest period of 3T width like a CD (compact disk). In the figure, T represents 1T width.

However, when the transmission path band is insufficient in the transmission path of the data reproducing apparatus, the tail of the solitary wave response of the shortest pulse on the transmission path affects adjacent bits (intersymbol interference occurs. That is, a normal reproduced waveform cannot be obtained.

In order to eliminate this inconvenience, the reproduced waveform is slimmed by the waveform equalizing circuit 2 having a frequency characteristic as shown in FIG. 8 to remove the influence on the adjacent bits. As a result, a waveform that does not affect the adjacent bit is as shown by a broken line in FIG.

However, the waveform of the reproduced waveform may differ depending on the pit shape of the disk or the lapse of time (the inner and outer circumferences of the disk), and the frequency characteristics of the waveform equalizing circuit are adaptively changed according to the frequency characteristics of the reproduced output signal. Is desirable.

Accordingly, the present invention provides a waveform equalizing circuit that is adaptively adapted to the frequency characteristics of a reproduced output signal even if the reproduced waveform shape varies depending on the pit shape of the disk or the passage of time (the inner and outer circumferences of the disk). An object of the present invention is to provide a data reproducing apparatus configured so that the tail of a solitary wave response of the shortest pulse of a transmission path in a waveform equalized signal does not affect adjacent bits by changing frequency characteristics.

[Embodiment] Next, an embodiment of the data reproducing apparatus of the present invention will be described with reference to FIGS. The same portions as those described above are denoted by the same reference numerals, and description thereof will be omitted.

FIG. 1 is a diagram showing an embodiment of a data reproducing apparatus according to the present invention. The data reproducing apparatus A according to the present invention includes an AGC circuit 1, a waveform equalizing circuit 2A, peak hold circuits 3, 8, low-pass elimination filters (LPF) 4, 6, a system controller 5, a specific frequency detecting circuit 7, and a slicing circuit 9. , PLL
It comprises a circuit 10, a synchronization detection circuit (SYNC detection) 11, a data demodulation circuit 12, and an error correction circuit 13. In the figure, a portion surrounded by a broken line is a main part of the present invention. Although not described in detail here, a pickup system for playing back a disk mounted on a turntable and rotating at a predetermined rotation speed is provided at a stage preceding the AGC circuit 1, while a pickup system is provided at a stage subsequent to the error correction circuit 13. Needless to say, a signal processing circuit for reproducing the demodulated data signal is provided.

Next, the reproducing operation of the data reproducing apparatus A having the above configuration will be described. As shown in FIG. 1, a reproduced output signal obtained by reproducing a data signal which is encoded according to a predetermined rule and stored on a disk is input to an AGC circuit 1 where the amplitude fluctuation is removed and a reproduced output signal having a constant amplitude is obtained. To the waveform equalization circuit 2A. Waveform equalization circuit 2
A represents a waveform equalized signal from which waveform distortion due to intersymbol interference or the like in a reproduced output signal has been removed, and a peak hold circuit 3,
The specific frequency detection circuit 7 and the slice circuit 9 each output three branches.

The slice circuit 9 outputs to the PLL circuit 10 a slice signal obtained by slicing the supplied waveform equalization signal at a predetermined level. The PLL circuit 10 outputs a bit clock synchronized with the slice signal to the synchronization detection circuit 11.
The synchronization detection circuit 11 detects and outputs the supplied bit clock and the synchronization detection timing signal to the data demodulation circuit 12. The data demodulation circuit 12 converts a bit clock encoded and reproduced according to a predetermined rule into a bit clock cycle 3
The bit clock sequence from T to 11T is decoded according to a predetermined rule and complementarily decoded, and the encoded data signal is output to the error correction circuit 13. The error correction circuit 13 outputs a data signal obtained by performing error correction on the supplied reproduced data signal according to a predetermined rule to a signal processing circuit (not shown).

Thus, the slice circuit 9, the PLL circuit 1
0, a data detection system including a synchronization detection circuit 11, a data demodulation circuit 12, and an error correction circuit 13 performs data decoding of the waveform equalized signal described above.

The peak hold circuit 3 detects the peak value of the supplied waveform equalization signal and outputs a peak hold detection signal to the LPF 4. The LPF 4 outputs a signal obtained by removing a fluctuation outside the required band from the peak hold detection signal to the AGC circuit 1 and the system controller 5 as a gain control signal.

Further, the specific frequency detection circuit 7 outputs a specific frequency signal extracted from the supplied waveform equalized signal to the peak hold circuit 8. The peak hold circuit 8 detects the peak value of the supplied specific frequency signal and outputs a peak hold detection signal to the LPF 6. The LPF 6 uses a signal obtained by removing fluctuations outside the required band from the peak hold detection signal as a specific frequency level signal.
Output to

The system controller 5 receives a gain control signal from the LPF 4, a specific frequency signal from the LPF 6,
The phase difference signal from the L circuit 10 and the error correction circuit 13
Supplies the error number signals. On the other hand, the system controller 5 outputs a frequency characteristic control signal obtained by calculating the level of the gain control signal and the level of the specific frequency to the waveform equalization circuit 2A as a frequency characteristic control signal.

The frequency characteristic of the waveform equalizing circuit 2A is controlled in accordance with the peak value of a specific frequency in the supplied frequency characteristic control signal. Here, it is conceivable that this specific frequency is selected to be the highest recording frequency (for example, about 720 kHz) like 3T in the case of a disc modulated and stored from 3T to 11T like CD. This specific frequency detection circuit 7 can be easily constituted by a band-pass filter (BPF or resonance circuit) of a frequency to be emphasized by the waveform equalization circuit 2A.

FIG. 2 is a diagram showing a gain control signal and a frequency characteristic control signal for the output of the waveform equalization circuit 2A. As shown in FIG. 2, in the waveform equalization signal (waveform equalization output) output from the waveform equalization circuit 2A, AGC is performed so that the signal amplitude of the entire waveform equalization output becomes a constant value depending on the voltage level of the gain control signal. The circuit 1 operates. Further, the boost amount at the frequency emphasized by the waveform equalization circuit 2A is controlled by the voltage level of the frequency characteristic control signal. The control direction of the boost amount is a direction in which the boost amount is increased when the frequency characteristic control signal is small, and is a control direction in which the boost amount is reduced when the frequency characteristic control signal is large. For example, when the voltage level of the waveform equalization output is smaller than the voltage level of the frequency characteristic control signal shown in FIG. 2, the boost amount is increased, and the voltage level of the waveform equalization output is higher than the voltage level of the frequency characteristic control signal. If it is larger, the boost amount is controlled to be smaller.

FIGS. 3, 4, and 5 show examples of the configuration of a waveform equalizing circuit that can be used in the present invention. 3 and 4
Are examples using a transversal equalizer,
FIG. 6 shows an example using a reflection type.

The waveform equalizing circuit 2AA shown in FIG. 3 includes a delay element 2AA1, a coefficient unit 2AA2, and an adder 2AA3. The tap coefficient of the symmetric transversal equalizer constituting the waveform equalizer circuit 2AA can be controlled by the frequency characteristic control signal supplied to the coefficient unit 2AA2. As a result,
Controlling the frequency characteristic control signal changes the coefficient of the tap, so that the boost amount can be changed without causing a phase shift. Also, the level fluctuation of the waveform equalization signal caused by changing the coefficient of the coefficient unit 2AA2 constituting the waveform equalization circuit 2AA is corrected by the gain control signal supplied to the AGC circuit 1, and the waveform equalization signal having a constant amplitude is always output. The adder 2AA3 outputs the signals to the peak hold circuit 3, the specific frequency detection circuit 7, and the slice circuit 9, respectively. Further, to increase the boost amount, the coefficient unit 2AA
2 can be increased and the boost amount can be reduced by reducing the coefficient unit 2AA2, and the frequency to be emphasized is the delay element 2AA1 constituting the transversal filter.
Can be determined by the amount of delay.

The waveform equalizing circuit 2AB shown in FIG. 4 comprises delay elements 2AB1 and AB2, coefficient units 2AB3 and 2AB4, and an adder 2AB5. The tap coefficients of the symmetric transversal equalizer constituting the waveform equalizing circuit 2AB can be controlled by the frequency characteristic control signal supplied to the coefficient units 2AB3 and 2AB4. As a result, controlling the frequency characteristic control signal changes the coefficient of the tap, and the boost amount can be changed without causing a phase shift. Further, a coefficient unit 2AB constituting the waveform equalizing circuit 2AB
The level fluctuation of the waveform equalization signal caused by changing the coefficients of 3 and 2AB4 is corrected by the gain control signal supplied to the AGC circuit 1, and the waveform equalization signal having a constant amplitude is always supplied from the adder 2AB5 to the peak hold circuit 3 and specified. The signals are output to the frequency detection circuit 7 and the slice circuit 9, respectively. further,
To increase the boost amount, the coefficient units 2AB3 and 2AB4
In order to increase the coefficient and reduce the boost amount, the coefficient units 2AB3 and 2AB4 may be reduced. The frequency to be emphasized can be determined by the delay amount of the delay elements 2AB1 and AB2 constituting the transversal filter.

The waveform equalizer 2AC shown in FIG. 5 is a waveform equalizer using a Bessel filter. In the figure, when the angular frequency is around 1, the waveform equalization circuit is normalized so as to emphasize the frequency characteristics. “S ″” used in the equation in the figure indicates “s ² ”. The waveform equalizing circuit 2AC shown in FIG. 5 includes arithmetic units 2AC1, 2AC2, 2AC5, 2AC6, and 2AC.
7, a coefficient unit 2AC3 and an adder 2AC4.
The arithmetic units 2AC1 and 2AC2 are supplied with reproduced output signals of a constant amplitude from the AGC circuit 1. By changing the gain with the frequency characteristic control signal supplied to the coefficient unit 2AC3, it is possible to change the boost amount of the waveform equalization. The control of the boost amount of the waveform equalization circuit 2AC also corresponds to the magnitude of the coefficient (frequency characteristic control signal) applied to the coefficient unit 2AC3 with respect to the magnitude of the boost amount.

The output of the waveform equalization circuit 2AC is output to the peak hold circuit 3, the specific frequency detection circuit 7, and the slice circuit 9, respectively. The waveform equalization signal (reproduced signal output) output from the waveform equalization circuit 2AC is converted into a rectangular wave by utilizing the fact that a DC component is not included and the like. After the extraction is performed and a predetermined decoding operation is performed, the data is subjected to error correction processing to be reproduced data.

In addition to the waveform equalizing circuit described above, the output of the phase comparator between the bit clock in the PLL circuit 10 and the rectangular reproduced signal (a phase error signal, which is a phase error signal) While monitoring these values by the microcomputer configuring the system controller 5 so that either one of the magnitude of the output (equivalent to jitter) or the number of errors calculated by the error correction circuit 13 or both are reduced. It is needless to say that the boost amount of the waveform equalizing circuit 2A can be changed and the frequency characteristics of the waveform equalizing circuit 2A can be adaptively adjusted so as to have optimal characteristics.

[0033]

As described above, according to the present invention, the gain control signal is used to control the output signal of the waveform equalizing circuit to maintain a constant amplitude, and the frequency characteristic control signal is used to control the frequency characteristic of the waveform equalizing circuit. By changing the frequency characteristics, the frequency characteristics of the waveform equalization circuit can be always kept in a good state without using a complicated circuit, and even if there is a difference in the frequency characteristics due to the medium or a temporal change in the frequency characteristics, the decoding error is low. Reliable data reproduction can be performed.

[Brief description of the drawings]

FIG. 1 is a diagram showing an embodiment of a data reproducing apparatus according to the present invention.

FIG. 2 is a gain control signal for an output of a waveform equalization circuit,
FIG. 5 is a diagram illustrating a frequency characteristic control signal.

FIG. 3 is a configuration diagram of a waveform equalization circuit.

FIG. 4 is a configuration diagram of a waveform equalization circuit.

FIG. 5 is a configuration diagram of a waveform equalization circuit.

FIG. 6 is a diagram showing a waveform equalizing circuit used in a conventional data reproducing apparatus and peripheral circuits thereof.

FIG. 7 is a diagram showing a time waveform of a solitary wave response of the shortest pulse at the output of the waveform equalization circuit.

FIG. 8 is a diagram illustrating frequency characteristics of a waveform equalization circuit.

[Explanation of symbols]

2, 2A, 2AA, 2AB, 2AC Waveform equalizing circuit (waveform equalizing means) 3, 8 Peak hold circuit 4, 6 Low band elimination filter (LPF) 5 System controller (control means) 6 AGC circuit (AGC means) 9 Slice circuit 10 PLL circuit 11 Synchronization detection circuit 12 Data demodulation circuit 13 Error correction circuit A Data reproduction device

Claims (1)

[Claims] 1. A method for reproducing a coded data signal by decoding a reproduced output signal of a data signal coded according to a predetermined rule and stored in a storage medium according to a predetermined rule. AGC means for outputting a reproduction output signal as a reproduction signal having a constant amplitude, waveform equalization means for outputting a waveform equalization signal obtained by equalizing the waveform of the reproduction signal,
A peak hold means for supplying a first detection signal, which has detected the peak hold of the waveform equalization signal, as a gain control signal to the AGC means, wherein the specific frequency of the waveform equalization signal is A specific frequency signal detection unit that outputs a second detection signal that has detected the peak hold of the signal as a specific frequency level signal; and the data signal encoded by decoding the waveform equalized signal according to a predetermined rule. A control for supplying a phase error signal and an error number signal obtained in the generation process, supplying the gain control signal and the specific frequency level signal, and outputting a frequency characteristic control signal to the waveform equalizing means. The waveform equalizing means may adjust the gain at a specific frequency by the frequency characteristic control signal. Data reproducing apparatus which is characterized in that a strange configurable.