JPH0992710A - Polishing method for thin planar substrate - Google Patents
Polishing method for thin planar substrateInfo
- Publication number
- JPH0992710A JPH0992710A JP25091595A JP25091595A JPH0992710A JP H0992710 A JPH0992710 A JP H0992710A JP 25091595 A JP25091595 A JP 25091595A JP 25091595 A JP25091595 A JP 25091595A JP H0992710 A JPH0992710 A JP H0992710A
- Authority
- JP
- Japan
- Prior art keywords
- polishing
- plate
- semiconductor wafer
- thin plate
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Liquid Crystal (AREA)
- Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は、例えば、半導体ウ
エハ、LCD用ガラス板のような薄板状基板の研磨方法
に関するもので、特に研磨された薄板状基板に研磨むら
が生じないように薄板状基板の保持方法に改良を加えた
点を特徴とするものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for polishing a thin plate-like substrate such as a semiconductor wafer or a glass plate for LCD, and particularly to a thin plate-like substrate polished so as to prevent uneven polishing. It is characterized in that the method of holding the substrate is improved.
【0002】[0002]
【従来の技術】先ず、図3を参照しながら、現用の薄板
状基板の研磨装置(以下、単に「研磨装置」と略記す
る)を説明する。図3は現用の研磨装置の一部を模式図
で示した断面図である。2. Description of the Related Art First, a polishing apparatus for a thin plate substrate in use (hereinafter simply referred to as "polishing apparatus") will be described with reference to FIG. FIG. 3 is a cross-sectional view schematically showing a part of a current polishing apparatus.
【0003】薄板状基板、例えば、半導体ウエハ(以
下、研磨しようとする薄板状基板として「半導体ウエ
ハ」を例示して説明する)を研磨する場合に用いられて
いる現用の研磨装置の一つに、図3に示したような構成
の真空チャック装置を用いた研磨装置1がある。この研
磨装置1は、大別して、研磨定盤2、基板保持盤5、ノ
ズル8とから構成されている。One of the currently used polishing apparatuses used for polishing a thin plate substrate, for example, a semiconductor wafer (hereinafter, "semiconductor wafer" will be described as an example of the thin plate substrate to be polished) is used. There is a polishing apparatus 1 using a vacuum chuck device having a structure as shown in FIG. The polishing apparatus 1 is roughly composed of a polishing surface plate 2, a substrate holding plate 5, and a nozzle 8.
【0004】前記研磨定盤2は、例えば、半導体ウエハ
Sの直径の2倍以上の直径からなる面積の平面を備え、
その平面には、例えば、ポリエステル樹脂製の不織布な
どの研磨パッド3が接着剤などで貼着されていて、回転
軸4を中心に、例えば、30rpmで回転するように構
成されている。The polishing platen 2 has, for example, a flat surface having an area having a diameter twice or more the diameter of the semiconductor wafer S,
A polishing pad 3 made of, for example, a non-woven fabric made of polyester resin is attached to the plane with an adhesive or the like, and is configured to rotate about the rotation shaft 4 at, for example, 30 rpm.
【0005】前記基板保持盤5はこの研磨定盤2の上方
に位置し、そして研磨定盤2の回転軸4から外れた、例
えば、研磨定盤2の半径の中央部に回転中心がある回転
軸6を中心にして前記研磨定盤2の回転数と同数の30
rpmで回転するように構成されている。そしてこの基
板保持盤5は、その半導体ウエハSを保持する基板保持
手段として真空チャック装置が用いられている。この真
空チャック装置は、下面に半導体ウエハSの裏面を吸引
する吸引面(以下、単に「吸引面」と略記する)5Dが
形成されている円板状多孔質板5Aとこの円周面を密閉
し、支持する円筒状のシール枠5Bと回転軸6の中心に
開けられた吸気口5Cとこの吸気口5Cに接続された吸
引ポンプ(不図示)などから構成されている。また、前
記ノズル8は前記研磨定盤2の回転中心部付近で研磨パ
ッド3と半導体ウエハSとの間に研磨液Lを供給する。
なお、図3には、便宜上、研磨定盤2の右半分のみを示
した。The substrate holding plate 5 is located above the polishing platen 2 and is rotated from the rotation axis 4 of the polishing platen 2, for example, the center of rotation is at the center of the radius of the polishing platen 2. The number of revolutions of the polishing platen 2 about the axis 6 is equal to 30.
It is configured to rotate at rpm. The substrate holding board 5 uses a vacuum chuck device as a substrate holding means for holding the semiconductor wafer S. This vacuum chuck device hermetically seals the disk-shaped porous plate 5A having a suction surface (hereinafter, simply referred to as "suction surface") 5D for sucking the back surface of the semiconductor wafer S formed on the lower surface and the circumferential surface. Further, it comprises a cylindrical seal frame 5B for supporting, an intake port 5C opened at the center of the rotary shaft 6, a suction pump (not shown) connected to this intake port 5C, and the like. The nozzle 8 supplies the polishing liquid L between the polishing pad 3 and the semiconductor wafer S near the center of rotation of the polishing platen 2.
In FIG. 3, only the right half of the polishing platen 2 is shown for convenience.
【0006】この研磨装置1を用いて半導体ウエハSを
研磨するに当たっては、不図示の吸引ポンプを作動さ
せ、研磨しようとする半導体ウエハSの被研磨面を研磨
パッド3面に対面させ、その裏面を前記平面状の吸引面
5Dで真空吸引して保持し、この保持状態で基板保持盤
5を回転させながら下降させ、半導体ウエハSを前記回
転数で回転している研磨定盤2の研磨パッド3面に所定
の押圧力で押し付け、そして研磨パッド3の表面にノズ
ル8から研磨液Lを供給しながら、半導体ウエハSの被
研磨面を研磨パッド3と研磨液Lとでケミカルメカニカ
ルポリッシュ(以下、単に「研磨」と略記する)する研
磨方法を採っている。When polishing the semiconductor wafer S using the polishing apparatus 1, a suction pump (not shown) is operated to make the surface to be polished of the semiconductor wafer S to be polished face the polishing pad 3 surface, and the rear surface thereof. Is vacuum-sucked and held by the flat suction surface 5D, and in this holding state, the substrate holding plate 5 is rotated and lowered, and the semiconductor wafer S is rotated at the number of rotations. The surface to be polished of the semiconductor wafer S is chemically mechanically polished by the polishing pad 3 and the polishing liquid L (hereinafter , Abbreviated as “polishing”).
【0007】[0007]
【発明が解決しようとする課題】このような真空チャッ
ク装置で構成された基板保持盤5を用いて半導体ウエハ
Sを吸引、保持すると、その半導体ウエハSの反りは真
空吸着により矯正され、平面状態で保持することができ
る。しかし、前記多孔質板5Aとしては、例えば、多孔
質状セラミック材が用いられており、この多孔質板5A
の吸引面5Dに開口している多数の貫通孔の口径の大き
さは製造上の制約から一般にばらついている。それら貫
通孔の口径は約1〜300μmというような二桁以上の
範囲にわたってばらついている。従って、このような表
面性状の吸引面5Dの多孔質板5Aを備えた基板保持盤
5を用いて半導体ウエハSを吸引、保持して研磨したと
すると、その吸引面5Dに開口している大きな貫通孔付
近では、その保持している半導体ウエハSの表面に局部
的にディンプル(凹部)やヒロック(凸部)が発生し、
このため、半導体ウエハSの被研磨面に研磨むらがで
き、時にはダメージが発生するという問題点があった。When the semiconductor wafer S is sucked and held by using the substrate holding plate 5 constituted by such a vacuum chuck device, the warp of the semiconductor wafer S is corrected by vacuum suction and the flat state is obtained. Can be held at. However, as the porous plate 5A, for example, a porous ceramic material is used.
Generally, the sizes of the diameters of a large number of through-holes that are opened in the suction surface 5D vary depending on manufacturing restrictions. The diameters of the through holes vary over a range of two digits or more, such as about 1 to 300 μm. Therefore, assuming that the semiconductor wafer S is sucked, held and polished by using the substrate holding plate 5 having the porous plate 5A having the suction surface 5D having such a surface texture, a large opening is formed on the suction surface 5D. In the vicinity of the through hole, dimples (recesses) and hillocks (projections) are locally generated on the surface of the held semiconductor wafer S,
For this reason, there is a problem in that the surface to be polished of the semiconductor wafer S is unevenly polished and sometimes damaged.
【0008】本発明は以上記したような問題点を解決し
ようとするものであって、前記多孔質板を用いた真空チ
ャック装置からなる基板保持盤を使用しても、半導体ウ
エハの被研磨面全面が極めて高い精度を以て面内均一
に、そして均一な厚みに研磨できる薄板状基板の研磨方
法を得ることを目的とするものである。The present invention is intended to solve the above-mentioned problems, and even when a substrate holding plate composed of a vacuum chuck device using the porous plate is used, the surface to be polished of a semiconductor wafer is It is an object of the present invention to obtain a method for polishing a thin plate-like substrate capable of polishing the entire surface uniformly and in a uniform thickness with extremely high accuracy.
【0009】[0009]
【課題を解決するための手段】従って、本発明の研磨方
法では、回転研磨定盤と、本体が多孔質板からなり、前
記回転研磨定盤の研磨面に対して研磨しようとする薄板
状基板を平行状態で真空吸引により保持する基板保持盤
とから構成されている薄板状基板の研磨装置を用いて前
記薄板状基板を研磨するに当たり、前記多孔質板の薄板
状基板吸引面に比較的均一な多数の通気孔が形成され
た、そして均一な厚さの弾性パッドを介して前記薄板状
基板を真空吸引しながら、その吸着された薄板状基板を
研磨する方法を採って、前記課題を解決している。Therefore, according to the polishing method of the present invention, a thin plate-shaped substrate, which comprises a rotary polishing platen and a main body made of a porous plate, and is intended to polish the polishing surface of the rotary polishing platen. When polishing the thin plate-shaped substrate using a thin plate-shaped substrate polishing device configured to hold the substrate in parallel by vacuum suction, the thin plate-shaped substrate suction surface of the porous plate is relatively uniform. The above-described problems are solved by adopting a method of polishing the adsorbed thin plate-shaped substrate while vacuum-sucking the thin plate-shaped substrate through an elastic pad having a large number of different ventilation holes and having a uniform thickness. are doing.
【0010】従って、本発明の研磨方法によれば、弾性
パッドを介在させたことにより、多孔質板の吸引面の表
面性状に起因する半導体ウエハに対するディンプルやヒ
ロックなどの悪影響を防止できて、半導体ウエハの被研
磨面を高精度で面内均一に研磨することができ、そして
弾性パッドの弾性機能により、研磨定盤が多少振れて
も、衝撃緩和の役割を果たし、半導体ウエハへのダメー
ジを軽減することができる。Therefore, according to the polishing method of the present invention, by interposing the elastic pad, adverse effects such as dimples and hillocks on the semiconductor wafer due to the surface texture of the suction surface of the porous plate can be prevented, and the semiconductor The surface to be polished of the wafer can be highly accurately and uniformly polished within the surface, and the elastic function of the elastic pad plays the role of cushioning the shock even if the polishing platen slightly shakes, reducing damage to the semiconductor wafer. can do.
【0011】[0011]
【発明の実施の形態】以下、図1及び図2を参照しなが
ら本発明の研磨方法を説明する。図1は現用の研磨装置
を用いて半導体ウエハを研磨する本発明の研磨方法を説
明するための断面図であり、図2は本発明の研磨方法に
用いる弾性パッドの構造を示す平面図である。DESCRIPTION OF THE PREFERRED EMBODIMENTS The polishing method of the present invention will be described below with reference to FIGS. FIG. 1 is a cross-sectional view for explaining a polishing method of the present invention for polishing a semiconductor wafer using an existing polishing apparatus, and FIG. 2 is a plan view showing a structure of an elastic pad used in the polishing method of the present invention. .
【0012】先ず、図2を参照しながら、本発明の研磨
方法において、前記基板保持盤5で半導体ウエハを吸
引、保持する場合に用いる弾性パッド7を説明する。こ
の弾性パッド7は厚さ10〜1000μmのポリエステ
ル樹脂、ポリウレタン樹脂などを用い、口径が0.1〜
100μmの範囲内で、できるだけ同一口径の貫通孔7
Aを多数、一様に開けたシートで出来ている。そして弾
性パッド7の弾性であるが、弾性があまり大きいと研磨
しようとする半導体ウエハSをその面内均一に研磨し難
くなるので、半導体ウエハSにダメージを与えないで保
持できる範囲内で出来るだけ硬い方がよく、しかし、前
記多孔質板5Aの吸引面5Dの凹凸を吸収できる弾性を
備えていることが必要である。First, with reference to FIG. 2, an elastic pad 7 used when the semiconductor wafer is sucked and held by the substrate holding plate 5 in the polishing method of the present invention will be described. The elastic pad 7 is made of polyester resin, polyurethane resin or the like having a thickness of 10 to 1000 μm and has a caliber of 0.1 to 0.1 μm.
Through hole 7 with the same diameter as possible within the range of 100 μm
It is made of a sheet with many A's opened uniformly. Regarding the elasticity of the elastic pad 7, if the elasticity is too large, it becomes difficult to uniformly polish the semiconductor wafer S to be polished within its surface. It is better to be hard, but it is necessary to have elasticity capable of absorbing the unevenness of the suction surface 5D of the porous plate 5A.
【0013】このような構造の弾性パッド7を前記基板
保持盤5の吸引面5Dに装着する。この装着に当たって
は、前記シール枠5Bの吸引面5Dと同一面を形成して
いる端面に接着剤で接着し、そのシール枠5Bの外径に
沿ってその弾性シートを円形状にカットする。このよう
に弾性パッド7が装着された状態の基板保持盤5の基板
吸引面は、図3に示した多孔質板5Aの吸引面5Dか
ら、図1に示した半導体ウエハSが対接する側の弾性パ
ッド7の平面7Bとなる。The elastic pad 7 having such a structure is mounted on the suction surface 5D of the substrate holding plate 5. In this mounting, the end face forming the same surface as the suction face 5D of the seal frame 5B is bonded with an adhesive, and the elastic sheet is cut into a circular shape along the outer diameter of the seal frame 5B. In this way, the substrate suction surface of the substrate holding plate 5 with the elastic pad 7 attached is located on the side where the semiconductor wafer S shown in FIG. 1 is in contact with the suction surface 5D of the porous plate 5A shown in FIG. It becomes the plane 7B of the elastic pad 7.
【0014】本発明の研磨方法は、このように基板保持
盤5を構成する多孔質板5Aの吸引面5Dに弾性パッド
7を装着し、そして不図示の真空ポンプを作動させて、
研磨しようとする半導体ウエハSを真空吸着し、保持す
る。前記のように弾性パッド7には多数の微細な貫通孔
7Aが開けられているから多孔質板5Aの一部になった
状態となり、通気できるので前記のように半導体ウエハ
Sを吸引、保持することができる。According to the polishing method of the present invention, the elastic pad 7 is attached to the suction surface 5D of the porous plate 5A constituting the substrate holding plate 5 in this way, and a vacuum pump (not shown) is operated,
The semiconductor wafer S to be polished is vacuum-sucked and held. As described above, since the elastic pad 7 is provided with a large number of minute through holes 7A, it becomes a part of the porous plate 5A, and ventilation is possible, so that the semiconductor wafer S is sucked and held as described above. be able to.
【0015】吸引、保持された半導体ウエハSは、たと
え反りが存在していても、真空吸引により平面化されて
保持され、そしてその平面状態で保持、回転させられな
がら、前記研磨定盤2上の研磨パッド3の回転面に所定
の押圧力を加えながら、その被研磨面を研磨する。The semiconductor wafer S sucked and held is flattened and held by vacuum suction even if there is a warp, and is held and rotated in the flat state on the polishing platen 2. The surface to be polished is polished while applying a predetermined pressing force to the rotating surface of the polishing pad 3.
【0016】[0016]
【発明の効果】以上、説明したような、本発明の研磨方
法を採ると、前記弾性パッドが真空チャック装置を構成
する前記多孔質板と半導体ウエハとの間に介在している
ため、多孔質板の吸引面の表面性状に起因する半導体ウ
エハに対するディンプルやヒロックなどの悪影響を防止
することができる。また、弾性パッドの弾性機能によ
り、研磨定盤2が多少振れても、衝撃緩和の役割を果た
し、半導体ウエハへのダメージを軽減することができ
る。従って、非常に簡単で安価な手段を用いるだけで半
導体ウエハの被研磨面を高精度で面内均一に研磨するこ
とができる。When the polishing method of the present invention as described above is adopted, since the elastic pad is interposed between the porous plate and the semiconductor wafer constituting the vacuum chuck device, it is porous. It is possible to prevent adverse effects such as dimples and hillocks on the semiconductor wafer due to the surface texture of the suction surface of the plate. Further, due to the elastic function of the elastic pad, even if the polishing platen 2 is shaken to some extent, it can play a role of cushioning the impact and reduce damage to the semiconductor wafer. Therefore, the surface to be polished of the semiconductor wafer can be highly accurately and uniformly polished in the surface only by using a very simple and inexpensive means.
【図1】 本発明の実施例である研磨装置の一部を模式
図で示した断面図である。FIG. 1 is a schematic cross-sectional view of a part of a polishing apparatus according to an embodiment of the present invention.
【図2】 本発明の研磨方法に用いる弾性パッドの構造
を示す平面図である。FIG. 2 is a plan view showing the structure of an elastic pad used in the polishing method of the present invention.
【図3】 現用の研磨装置の一部を模式図で示した断面
図である。FIG. 3 is a schematic cross-sectional view of a part of a current polishing apparatus.
1 現用の薄板状基板の研磨装置 2 研磨定盤 3 研磨パッド 5 基板保持盤 5A 多孔質板 5B シール枠 5C 吸気口 5D 吸引面 7 弾性パッド 7A 貫通孔 7B 吸引面 8 ノズル S 薄板状基板(半導体ウエハ) 1 Current polishing device for thin plate substrate 2 Polishing surface plate 3 Polishing pad 5 Substrate holding plate 5A Porous plate 5B Seal frame 5C Inlet port 5D Suction surface 7 Elastic pad 7A Through hole 7B Suction surface 8 Nozzle S Thin plate substrate (semiconductor substrate Wafer)
Claims (1)
り、前記回転研磨定盤の研磨面に対して研磨しようとす
る薄板状基板を平行状態で真空吸引により保持する基板
保持盤とから構成されている薄板状基板の研磨装置を用
いて前記薄板状基板を研磨するに当たり、前記多孔質板
の薄板状基板吸引面に比較的均一な多数の通気孔が形成
されており、そして均一な厚さの弾性パッドを介して前
記薄板状基板を真空吸引しながら、その吸着された薄板
状基板を研磨することを特徴とする薄板状基板の研磨方
法。1. A rotary polishing platen, and a substrate holding plate which has a main body made of a porous plate and holds a thin plate-like substrate to be polished against a polishing surface of the rotary polishing platen in a parallel state by vacuum suction. When polishing the thin plate-shaped substrate using a thin plate-shaped substrate polishing apparatus composed of, a relatively uniform number of ventilation holes are formed in the thin plate-shaped substrate suction surface of the porous plate, and uniform. A method for polishing a thin plate-shaped substrate, which comprises polishing the adsorbed thin plate-shaped substrate while vacuum-sucking the thin plate-shaped substrate through an elastic pad having a different thickness.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP25091595A JPH0992710A (en) | 1995-09-28 | 1995-09-28 | Polishing method for thin planar substrate |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP25091595A JPH0992710A (en) | 1995-09-28 | 1995-09-28 | Polishing method for thin planar substrate |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0992710A true JPH0992710A (en) | 1997-04-04 |
Family
ID=17214918
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP25091595A Pending JPH0992710A (en) | 1995-09-28 | 1995-09-28 | Polishing method for thin planar substrate |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0992710A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006027795A (en) * | 2004-07-14 | 2006-02-02 | Toshiba Corp | Sucking device, method of carrying plate-like member, and method of manufacturing liquid crystal display |
CN107283295A (en) * | 2016-03-10 | 2017-10-24 | 英飞凌科技股份有限公司 | Method, workpiece planarizer and chuck for providing the workpiece support that can be planarized |
CN117161942A (en) * | 2023-08-21 | 2023-12-05 | 浙江海纳半导体股份有限公司 | Ultrathin silicon wafer thinning and polishing equipment and process |
-
1995
- 1995-09-28 JP JP25091595A patent/JPH0992710A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006027795A (en) * | 2004-07-14 | 2006-02-02 | Toshiba Corp | Sucking device, method of carrying plate-like member, and method of manufacturing liquid crystal display |
CN107283295A (en) * | 2016-03-10 | 2017-10-24 | 英飞凌科技股份有限公司 | Method, workpiece planarizer and chuck for providing the workpiece support that can be planarized |
CN117161942A (en) * | 2023-08-21 | 2023-12-05 | 浙江海纳半导体股份有限公司 | Ultrathin silicon wafer thinning and polishing equipment and process |
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