JP2950457B2 - Semiconductor wafer polishing equipment - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a polishing apparatus for a semiconductor wafer, and more particularly to a polishing apparatus having an improved template for mounting a semiconductor wafer used in the polishing apparatus.

[0002]

2. Description of the Related Art In the manufacture of a semiconductor substrate used in the manufacturing process of a semiconductor integrated circuit device, the main surface is mirror-polished for the purpose of ensuring high flatness of the main surface on which a circuit pattern is transferred and formed. Is performed. An example of the conventional device will be described below with reference to FIGS.

As shown in FIG. 5, a semiconductor wafer polishing apparatus includes a polishing platen 1 having a substantially horizontal posture and a polishing plate 2 arranged in a substantially parallel and opposing posture. The polishing platen 1 is structured to be rotated at a desired speed by a motor (not shown) or the like via a driving shaft 1a provided at the center of the lower surface. A polishing cloth 3 having a desired thickness is attached to an upper surface of the polishing platen 1, that is, a surface facing the polishing plate 2. A driven shaft 4 is connected to the center of the polishing plate 2 facing the polishing platen 1 from the rear side, and the driven shaft 4 has a bearing 5.
In addition, it is supported by a housing (not shown) via a tolker arm 6 that can move up and down. The polishing plate 2 is driven by the platen 1 so that the polishing cloth 3 and the semiconductor wafer to be polished are moved.
The structure is driven by the frictional force with the c 9. A pressurizing cylinder 7 for applying a thrust to the driven shaft 4 in the axial direction is connected to one end of the driven shaft 4 of the polishing plate 2 for controlling the vertical movement of the polishing plate 2 as a whole and for controlling desired movement. An operation of pressing the polishing plate 2 toward the polishing platen 1 with a pressing force is performed. As shown in FIG. 6, a plurality of circular templates 8 are adhered and fixed to the surface of the polishing plate 2 facing the polishing platen 1. Each of the templates 8 has a circular mounting hole 8a, and a blank 8b forming an outer edge of the mounting hole 8a as shown in FIG.
And a backing pad 8c for adsorbing and supporting the semiconductor wafer 9. The depth of the mounting hole 8a is set to be smaller than the thickness of the semiconductor wafer 9 to be mounted, so that the polishing cloth 3 sufficiently contacts the surface of the semiconductor wafer 9.

In this semiconductor wafer polishing apparatus, after mounting the semiconductor wafer 9 on the template 8, the semiconductor wafer 9 is sandwiched between the polishing plate 2 and the polishing platen 1 while, for example, an alkaline desired polishing agent is used. While the two are relatively displaced within the opposing surface, the polishing surface of the semiconductor wafer 9 is slid on the polishing cloth 3 to perform the polishing operation, and the mounting hole 8a of the template 8 is formed. By supporting the individual semiconductor wafers 9 in the circumferential direction by the inner circumference, the semiconductor wafers 9 are prevented from being displaced in the radial direction.

[0005]

However, in the semiconductor wafer polishing apparatus as described above, for example, the processing pressure is 600.
In the case of performing high-pressure polishing of [gf / cm ² ] or more, as shown in FIG. 8, the polishing cloth 3 contacts not only the semiconductor wafer 9 but also the blank material 8 b of the template 8 due to the sinking of the polishing cloth 3. However, there is a technical problem that the processing pressure is dispersed in the blank material 8b, and the polishing rate does not increase even when the processing pressure is increased. This cannot be improved even by using a so-called hard polishing cloth for the polishing cloth.

The present invention has been made in view of the above points, and has as its object to provide a semiconductor wafer polishing apparatus with improved polishing efficiency.

[0007]

In order to achieve the above-mentioned object, the present invention provides a polishing plate, a polishing plate installed opposite to the polishing plate, and a polishing plate facing the polishing plate. A polishing cloth mounted thereon, and a template fixed to a surface of the polishing plate facing the polishing platen and having a mounting hole for mounting a semiconductor wafer thereon, wherein the polishing platen and the polishing plate are relatively By sliding on
In a semiconductor polishing apparatus for polishing a surface of a semiconductor wafer mounted in a mounting hole, a width of a blank material forming an outer edge of the mounting hole of the template is L, a depth of the mounting hole is b ₀ , and mounting is performed. Assuming that the thickness of the semiconductor wafer to be formed is wt, the template is 0.6 wt <b ₀ <0.8
and a template for a semiconductor wafer having a diameter of 3 inches to 8 inches that satisfies wt and 0.02 ≦ b ₀ /L≦0.04.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIGS. Since the feature of the present invention lies in the structure of the template, the following description will be limited to this point, and the other parts of the entire structure of the semiconductor wafer polishing apparatus will be described in detail by assigning the same reference numerals to the same parts as in the conventional apparatus. Is omitted.

FIGS. 1 and 2 show cross-sectional shapes of two types of templates 8. FIG. 1 shows a so-called single type in which a mounting hole 8a for accommodating a semiconductor wafer 9 includes a flat packing pad 8c and a blank material 8b fixed on the surface of the packing pad 8c near the outer peripheral edge thereof. Be composed. On the other hand, FIG. 2 shows a so-called insert type template 8, in which a blank material 8b is fixed to an outer peripheral end surface of a packing pad 8c. Incidentally, both types of templates 8 are generally made of glass epoxy resin or polycarbonate resin.

In any of the above types of templates 8, when the width of the blank material 8b is L, the depth of the mounting hole 8a is b ₀ , and the thickness of the semiconductor wafer 9 is wt, it is 0.
6 wt <b ₀ <0.8 wt, 0.02 ≦ b ₀ / L ≦ 0.
04 is satisfied.

The reasons for setting the dimensions of the template are as follows. Conventionally, the width L of the blank material of the template used for a semiconductor wafer having an outer diameter of 3 to 8 inches L = 11.2 [mm], the mounting hole 8a
Depth b ₀ = 0.2 [mm], that is, b ₀ /L=0.01
Assuming that the thickness of the semiconductor wafer used at this time is 0.36 [mm], the outer corner of the blank material 8b has a processing pressure of 6 as shown in FIG.
When the polishing cloth 3 comes into contact with the polishing cloth 3 at 00 [gf / cm ² ], the processing pressure is dispersed in the blank 8b, and the polishing rate does not increase even if the processing pressure is increased.

Therefore, the inventors made various experiments by reducing the size of the blank material 8b as shown in FIG. 3 so that the polishing cloth did not come into contact with the blank material even when the processing pressure was increased. . As a result, in order to secure the adhesive strength between the blank 8b and the packing pad 8c, the width L of the blank 8b needs to be 5.0 [mm] or more, and the polishing cloth 3 and the blank 8b come into contact with each other. In order to prevent the processing pressure from being unnecessarily dispersed in the blank material,
It turned out that the width L of the blank 8b needs to be 10.0 [mm] or less.

Further, the thickness of the semiconductor wafer wt = 0.3
The 6 mm semiconductor wafer 9 is securely inserted into the template 3.
In order to keep in the mounting hole 8a is required depth b ₀ of the mounting hole 8a is 0.22 [mm] or more, the semiconductor web -
In order to reliably polish the polished surface of C, the depth b ₀ must be 0.
It was found that it was necessary to be 29 mm or less. From this, the depth b ₀ of the mounting hole and the blank 8
The relationship of b with the width L is 0.02 ≦ b ₀ /L≦0.04, and the depth b ₀ of the mounting hole is 0.6 wt <b _{0 with} respect to the thickness wt of the semiconductor wafer. It can be seen that if the relationship of <0.8 wt is satisfied, the intended object of the present invention is achieved.

FIG. 4 is experimental data showing the improvement of the polishing rate when the present invention is used. The template of the comparative example used in the experiment has a width L of the blank 8b of 16 mm and the depth b ₀ of the mounting hole 8a of 0.2 mm, and the template of the embodiment of the present invention has the blank 8b. Width L = 5 [m
m], the depth b ₀ of the mounting hole 8a = 0.2 [mm],
Processing pressure (surface pressure) of 1000 to 1500 [gf / cm
² ], the polishing rate [μm / min] of the Si single crystal substrate was measured. As can be seen from the experimental data, in the template of the comparative example, the surface pressure was 600 [gf /
cm ² ], the polishing rate increases as the surface pressure increases, but the polishing rate does not increase at a surface pressure higher than that. However, in the template of the present invention, the surface pressure is 600 [gf / cm ² ].
Even in a high pressure region exceeding, the polishing rate is increased.

Although the above embodiment does not show a specific structure of the semiconductor wafer, the present invention can be applied not only to a Si single crystal substrate but also to a multi-layer substrate such as an adhesive wafer, and the mirror polishing is performed. In addition, it is apparent that the present invention can be applied to polishing and removal of an oxide film (such as SiO ₂ ) layer.

[0016]

As described above, according to the present invention, the depth b ₀ of the mounting hole of the template and the width L of the outer edge of the mounting hole are provided.
Is set to a predetermined relationship, even if the processing pressure is increased, the degree of dispersion of the pressure of the polishing cloth on the blank material is small, the polishing rate increases, and the polishing ability can be improved.

[Brief description of the drawings]

FIG. 1 is a sectional view of a template according to an embodiment of the present invention.

FIG. 2 is a sectional view of a template according to another embodiment of the present invention.

FIG. 3 is an operation explanatory view of the embodiment of the present invention.

FIG. 4 is experimental data showing the effect of the present invention.

FIG. 5 is an overall structural view of a semiconductor wafer polishing apparatus to which the present invention is applied.

FIG. 6 is a plan view showing a template mounting portion in the polishing apparatus of FIG. 5;

FIG. 7 is an enlarged sectional view of a main part of the polishing apparatus of FIG. 5;

FIG. 8 is an operation explanatory view of a conventional semiconductor wafer polishing apparatus.

[Explanation of symbols]

1 polishing platen 2 polishing plate 3 polishing cloth 8 template 8a mounting hole 8b blank (outer edge) 9 semiconductor web - Ha L blank width b ₀ mounting hole of (template edge) depth wt semiconductor web - thickness Ha

────────────────────────────────────────────────── ─── Continuing from the front page (72) Inventor Shinji Ueno 30 Soya, Hadano-shi, Kanagawa Prefecture Toshiba Ceramics Co., Ltd. Development Laboratory (56) References JP-A-5-177539 (JP, A) (JP, A) (58) Field surveyed (Int. Cl. ⁶ , DB name) H01L 21/304 622 B24B 37/04

Claims (1)

(57) [Claims] 1. A polishing platen, a polishing plate provided opposite to the polishing platen, a polishing cloth mounted on a surface of the polishing platen facing the polishing plate, and a polishing plate opposed to the polishing platen. And a template having a mounting hole in which a semiconductor wafer is mounted. The polishing platen and the polishing plate slide relative to each other,
In a semiconductor polishing apparatus for polishing a surface of a semiconductor wafer mounted in a mounting hole, a width of a blank material forming an outer edge of the mounting hole of the template is L, a depth of the mounting hole is b ₀ , and mounting is performed. Assuming that the thickness of the semiconductor wafer to be formed is wt, the template is 0.6 wt <b ₀ <0.8
A semiconductor wafer polishing apparatus, comprising: a template for a semiconductor wafer having a diameter of 3 to 8 inches which satisfies wt and 0.02 ≦ b ₀ /L≦0.04.