JPH0983140A - Method of manufacturing multi-layered wiring board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To realize a manufacturing method capable of manufacturing a multi- layered wiring board having satisfactory high frequency characteristics and breakdown voltage by improving an interlayer connection structure, the multi- layered wiring board including an internal circuit formed into high density by a build-up method. SOLUTION: A through-hole 10a is formed in a base member 10, and copper is plated on the surface of the base member 10 to form plated layers 11, 12, and 13. Then, an insulation material 14 is pushed into the through-hole 10 via a metal mask having an opening formed correspondingly to the through-hole 10a. After the insulating material 14 is hardened, the surface of the base member 10 is flattened by polishing. Since the insulating material is filled in an inner via hole, interference between internal wirings in the multi-layered wiring board is reduced to improve high frequency characteristics and withstand voltage.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a multilayer wiring board, and more particularly, to a multilayer wiring formed by a build-up method in which a plurality of wiring layers are sequentially laminated on a base material with an insulating layer interposed therebetween. It relates to a manufacturing process of a substrate.

[0002]

2. Description of the Related Art Conventionally, a method of manufacturing a multilayer wiring board includes a bonding method in which a wiring layer is formed on each of a plurality of base materials, and an insulating sheet is interposed between the base materials. The insulating layer is formed on the base material on which the wiring pattern is formed, the wiring pattern is formed on the insulating layer, and the like, and the insulating layer and the wiring pattern are sequentially repeated to form a laminated structure. There is a build-up method.

According to the latter build-up method, unlike a joining method that requires a joining step, it is not necessary to stack a plurality of base materials and insulating sheets, so that a thin multilayer wiring board can be densely and relatively easily formed. Can be formed. A method of manufacturing a multi-layer substrate of this type is disclosed in Japanese Patent Laid-Open No. 61-216.
No. 392, Japanese Patent Application Laid-Open No. 61-224397, Japanese Patent Publication No. 1-39236, Japanese Patent Application Laid-Open No. 3-3298. In the method for manufacturing a multilayer wiring board by such a build-up method, since each insulating layer and the wiring layer are sequentially formed by the thin film forming method, it is possible to form a large number of wiring layers in a thin substrate, and to form a circuit and an electronic circuit. It becomes possible to mount components at high density.

[0004]

However, when a circuit is formed with a high density on the multilayer wiring board formed by the above-mentioned build-up method, electromagnetic interference occurs between the layers, and the capacitance between the wirings is reduced. This cannot be ignored, and the insulation resistance is reduced, which causes problems in the high frequency characteristics and breakdown voltage of the circuit.

In particular, in the method of manufacturing a build-up type multilayer wiring board, as a structure for conducting conductive connection between different wiring layers, a plating layer serving as an upper wiring layer is formed on a lower wiring layer exposed without forming an insulating layer in advance. However, since these conductive connection portions have a structure in which a considerably large conductor is filled inside the surrounding insulating layer, it is considered that this portion has a large electromagnetic effect.

Therefore, the present invention solves the above-mentioned problems, and an object of the present invention is to provide a multilayer wiring board having a high frequency characteristic and a high breakdown voltage even if the wiring board has a high density of internal circuits formed by buildup. It is to realize a manufacturing method capable of manufacturing.

[0007]

In order to solve the above-mentioned problems, the present invention provides a method for manufacturing a multi-layer wiring board, which is formed by sequentially laminating a plurality of wiring layers on a base material with an insulating layer interposed therebetween. Forming a different-layer conductive connection structure in which different wiring layers are conductively connected through an opening formed in the base material or the insulating layer, that is, a through hole formed in the base material or an opening formed in the insulating layer After that, a step of filling the inside of the opening with an insulating material so that the surface of the base material becomes substantially flat is provided.

In this case, the step of filling the insulating material is a step of selectively applying the insulating material into the opening and then mechanically flattening the surface on which the insulating material is applied. It is preferable.

According to the first aspect of the present invention, after the conductive connection structure is formed in the opening of the base material or the insulating layer, the inside of the opening is filled with the insulating material, so that the conductive amount is surely increased without increasing the conductor amount. Since the connection can be made, the capacitance between the wiring layers can be reduced, and the insulation resistance can be increased, the high frequency characteristics and the withstand voltage of the substrate can be improved, and the noise resistance can be improved. Further, by filling the insulating material so as to be substantially flat, the upper insulating layer and the wiring layer can be formed on the flat surface, so that the cross-sectional structure of the substrate can be matched and wiring defects and the like can be prevented.

According to the second aspect of the present invention, after the insulating material is selectively applied, the surface is mechanically flattened, so that the step of filling the insulating material can be easily formed with simple equipment. You can Here, as a coating method, screen printing can be used, and as a mechanical flattening method, polishing with a belt sander, a buff or the like can be used.

[0011]

BEST MODE FOR CARRYING OUT THE INVENTION Next, an embodiment of a method for manufacturing a multilayer wiring board according to the present invention will be described with reference to the drawings. In this embodiment, first, as shown in FIG. 1A, a through hole 10a is formed in the base material 10. Next, as shown in FIG. 1B, the front and back of the base material 10 are plated with copper. At this time, the base material 10
Plating layers 11 and 12 are formed on the front and back sides of the through hole 10a, respectively.
The plated layer 13 formed on the inner surface of the is electrically connected.

Next, as shown in FIG. 1C, the through hole 1
The insulating material 14 is filled by being pushed into the through hole 10a with a metal mask such as a stainless thin plate having an opening corresponding to 0a interposed. Screen printing may be used for this filling step. As the material of the insulating material 14, various materials such as various resins dissolved in a solvent or the like, a photocurable resin, or a material mainly containing a thermosetting resin can be used. . In particular, it is preferable to use a thermosetting resin containing an epoxy resin as a main component from the viewpoint of filling property because the heat shrinkability is small.

After the insulating material 14 is hardened by usual dry hardening, light hardening, heat hardening, etc., the surface of the base material 10 is lightly polished by belt sander, buffing or the like. By this polishing step, as shown in FIG. 1D, the surface of the insulating material 14 in the opening of the through hole 10a is formed substantially flush with the plating layers 11 and 12. Furthermore, the plated layers 11 and 12
A predetermined mask is formed on the above using a photolithography technique, and an etching process is performed to form wiring layers 15 and 16 having a predetermined pattern.

Next, as shown in FIG. 1E, after an insulating resist 17 is applied on the surface, only the region connected to the upper layer is opened by using the photolithography technique. An insulating resist 18 is further applied on the insulating resist in the same manner, and the photolithography technique is similarly used to open only the above region. This opening region is the insulating material 14 and the wiring portion around it in the figure.

Further, as shown in FIG. 2 (f), a coating material 19 containing a large number of fillers in a predetermined reactive resin is insulated on the second layer of insulating resist 18 by screen printing or the like. The material 14 is applied while avoiding the wiring portion around the material 14. As the reactive resin of the coating material 19, various thermosetting resins or photocurable resins can be used. As the filler contained therein, fine particles such as calcium carbonate which can be eluted, for example, particles having a particle size of about several μm are used.

After the coating material 19 is applied and cured by heating or light irradiation, as shown in FIG. 2 (g), the surface thereof is lightly polished by a buff (broken line arrow A in the figure) to obtain the vicinity of the surface. Remove the cured layer of
By sandblasting using abrasive grains having a particle size of several tens of μm, polishing marks on the surface are removed to form a uniform rough surface and the filler embedded near the surface is exposed. In this state, soft etching is performed using an acid solution for cleaning to elute the filler,
Fine irregularities are formed on the surface.

After this, if necessary, a step of forming a through hole 10b in the substrate is provided. This through hole 10b is
Like the through hole 10a shown in FIG. 1A, it is formed by drilling or the like. The through hole 10b is formed in the wiring layer 16
Is provided in a portion where conductive connection between the wiring layer and the upper wiring layer is required.

On the surface of the coating material 19 thus roughened, as shown in FIG. 2 (h), electroless plating is applied to form the entire surface of the first plating layer 20.
Electrolytic plating is performed to form the second plating layer 21. The reason why the two plating layers are formed is to maintain the smoothness of the surface of the plating layer while increasing the adhesion strength of the plating layer. The conductive connection portion C is formed by these plated layers. The conductive connection portion C is formed on the wiring layer 15 formed in a ring shape, as shown in FIG. In this plating step, the inner surface of the through hole 10b is also covered with the plating layer, and the front and back of the substrate are electrically connected.

Next, as shown in FIG. 2I, the plating layers 20 and 21 are formed by the same photolithography technique as described above.
Are etched to form the wiring layer 22 in a predetermined pattern. Then, when a wiring layer is further formed on the wiring layer, the insulating material 23 similar to the insulating material 14 is filled in the concave portion formed above the conductive connection portion C. At this time, the insulating material 23 is similarly filled in the through holes 10b.

In this embodiment, a structure equivalent to a blind via hole is formed in the through hole 10a, and the inside is filled with the insulating material 14, so that the amount of conductor can be reduced. Therefore, it is possible to reduce the electromagnetic influence on the upper wiring layer (the influence on the high-frequency characteristics, the breakdown voltage, etc. due to the capacitance and insulation resistance between the conductors). In this embodiment, since the opening surface of the insulating material 14 is mechanically polished to be flattened, the upper surface of the wiring layer can be flattened and then the upper layer structure can be formed. It is also possible to simultaneously prevent the influence of shape on the structure (the unevenness of the lower layer affects the formation of the upper layer and causes the loss or disconnection of the wiring).

FIG. 3 shows a cross section of a different region of the above embodiment. Here, as shown in FIG. 3A, the conductive connecting portion D is formed at a position different from the structure equivalent to the blind via hole formed in the through hole 10a formed in the base material 10. . This conductive connection D
Connects the wiring layer 15 and the wiring layer 22, and the forming method thereof is the same as that of the conductive connection portion C.

Insulating material 23 is formed on the conductive connecting portion D in the same manner as above.
3B, and the surface of the substrate is further planarized by mechanically polishing it. Then, as shown in FIG. 3B, a step of forming insulating resists 24 and 25, a coating material 26
The coating / forming step of is performed in the same manner as above. Then, a plating layer forming step and a wiring pattern forming step are performed to form a new wiring layer 27. Here, the conductive connection portion E connects the wiring layer 22 and the wiring layer 27.

In this region, the conductive connection portion D between the planar wiring layer 15 and the wiring layer 22 shown in FIG.
As shown in (c), it has the same structure as the inner via hole formed in the substrate. In this case, the inside of the hole is filled with the insulating material 23. Therefore, similarly to the above, the amount of the conductor is reduced, the electrical insulation between the wiring portion around the conductor is improved, and high frequency characteristics, withstand voltage, and noise resistance can be expected to be improved. That is, the insulating material 14,
Due to the presence of 23, the wiring part 22a formed in the peripheral portion of the insulating material 14 having the blind via hole structure and the upper layer thereof, or the peripheral portion of the insulating material 23 having the inner via hole structure and the upper layer thereof. Wiring part 27a
Electromagnetic interference between and is reduced, and electrical characteristics are improved.

FIG. 5 shows a partial cross section of a multilayer wiring board 30 which can be formed by the method of the above embodiment. The multilayer wiring board 30 includes a wiring layer 31,
It is a 6-layer substrate having a circuit configuration of 6 layers 32, 33, 34, 35, 36. A large number of blind via hole structures 37 and inner via hole structures 38 are formed inside this. Here, FIG. 5 shows only the via-hole structure connecting the adjacent layers, but a blind via-hole structure and an inner via-hole structure connecting the wiring layers separated by two or more layers can also be formed.

The multilayer board shown in FIG. 5 has no through holes for inserting electronic components mounted on the board surface,
Instead, conductive pads (chip lands) 39 for directly connecting electronic components are formed on the substrate surface. What is formed on the substrate itself is only the through hole 40 for wiring connection which is formed for wiring reasons.

As can be seen from this structure, according to the present invention, the capacitance between the conductors can be reduced and the insulation resistance can be increased even in a high-density multilayer substrate formed by the build-up method. It is possible to manufacture an epoch-making multilayer wiring board having good high-frequency characteristics, high withstand voltage, and strong against noise (hard to pick up noise).

[0027]

As described above, according to the present invention, after forming the conductive connection structure in the opening of the base material or the insulating layer, the amount of the conductor is increased by filling the inside of the opening with the insulating material. It is possible to make a reliable conductive connection without doing so, reduce the capacitance between the wiring layers, and increase the insulation resistance, so that it is possible to improve the high-frequency characteristics and withstand voltage of the board, and to improve noise resistance. The property can also be improved. Further, by filling the insulating material so as to be substantially flat, the upper insulating layer and the wiring layer can be formed on the flat surface, so that the cross-sectional structure of the substrate can be matched and wiring defects and the like can be prevented.

[Brief description of drawings]

FIG. 1 is a process drawing (a) to (e) showing an embodiment of a method for manufacturing a multilayer wiring board according to the present invention.

2A to 2D are process diagrams (f) to (i) showing an embodiment of a method for manufacturing a multilayer wiring board according to the present invention.

FIG. 3 is a process diagram (a) to (c) showing a cross-sectional portion of another region of the above embodiment.

4 is a plan view (a) showing a part of the region shown in FIG. 2 and a plan view (b) showing a part of the region shown in FIG.

FIG. 5 is a partial cross-sectional view showing an example of a multilayer wiring board that can be formed according to the present invention.

[Explanation of symbols]

 10 Base Material 10a, 10b Through Hole 14,23 Insulating Material 15, 16, 22, 27 Wiring Layers C, D, E Conductive Connection Section

 ─────────────────────────────────────────────────── ─── Continuation of front page (72) Yoshiko Nakajima 4-125, Shinmeicho, Okaya City, Nagano Prefecture Daiwa Kogyo Co., Ltd. (72) Inventor Mitsuhiko Kitamura 4-125, Shinmeicho, Okaya-shi, Nagano Prefecture Daiwa Industry Co., Ltd.

Claims (2)

[Claims] 1. A method for manufacturing a multi-layer wiring substrate, which is formed by sequentially laminating a plurality of wiring layers on a base material with an insulating layer interposed between the base material and the insulating layer. After forming a different-layer conductive connection structure in which different wiring layers are conductively connected to each other, a step of filling the inside of the opening with an insulating material so that the surface of the base material becomes substantially flat is provided. Substrate manufacturing method. 2. The step of filling the insulating material according to claim 1, wherein the insulating material is selectively applied to the inside of the opening, and then the surface on which the insulating material is applied is mechanically flattened. A method of manufacturing a multilayer wiring board, which is characterized by being a step.