JPH0982985A - Manufacture of semiconductor sensor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce the dispersion of output characteristics by heating a wafer and a pedestal at a fixed temperature before a trimming process after a pedestal joining process and conducting the annealing process of slow cooling. SOLUTION: A metallized film is formed beforehand onto one surface of a pedestal plate 110 consisting of a plate with a large number of through-holes, and these pedetal plate 110, metallized film and wafer 101 are held by pressure by a pair of electrodes under the state, in which the wafer 101 is placed on the pedestal plate 110. The wafer 101 is held for 192min at 450 deg.C, and heated slowly and second annealing is conducted. A trim resistor formed to the wafer 101 is trimmed by a laser and output characteristics are conformed to reference characteristics, and the wafer 101 is diced completely along half-cut grooves, and separated into each chip. Accordingly, since annealing is performed immediately before a trimming process, the dispersion of the output characteristics of a strain sensor can be reduced.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor sensor such as a semiconductor strain sensor, and more particularly to reducing variations in its output characteristics.

[0002]

2. Description of the Related Art The conventional semiconductor pressure sensor manufacturing process is as follows.
An element formation process for forming a semiconductor sensor including a strain gauge and a resistance element for adjustment on a wafer by a normal semiconductor process, a wafer etching process for forming a diaphragm in the central portion of the wafer by a process process such as a plasma process, A pedestal bonding process for anodic bonding to the pedestal, a metallizing process for depositing a metal film on the stem bonding surface of this pedestal by vacuum deposition or sputtering, a trimming process for trimming the adjustment resistance element to reduce variations in output characteristics, and dicing It is usual to carry out the assembling steps of joining the wafer and the pedestal to the stem while heating the wafer and the pedestal in the above order.

[0003]

However, by adjusting the trim resistance on the wafer as described above, DC on the wafer is adjusted.
Even if variations in offset and detection sensitivity are reduced, the DC offset and detection sensitivity (hereinafter referred to as output characteristics) fluctuate by fixing the diced chip and the pedestal joined to it afterwards in the package. There was a problem.

As a result of various experiments, the inventors of the present invention have found that the main cause of the variation in the output characteristics after the dicing process is that after the strain gauge is formed on the semiconductor wafer and before the trimming. Damage in the process such as forming a diaphragm or bending beam by etching from the backside of the wafer, thermal effects in the process of anodic bonding the wafer to a pedestal having a different coefficient of thermal expansion, vacuum deposition of a metallization layer on the soldering surface of the pedestal We found that the cause was damage in the process of depositing by sputtering or sputtering.

The thermal effect will be described more specifically. Since the wafer and the pedestal bonded at a high temperature in the anodic bonding have different coefficients of thermal expansion, residual stress is generated between them in the subsequent normal temperature operating condition. In addition, since a plurality of insulating films and metal wirings having different thermal expansion coefficients are arranged in the integrated circuit region that constitutes the signal amplification section on the chip, the signal amplification section is formed after the anodic bonding is completed. Residual stress is generated in the integrated circuit region that constitutes it. These residual stresses affect the characteristics of the signal amplification unit through the wafer. These residual stresses are released and relaxed by the heat in the chip fixing step, but the degree of this relaxation varies from chip to chip, which causes the output characteristics to vary.

[0006] Next, description will be given of damage to the wafer by plasma particles in the step of forming a diaphragm and a bending beam by etching from the back surface of the wafer. When such deep etching is performed, the non-etched area in the back surface of the wafer is described. Is usually masked with a nitride film, and plasma etching is performed to plasma-clean the back surface of the wafer before depositing this nitride film, and to open or remove this nitride film. At this time, when the plasma particles act on the transistor and the gauge resistance on the surface of the wafer, their characteristics change, which causes the characteristics of the strain sensor to change.

Next, the damage in the process of depositing the metallization layer on the soldering surface of the pedestal by vacuum deposition or sputtering will be explained. When such a metallization layer is formed by vacuum deposition, an electron beam is applied to the evaporation source. The soft X-rays generated at the time of damage damage the semiconductor crystal on the back surface of the thin diaphragm or the like. Such a problem also applies to sputtering, and crystals such as diaphragms are damaged and the characteristics of the strain gauge change.

The present invention has been made in view of the above problems, and an object of the present invention is to provide a method of manufacturing a semiconductor sensor in which variations in output characteristics are small.

[0009]

According to a first aspect of the present invention, there is provided:
An element forming step of forming a signal conversion element and an adjustment resistance element on a wafer, a pedestal joining step of joining the wafer to a pedestal in a predetermined high temperature atmosphere, and an output characteristic of the signal conversion element by trimming the adjustment resistance element. In the manufacturing method of the semiconductor sensor, the trimming step for reducing the variation of the above and the assembly step for joining the wafer and the pedestal with the chip and the pedestal with a chip to the stem while heating are performed in the above order. In the method of manufacturing a semiconductor sensor, the wafer and the pedestal are heated to a predetermined temperature before the trimming step, and then an annealing step of gradually cooling is performed.

According to this structure, the output stress of the sensor adjusted by trimming is mitigated by the heat of the assembly process after the trimming process to alleviate the residual stress caused by the above-mentioned joining of the wafer and the pedestal under a predetermined high temperature condition. It is possible to achieve the effect of reducing the problem that the above-mentioned error occurs again by performing the annealing after the pedestal joining process to eliminate the residual stress.

Further, in the semiconductor strain sensor, since the step of forming the diaphragm and the bending beam by etching from the back surface of the wafer is performed before the pedestal joining step, the above-mentioned damage caused by the plasma treatment used at this time is caused. It can be recovered in the annealing process. Therefore, it is possible to reduce the fluctuation of the output characteristics due to the recovery of the damage due to the temperature of the assembly process after trimming.

A second structure of the present invention further comprises a metallizing step of depositing a metal film on the stem joining surface of the pedestal by vacuum vapor deposition or sputtering in the first structure, wherein the annealing step comprises It is characterized in that it is carried out after the metallizing step. According to this structure, the metallization layer is attached to the mounting surface of the pedestal by vacuum deposition or sputtering for metal bonding (soldering) to the back surface of the pedestal bonded to the wafer, that is, to the supporting member such as the stem. Damage can be recovered by this annealing process. Therefore, it is possible to reduce the fluctuation of the output characteristics due to the recovery of the damage due to the temperature of the assembly process after trimming.

A third structure of the present invention is the same as the first structure, further comprising a half-cutting step in which after the base joining step, a part of the base is left and the wafer is partially cut along a dicing line. And the annealing step is performed after the half-cutting step. According to this configuration, since the wafer and the pedestal are almost cut by the half cut, the residual stress can be eased easily, and the annealing effect can be further improved.

A fourth structure of the present invention is an element forming step of forming a signal conversion element and an adjusting resistance element on a wafer, a wafer etching step of including at least a plasma processing step and thinning a predetermined region of the wafer, The trimming step of trimming the adjustment resistance element to reduce variations in the output characteristics of the signal conversion element, and the assembling step of joining the chip-equipped pedestal obtained by dicing the wafer and the pedestal to the stem while heating are performed. In the method for manufacturing a semiconductor sensor, which is performed in order, an annealing process is performed in which the wafer and the pedestal are heated to a predetermined temperature after the wafer etching process and before the trimming process, and then gradually cooled. It is a manufacturing method of a sensor.

For example, since the above-mentioned plasma damage caused by the plasma processing process in the wafer etching process for forming a diaphragm for pressure detection and a bending beam for acceleration force detection is recovered by annealing, it is possible to remove the plasma damage during the assembly process after trimming. It is possible to reduce variation in output characteristics due to recovery of the damage due to temperature. A fifth structure of the present invention is the structure of any one of the first to fourth structures, wherein the annealing step is further performed at 450 ° C. for 72 minutes to 45 minutes.
It is characterized in that it is carried out at 0 ° C. for 192 minutes.

A sixth structure of the present invention is an element forming step of forming a signal conversion element and an adjusting resistance element on a wafer, a pedestal joining step of joining the wafer to a pedestal in a predetermined high temperature atmosphere, and the adjusting resistor. The trimming step for trimming the element to reduce the variation in the output characteristics of the signal conversion element, and the assembling step for joining the chip and the pedestal formed by dicing the wafer and the pedestal to the stem while heating are performed in the above order. In the method of manufacturing a semiconductor sensor, the pedestal bonding step is performed using the pedestal having a metal film deposited on the stem bonding surface in advance.

According to this structure, since the metallization layer is not deposited on the pedestal after the pedestal is bonded to the wafer, no damage occurs at that time. The fluctuation of the output characteristics due to the damage recovery can be made zero.

[0018]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described with reference to the following examples.

[0019]

【Example】

(Embodiment 1) An embodiment of a semiconductor acceleration sensor to which the present invention is applied will be described below with reference to the drawings. In FIG. 1, a silicon chip 10 is joined to a perforated pedestal 11, and the pedestal 11 is joined to a stem 12. A metal can 13 is welded to the peripheral portion of the stem 12 to form an airtight reference pressure chamber S. The inner ends of the terminal pins 14 fixed to the holes of the stem 12 with seal glass are individually connected to the respective bonding pads (not shown) on the silicon chip 10 by the wires 15. A concave groove 1a is formed on the back surface of the silicon chip 10.
The pressure to be measured is introduced into the base 11 and the stem 12 through the pressure introducing holes 11a and 12a to be measured.

The concave groove 1a is formed by anisotropic etching which will be described later, and the thin portion of the silicon chip 10 which is in contact with the concave groove 1a is hereinafter referred to as a thin strain generating portion (diaphragm portion) A. A bridge circuit composed of two pairs of strain gauges is formed in the thin-walled strain generating portion (diaphragm portion) A.
In this sensor, the thin strain element S is distorted by the differential pressure applied to the thin element strain portion A, the resistance value of the strain gauge changes, and this is detected by the bridge circuit as in the prior art.

An example of the manufacturing process of this sensor will be described below with reference to FIG.
~ It demonstrates with reference to FIG. (Device forming step) A silicon wafer 100 having a plane orientation (110) or (100) in which an N-type layer is epitaxially grown on a P-type semiconductor substrate is prepared and heat-treated (800 to 800).
1100 ° C, O ₂ or wet O ₂ oxidation), and 5000
A SiO ₂ film 1000 having a thickness of about 10000 Å is formed (see FIG. 2).
(A)).

Next, a resist pattern 1100 having an opening for a drawing resistance portion is formed, and the oxide film 1000 is selectively removed by wet etching using an HF solution or dry etching using CF ₄ gas. Two
A P-type region of 00 is formed (FIG. 2B). next,
A resist pattern 1200 having openings on and around the diaphragm is formed, and the oxide film 1000 is selectively removed by wet etching or dry etching as shown in the figure (2 (c)).

Next, after removing the resist pattern 1200, wet oxidation or dry oxidation (800 to 1100) is performed.
℃, O ₂ or wet O ₂ oxidation) 500-200
A 0Å SiO ₂ film 400a is formed. After that, a resist pattern 130 opened on the gate resistance planned region.
0 is formed, boron is ion-implanted, and the strain gauge 3 is formed (FIG. 2D).

[0024] Thereafter, a resist pattern 1300 is removed, heat treatment at in POCl ₃ (900~1000 ℃, ₃
0-60 minutes) to diffuse phosphorus into the SiO ₂ film 400a to form a PSG film 400b. Through the above steps, the first protective film 400 made of an oxide film having a two-layer structure and excellent in environmental resistance is formed on the diaphragm (FIG. 2E). Next, a resist pattern having an open contact portion is formed, and the first protective film 40 is formed by wet or dry etching.
0 is selectively removed to form a contact hole. Then, the resist is removed and an aluminum film 500 is deposited on the entire surface to obtain the structure shown in FIG.

Next, a resist pattern 1400 covering the wiring part and the diaphragm region is formed, wet etching (mixed solution of nitric acid and phosphoric acid) is performed to pattern the aluminum film 500 (FIG. 3B), and the resist is formed. After the removal, the second protective film 600 is deposited (FIG. 3C). Next, a resist pattern 1 having an opening on the planned pad area
Then, 500 is formed, and the second protective film 600 is selectively removed (FIG. 3D). As a result, the wafer 101 on which elements such as the strain gauge 3 are formed is formed. An adjusting resistance element for laser trimming (not shown) by a known process.
Are also formed on the wafer 40. After the element forming process is completed, the wafer 101 is kept at 450 ° C. for 30 minutes,
Then, after cooling, the wafer 101 was annealed as usual (annealing after completion of the element formation process).

(Diaphragm portion forming step) Next, after the back surface of the wafer is ground to adjust the thickness to a predetermined value, the back surface of the wafer is plasma cleaned, and then a plasma silicon nitride film is deposited on the back surface of the wafer by the plasma CVD method. , Then, after forming a resist pattern on the back surface (lower surface in FIG. 2),
A plasma silicon nitride film is selectively opened from the opening of the resist by plasma dry etching to form the wafer 101.
The area to be opened on the back surface to be etched is exposed, and then the residual resist is removed. It should be noted that openings are similarly formed in advance on the surface of the wafer 101 (upper surface in FIG. 2) for electrode connection to the wafer 101 in electrochemical etching.

Next, the wafer 101 is electrochemically etched. FIG. 4A shows a schematic view of an electrochemical etching apparatus for forming a diaphragm on the wafer 101. This electrochemical etching apparatus includes a base 140, a cylindrical frame body 150, and a lid body 160.
Fluorinated ethylene resin, etc. is used, and it has high insulation and excellent heat insulation and corrosion resistance. The frame 15 is placed on the base 140.
The lower open end of 0 is arranged in a state that it can be held in a liquid-tight state by an O-ring 170, and the upper open end of the frame 150 is attached to the lid 160 in a liquid-tight state by an O-ring 180. The base 140, the frame 150, and the lid 160 at the upper open end constitute a closed container, and 33 wt% as an alkali anisotropic etching liquid is contained in the container.
A KOH aqueous solution 190 can be filled.

The upper surface 140a of the base 140 is a smooth substrate mounting surface, and the wafer 101 to be etched is placed on this upper surface 140a. At this time, the wafer 10
The first P-type silicon substrate 1001 faces upward, and the surface of the P-type silicon substrate 1001 has a 33 wt% KOH aqueous solution 190.
Is in contact with. The metal film 520 of the wafer 101 is in close contact with the upper surface 140 a of the base 140.

The upper surface (substrate mounting surface) 1 of the base 140
A negative pressure chamber forming recess 200 is annularly provided on the outer peripheral portion of 40a. A ring-shaped packing 210 is fixed to the lower surface of the frame body 150.
1. Negative pressure chamber forming recess 200 with the outer peripheral edge of No. 1 sandwiched
Is blocking the opening. Then, the inside of the negative pressure chamber forming recess 200 is evacuated by a vacuum pump (not shown) or the like, so that the packing 210 is sucked to suck the wafer 101.
Is fixed immovably. Thus, the packing 210 masks the etching surface at the outer peripheral edge of the wafer 101. In addition, the base 140 and the frame 150 are suction-fixed by this vacuuming.

As shown in FIG. 4B, the base 140 has an upper surface (substrate mounting surface) 140a and a recess 2 for forming the negative pressure chamber.
A passage 230 communicating with 00 is formed.
An anode electrode 240 is arranged at 0. Anode electrode 24
One end of 0 is the nut 25 in the negative pressure chamber forming recess 200.
It is connected to the pin 260 by 0. The pin 260 is exposed to the outside of the base 140 by the communication hole 270 and is kept airtight by the O-ring 280. Anode electrode 24
The tip of 0 is the base 1 when there is no wafer 101.
The wafer 10 protrudes from the upper surface 140a of the wafer 40 by a distance L.
When 1 is placed on the upper surface 140a of the base 140, the anode electrode 240 bends as shown by the chain double-dashed line in FIG. As described above, the anode electrode 240 is brought into contact with the metal film 520 of the wafer 101 with a constant contact pressure to bring the wafer 10 into contact.
A voltage can be applied to 1.

In FIG. 4A, the lid 160 is provided with a supply passage 290 reaching the inside of the frame 150. In this supply passage 290, 33 wt% KOH aqueous solution is passed through the valve 300 and pure water is passed through the valve 310. Nitrogen gas can be supplied through the valve 320. A discharge passage 330 that communicates the inside and the outside is provided in the lid 160, and one end of the discharge passage 330 is opened to the bottom of the frame 150 by a pipe 340. And
Through the pipe 340 and the discharge passage 330, the frame 15
The KOH aqueous solution 190 in 0, pure water, etc. can be discharged.

A rod-shaped cathode electrode 350 is arranged so as to penetrate the lid 160, and is kept airtight by an O-ring 360. This cathode electrode 350 has three
It extends to a predetermined depth with respect to a 3 wt% KOH aqueous solution.
A DC power supply (1 to 10 V) 370 and an ammeter 380 are connected in series between the cathode electrode 350 and the anode electrode 240. Due to the closing of the contact 390, a potential difference is applied between the cathode electrode 350 and the anode electrode 240 by the DC power supply 370, and the current flowing through the ammeter 380 is detected.

The heater 400 is arranged so as to pass through the lid 160, and is kept airtight by an O-ring 410. By energizing the heater 400, the heater 400 generates heat and the 33 wt% KOH aqueous solution 190 can be heated. The temperature sensor 420 is arranged so as to penetrate the lid 160, and the O-ring 430 keeps airtightness. With this temperature sensor 420, KOH
The temperature of the aqueous solution 190 is detected. Temperature controller 4
Reference numeral 40 monitors the temperature of the KOH aqueous solution 190 by the temperature sensor 420, controls the energization current of the heater 400, and holds the temperature at 110 ° C.

A stirring blade 450 is arranged in the frame body 150, and the stirring blade 450 is rotated through a coupling 470 by a motor 460 attached to the lid body 160 and KO.
The H aqueous solution 190 is stirred. Stirring blade 450 is O-ring 4
Airtightness is maintained at 80. Main controller 4
Reference numeral 90 detects the start of etching by the signal from the start switch 500, and also detects the energizing current by the signal from the ammeter 380. Furthermore, the main controller 49
0 is contact 390, motor 460, temperature controller 44
0, drive control of the valves 300, 310, 320.

At the time of etching, as shown in FIG. 4A, the wafer 101 is placed on the upper surface 140a of the base 140, the inside of the negative pressure chamber forming recess 200 is evacuated, and the packing 210 is used. Fix 101. When the predetermined time T has passed, the main controller 490 ends the electrochemical etching. That is, the discharge of the KOH aqueous solution 190,
Cleaning is performed by introducing pure water, the stirring blade 450 is stopped, electricity is cut off, pure water is discharged, and drying is performed by supplying nitrogen gas.

Next, the negative pressure in the negative pressure chamber forming recess 200 is released to separate the base 140 and the frame 150, and the wafer 1
Take out 01. Next, the plasma nitride film (P-SiN) used as a mask material for the electrochemical etching is removed by wet etching. (Anodic bonding process) After that, the wafer 10 is formed by the anodic bonding method.
1 is joined to the base plate 110 (FIG. 5A). The anodic bonding process will be described below. The pedestal plate 110 is a pedestal in wafer units before being diced into chip units shown in FIG.

A metal deposition film is preliminarily formed on one surface (metallized surface) of the base plate 110 made of a flat plate having a large number of through holes, and the wafer 101 is placed on the base plate 110. These are pressed by a pair of electrodes. As the metallized film, Au / Ni / Ti
Adopted a membrane. This metallized film is provided to improve the wettability in soldering to the stem described above.

Next, 357 to 363 ° C., 1 to 10 × 10
A DC voltage of 400 V is applied between both electrodes for about 10 minutes with the positive side on the wafer 101 side under an atmosphere condition of ^-4 Pa. As a result, oxygen ions move from the base plate 110 to the wafer 101, and so-called anodic bonding occurs. (Half Cut Step) Next, the pedestal 110 and the wafer 101 are half cut (half dicing) along the chip dicing line of the wafer 101.

(First Annealing Step) Next, the wafer 101
Is held at 450 ° C. for 192 minutes, and heat is gradually released to perform the second annealing. Of course, the annealing atmosphere may be a vacuum. (Trimming Step) Next, the trim resistor (see FIG. 1) formed on the wafer 101 is laser-trimmed to match the output characteristic with the reference characteristic, and then the wafer 101 is moved along the half-cut groove. Completely diced,
Separate into chips. At this time, the pedestal plate 110 is the pedestal 11
Is separated into

(Mounting process) Next, the pedestal 1 with a chip
1 is soldered to the stem 12 at a temperature of about 310 ° C., wire bonding is also performed, and the metal can 13 is welded to the stem 12 to complete the assembly. According to this embodiment, since the annealing is performed immediately before the trimming process, it is possible to reduce the variation in the output characteristics of the strain sensor for the reason described above.

(Test) FIG. 6 shows the change in the variation reduction amount of the output characteristics when the annealing temperature and the annealing time were changed using 8 to 13 test products. 450
It can be seen that the output characteristic variation can be significantly reduced by annealing at 72 ° C. for 72 minutes or longer. This test product has an operational amplifier type amplifier circuit built in the chip. As a comparative example, FIG. 7 shows the amount of variation in the output characteristics after the dicing and after the mounting process when the first annealing process is not performed. According to this embodiment, the output characteristic variation is reduced to a fraction.
Was reduced to (Embodiment 2) Another embodiment will be described.

In this embodiment, a metallizing process is provided between the first annealing process and the trimming process in the first embodiment. As a matter of course, in the anodic bonding process, the base plate 110 on which the metallized film is not previously formed is used. Then, an Au / Ni / Ti film as a metallized film is formed on the surface of the base plate 110 to be soldered to the stem between the first annealing process and the trimming process.

The metallization process is performed by electron beam vacuum evaporation to a thickness of 1 to 4 × 10 ^-6 Torr and Ti of about 3000.
The thickness is about angstroms, the thickness of Ni is about 6000 angstroms, and the thickness of Au is about 1500 angstroms. When the metallized layer is formed by such a PVD method, the diaphragm,
In particular, crystal damage occurs near the strain gauge 3, and this damage is recovered in the mounting process, causing variations in output characteristics despite the adoption of the trimming process. Therefore, in the present embodiment, 3 before the trimming process.
Annealing at 50 ° C. for 27 minutes (second annealing step) is performed to recover this damage.

In order to verify the effect of annealing between the metallizing process and the trimming process, one lot is
Two lots of test products each consisting of five chips were used, and the annealing temperature was variously changed to examine the output fluctuation amount. However,
The half cut process was omitted. FIG. 8 shows the result.
From FIG. 8, it was found that even when the metallizing step is performed between the first annealing step and the trimming step, the output characteristic variation can be reduced by the second annealing step.

Further, one lot of a test product consisting of 15 chips per lot was used, and the annealing time was variously changed to examine the output fluctuation amount. The result is shown in FIG. From FIG. 9, it was found that even when the metallizing step is performed between the second annealing step and the trimming step, the output characteristic variation can be reduced by performing the annealing step for 27 minutes or more. (Embodiment 3) Another embodiment will be described.

In this embodiment, in addition to the second annealing process after the metallizing process in the second embodiment, a third annealing process is performed after the diaphragm portion forming process, and a fourth annealing process is performed after the anodic bonding is completed. It is a thing. According to the present embodiment, the annealing process is performed immediately after each of the diaphragm portion forming process, the anodic bonding process, and the metallizing process that cause variations in the output characteristics in the mounting process, so that further effects can be achieved. .

The following tests were conducted in order to investigate the effect of each annealing process. The first test is a measurement of the output characteristic variation of the test product that has undergone only the annealing step (third annealing step) after the diaphragm portion forming step. Further, as a comparative example, variations in output characteristics when the third annealing process and the fourth annealing process were not performed were also examined.
The test results are shown in FIG. 10 (however, the pedestal is not joined).

From this test result, it was found that the output characteristic variation can be remarkably reduced by carrying out each annealing step. In addition, although the semiconductor pressure sensor is described as an example in the above-mentioned embodiment, it is needless to say that the present invention can be applied to a semiconductor acceleration sensor. In addition, the present invention can be applied to all semiconductor sensors in which a process that damages the crystallinity of a wafer is performed or heat treatment is performed after element formation and before trimming, and a thermal process is performed after trimming.

The output fluctuation amount in each of the above embodiments is obtained by subtracting the DC offset voltage after the trimming process from the DC offset voltage after the mounting process.

[Brief description of drawings]

FIG. 1 is a sectional view of a semiconductor pressure sensor according to a first embodiment.

2A to 2D are process diagrams sequentially showing the first half of the element forming process of the sensor of FIG.

3A to 3D are process diagrams sequentially showing the latter half of the element forming process of the sensor of FIG.

FIG. 4A is an overall sectional view showing an electrochemical etching apparatus, and FIG. 4B is a partial sectional view showing the electrochemical etching apparatus.

FIG. 5 is a process diagram sequentially showing a diaphragm forming process, an anodic bonding process, and a half-cutting process.

FIG. 6 is a characteristic diagram showing variations in output characteristics when the annealing conditions of the sensor of Example 1 are changed.

FIG. 7 is a characteristic diagram showing variations in output characteristics of the sensor of Example 1 without annealing.

FIG. 8 is a characteristic diagram showing variations in output characteristics when the annealing temperature of the sensor of Example 2 is changed.

FIG. 9 is a characteristic diagram showing variations in output characteristics when the annealing time of the sensor of the second embodiment is changed.

FIG. 10 is a characteristic diagram showing the effect of the third annealing step of the sensor of Example 3;

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Yasutoshi 1-1 1-1 Showa-cho, Kariya city, Aichi Nihon Denso Co., Ltd.

Claims (6)

[Claims] 1. An element forming step of forming a signal conversion element and an adjusting resistance element on a wafer, a pedestal joining step of joining the wafer to a pedestal in a predetermined high temperature atmosphere, and the signal by trimming the adjusting resistance element. In a method of manufacturing a semiconductor sensor, a trimming step for reducing variations in output characteristics of a conversion element, an assembly step for joining a pedestal with a chip formed by dicing the wafer and the pedestal to a stem while heating the pedestal in the above order, A method of manufacturing a semiconductor sensor, which comprises performing an annealing process of heating the wafer and the pedestal to a predetermined temperature after the pedestal joining process and before the trimming process, and then gradually cooling the wafer and the pedestal. 2. The manufacturing of a semiconductor sensor according to claim 1, further comprising a metallizing step of depositing a metal film on the stem joining surface of the pedestal by vacuum deposition or sputtering, and the annealing step is performed after the metallizing step. Method. 3. After the step of joining the pedestal, there is a half-cut step of partially cutting along the dicing line from the wafer side while leaving a part of the pedestal, and the annealing step is performed after the half-cut step. The method for manufacturing a semiconductor sensor according to claim 1, wherein the method is used. 4. An element forming step of forming a signal conversion element and an adjusting resistance element on a wafer, a wafer etching step including at least a plasma treatment process and thinning a predetermined region of the wafer, and the adjusting resistance element being trimmed. Then, the trimming step for reducing the variation in the output characteristics of the signal conversion element, and the assembly step for joining the pedestal with a chip obtained by dicing the wafer and the pedestal to the stem while heating the semiconductor pedestal are performed in the above order. In the manufacturing method, after the wafer etching step and before the trimming step, the wafer and the pedestal are heated to a predetermined temperature, and thereafter,
A method for manufacturing a semiconductor sensor, which comprises performing an annealing step of gradually cooling. 5. The annealing step is performed at 450 ° C. for 72 minutes.
The method for manufacturing a semiconductor sensor according to claim 1, wherein the method is performed at 450 ° C. for 192 minutes. 6. An element forming step of forming a signal conversion element and an adjusting resistance element on a wafer, a pedestal joining step of joining the wafer to a pedestal in a predetermined high temperature atmosphere, and trimming the adjusting resistance element to perform the signal processing. In a method of manufacturing a semiconductor sensor, a trimming step for reducing variations in output characteristics of a conversion element, an assembly step for joining a pedestal with a chip formed by dicing the wafer and the pedestal to a stem while heating the pedestal in the above order, The method of manufacturing a semiconductor sensor, wherein the pedestal joining step is performed by using the pedestal having a stem joining surface coated with a metal film in advance.