JPH0982785A - Semiconductor wafer temperature controller - Google Patents

Abstract

PROBLEM TO BE SOLVED: To make it possible to set the temperature of a wafer over a wide range of a high temperature at which the wafer is easily deformable to a low temperature in a wafer temperature controller and to make the temperature in the wafer surface uniform. SOLUTION: A current is suppled to a wafer 10 via a support member 1 to generate Joule heat to control to uniformly heat the surface of the wafer 10. The member 1 is lowered to bring the wafer 10 into direct contact with a stage 3 to be able to quickly cool it. Thus, the temperature of the wafer 10 can be controlled from the high temperature to the low temperature.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor wafer temperature control device and method for controlling the temperature of a semiconductor wafer during surface treatment of the semiconductor wafer.

[0002]

2. Description of the Related Art Conventionally, this type of wafer temperature control device is
When etching or forming a film on the surface of a semiconductor wafer (hereinafter simply referred to as "wafer"), a heat source is provided on the wafer mounting table and the output of the heat source is controlled to set the wafer to an appropriate temperature, which is effective. Was being processed.

FIGS. 4A to 4C are schematic views showing examples of various conventional semiconductor wafer temperature control devices.
The wafer temperature control device shown in FIG. 4 (a) is a device for placing the wafer 10 on a stage 27a whose temperature is adjusted by a built-in heater or cooling pipe, and heating or cooling the wafer 10 by direct heat conduction from the stage 27a. Is. Further, in this apparatus, helium gas is supplied between the back surface of the wafer 10 and the stage 27a through the helium gas introduction pipe 28 from the lower central portion of the stage 27a whose temperature is adjusted to enhance the heat conduction efficiency. And wafer 1
A clamp 26 is provided to fix 0.

As another example, as shown in FIG. 4 (b), the wafer temperature control device is the same as that shown in FIG. 4 (a), but the fixing of the wafer 10 and the improvement of the suction force of the wafer and the heat treatment are performed. It has an electrostatic attraction mechanism using Johnson-Rahbekka to improve the conduction efficiency. The electrostatic attraction mechanism includes an electrostatic attraction electrode 32 sealed with a polyimide or ceramic material, and an electrostatic attraction power supply 29 that applies a voltage to the electrode 32.

Further, as another example, as shown in FIG. 4 (c), an infrared lamp 31 for irradiating the wafer 10 placed on a holder 30 with infrared rays from the back side to heat the wafer 10 with radiant heat.
There is due to.

[0006]

The problems of the above-mentioned conventional wafer temperature control apparatus will be described below.

First, in the wafer temperature control apparatus shown in FIGS. 4 (a) and 4 (b), when the wafer 10 is heated to 200 ° C. or higher, the wafer 10 at room temperature is heated to 200 ° C. or higher. There is a problem that the wafer 10 is warped at the moment when it is placed on the stage. This is because there is a temperature difference between the central portion and the peripheral portion of the wafer, the thermal expansion is different, and the wafer is largely warped.
For example, in the case of the currently used silicon wafer with a diameter of 200 mm, this amount is 2 according to the SEMI-defined “SORI”.
It does not exceed the value of 00 μm, exceeds the region of elastic deformation, and the wafer does not return to the original size of “SORI” (usually about 10 to 30 μm). When the wafer is warped in this way, crystal defects called “slip” occur at the outer periphery of the wafer and crystal defects called “dislocation” occur at the center of the wafer, significantly lowering the yield and quality of semiconductor devices manufactured from the wafer. At the same time, there is a fatal problem that processing by other semiconductor manufacturing equipment becomes impossible.

Even if the amount of warpage is relatively small and the warpage returns to the original state without causing crystal defects in the region of elastic deformation, a chemical reaction is utilized due to the in-plane temperature difference of the semiconductor wafer. In the dry etching described above, there is a problem that an in-plane difference between the etching rate and the processed shape occurs.

On the other hand, in the wafer temperature control device shown in FIG. 4 (c) for heating by irradiating with an infrared lamp, the inside of the wafer can be heated relatively uniformly by devising the arrangement of the infrared lamp, and the above-mentioned warp of the wafer is prevented. Although there are few problems, for example, in the case of a dry etching device, there is a problem that the reproducibility and uniformity of heating of the infrared lamp are deteriorated due to the reaction products generated by the etching reaction.

In addition, for example, when a copper / tungsten laminated metal film on a wafer is processed by a dry etching method using RF plasma, copper is usually poor in reactivity and 2
It does not react with chlorine or chlorinated compounds unless it is heated to a temperature higher than 00 ° C. Therefore, in order to etch such a metal film, it is necessary to heat the wafer to 200 ° C. to 250 ° C. On the other hand, since tungsten can be easily dry-etched (plasma etching) with a gas containing fluorine as a fluorinated product, the processing shape control becomes unstable in a high temperature range of 200 ° C to 250 ° C. Therefore, when etching tungsten, the wafer is usually 10 to 40
Adjust the temperature to ℃. Therefore, when the copper / tungsten laminated metal film is dry-etched in the same chamber, when the copper is etched, the wafer temperature is set to 200.
In the case of etching tungsten at a temperature of ℃ to 250 ℃, it is necessary to control the temperature of the wafer at 10 to 40 ℃. However, in the case of the infrared lamp heating method, the temperature of the wafer is changed from 200 ° C. to 250 ° C. to 10 to 4 within a short time.
It is difficult to lower it to 0 ° C.

This problem also occurs in the wafer temperature control device shown in FIGS. 4 (a) and 4 (b), that is, in the device for placing the wafer on a temperature-controlled stage and directly heating and cooling the wafer by heat conduction. Have difficulty.

Therefore, an object of the present invention is to provide a wafer temperature control device capable of controlling the temperature of a wafer in a wide range from high temperature to low temperature at which the wafer is easily deformed and making the temperature within the wafer uniform. Is to provide.

[0013]

A feature of the present invention is that a plurality of conductive rod-shaped supporting members for placing a semiconductor wafer on the tip thereof, a clamp for pressing the semiconductor wafer to the supporting member side, and a space between these supporting members are provided. A power supply unit for supplying an electric current to generate Joule heat by passing an electric current through the semiconductor wafer,
A semiconductor wafer temperature control device including a temperature sensor for detecting the temperature of the semiconductor wafer. Further, it is desirable to provide a mechanism for moving the support member up and down to bring the semiconductor wafer into contact with and separate from the temperature-controlled stage.

Further, another feature of the present invention is that the semiconductor wafer is brought into contact with the support member and an electric current is applied to the semiconductor wafer to generate Joule heat to heat the semiconductor wafer to a desired processing temperature, and thereafter, It is a semiconductor wafer temperature control device comprising a control mechanism for bringing the semiconductor wafer and the stage into contact with each other to further heat or cool the semiconductor wafer to continuously perform a processing temperature different from the processing temperature.

[0015]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings.

FIG. 1 is a diagram showing an outline of a wafer temperature control device according to an embodiment of the present invention. As shown in FIG. 1, this wafer temperature control device includes a plurality of conductive support members 1 on which a wafer 10 is placed and which penetrates the holes of the stage 3 without coming into contact with each other, and an electric current is supplied between the support members 1 to provide a wafer. 10 is provided with a power supply unit 2 that generates Joule heat to heat the wafer 10, and a temperature control device 4 that operates a switching mechanism 5 that detects the temperature of the wafer 10 with a temperature sensor 6 and turns the power supply unit 2 on and off. .

The clamp 7 is provided to fix the wafer 10 and to reduce the contact resistance between the back surface of the wafer 10 and the tip of the supporting member 1. The clamp 7 is made of, for example, heat-resistant resin, and is pressed by a spring. The power supply unit 2 that supplies a current to the wafer 10 is a DC power supply, and its voltage is such that the circuit elements of the wafer are not destroyed. On the other hand, the temperature control device 4 controls the current supplied to the heater built in the stage 3 by the mechanism for controlling the supply of low-temperature cooling water to the water cooling jacket built in the stage 3 and the detection signal of the temperature sensor 6. And a current controller for operating the switching mechanism 5.

Next, the operation of this wafer temperature control device will be described. First, the clamp 7 is pulled up so that the wafer 10 can be easily inserted, and then the wafer 10 is placed on the support member 1. Then, the clamp 7 is pulled down to fix the wafer 10. Next, an electric current is passed from the power supply unit 2 to the wafer 10 via the support member 1. As a result, the wafer 10 generates heat due to Joule heat, and its temperature is measured by the temperature sensor 6. When the desired temperature is reached, a signal is transferred from the temperature control device 4 to the switching mechanism 5, and the supply of current from the power supply unit 2 is stopped. After the current is supplied and cut off and the temperature becomes constant, plasma etching is performed.

Here, in order to set the current to be applied to the wafer 10, it is desirable to make a trial calculation of the current value by the following procedure. For example, assuming that the wafer 10 is a resistor, the resistance value [Ω] is R, the current value [A] to be set is I, and the flowing time [sec] is t, the thermal energy W [cal] = 0.24 × R
I ² t. On the other hand, the resistance R is generally the sample length l,
If the cross-sectional area is S and the resistivity is P, then R = P × l / S. Then, the resistivity of the wafer depends on the added impurities (P
It is generally around 10 [Ω · cm], though it depends on the amount of boron or phosphorus that determines the type and N type. If these resistance values and the flow time are determined, it is necessary to set the current value for a desired temperature in advance.

Further, since an actual wafer is also formed with a film on the back surface, an insulating film may be formed on the back surface depending on the process. However, as a result of the trial, if the insulating film has a thickness of up to 1.0 μm, the tip of the supporting member material 1 is formed into a needle-shaped protrusion and the clamp 7 presses the tip to reach the base of the wafer 10. I was able to confirm that. In a normal semiconductor device manufacturing process, the thickness of the insulating film formed on the back surface is 3000 to 5000 angstroms, and even the thickest is about 8000 angstroms, so that sufficient contact between the support member 1 and the wafer 10 was obtained. .

Furthermore, the possibility of destruction of semiconductor circuit elements due to the current passing through the wafer 10 is investigated.
As a result of the experiment, the current flows in the thick substrate portion that is not the element formation region of the wafer, and because an insulating film such as a thermal oxide film is formed between the substrate and the element region layer, it becomes a barrier and the current Does not flow. As a result, no damage or deterioration of the quality of the semiconductor circuit element was observed.

Next, the wafer temperature control device will be applied to a reactive ion etching device to concretely explain an example in which a copper metal film is actually etched.

First, a DC power source was used for the power source section 2 to heat the wafer 10. The thickness of the wafer 10, which is the resistance R between the electrodes at room temperature, is 0.06 [cm], and the resistivity is 10 [Ω-cm]. R = 1 / S = 10 [Ω-
cm] × 13 [cm] /0.06×10 [cm ² ] ≈2
00 [Ω]. Therefore, when the current flowing between the supporting members 1 is 0.5 [A] and a current is passed for 60 seconds, the thermal energy W is W = 0.24 × 200 × (0.5) ² × 60 = 72.
It becomes 0 [cal]. Specific heat of silicon wafer is 0.1
Since it is 66 [cal / g ° C] and the mass is about 40 g, the temperature increase ΔT [° C] due to thermal energy is mcΔ.
From T = W (m is mass, C is specific heat), ΔT≈110 ° C. As described above, the actual resistivity decreases as the temperature rises, so it took about 140 seconds for the semiconductor wafer temperature to reach 200 ° C. After heating the wafer 10 to such a high temperature, plasma discharge was generated to selectively remove the copper layer by etching through the mask.

FIG. 2 is a diagram schematically showing a wafer temperature control device according to another embodiment of the present invention. As shown in FIG. 2, this wafer temperature control device is provided with an elevating mechanism 8 for bringing the wafer 10 into contact with or separating from the stage 3 while being supported by the support member 1. The rest is the same as the wafer temperature control device of the above-described embodiment.
The elevating mechanism 8 is provided with a linear reciprocating mechanism arranged outside the processing chamber, for example, a mechanism using an air cylinder from which a pisoton protrudes, or a motor driving mechanism that causes a plunger to protrude, and is supported inside the processing chamber. A movable plate 9 for mounting the member 1 and the support of the clamp 7 is attached to the piston or the plunger.

By using a commercially available program sequencer that performs a series of operations of the elevating mechanism 8, the temperature control control device 4, and the power supply unit 2, the temperature of the wafer 10 can be set in several stages in the same processing step. Can be set to. That is, with the wafer 10 separated from the stage 3, an electric current is passed through the support member 1 to heat the wafer 10 to a desired temperature, and the wafer 10 is subjected to one treatment at a desired temperature. And
The elevating mechanism 8 can lower the wafer 10 to the position of the wafer 10a to bring it into contact with the stage 3 to cool it, and bring it to a desired temperature for processing at the next lower temperature. Stage 3
Is equipped with a water cooling jacket, and cooling water of an appropriate temperature is supplied from the temperature control device 4.

FIG. 3 is a sectional view of a wafer used as a sample. Next, this wafer temperature control device is used as a parallel plate type reactive ion etching device (hereinafter referred to as RIE).
The operation will be explained by explaining that the processing is performed by incorporating the copper / tungsten laminated metal wiring into the above. First, the wafer of FIG. 3 was prepared to perform this etching.
In this wafer, as shown in FIG. 3, a thermal oxide film 12 and a BPSG film 13 are formed on a silicon substrate 11. A tungsten film 14 having a thickness of 2000 angstrom is formed on the BPSG film 13 by atmospheric pressure vapor deposition. Further, a copper thin film 15 having a thickness of 4500 angstroms is formed by the sputtering method. Etching mask 16
In this case, an oxide film having a thickness of 3000 angstrom was formed by the plasma vapor deposition method, and then the photoresist mask 16 was patterned by the dry etching method. After dry etching of the oxide film, the photoresist was selectively removed by O ₂ gas by plasma ashing to form a mask 16.

The wafer 10 thus prepared is placed in the processing chamber and placed on the support member 1. Next, an electric current is passed from the power supply unit 2 to the wafer 10 through the support member 1. As a result, the wafer 10 is heated by Joule heat. Since there is heating in a vacuum, the heat radiation is small and the heating is uniform. As described above, the wafer 10 is heated to 200 ° C. in about 140 seconds. After that, the copper film 15 is etched through the mask 16 by plasma discharge by the RF generator.

It should be noted that Cl ₂ is added to this copper film etching by 5%.
0 sccm, SiCl ₄ 50 sccm, N ₂ 10 s
The pressure was set to 30 Pa by flowing ccm. RF power is 1
800w was applied at 3.56MHz. At this time, the etching rate of copper was 2300 angstrom / min. Moreover, the in-plane uniformity of etching was a favorable value of ± 5%.

After that, the plasma discharge is stopped once, and the movable plate 9 is lowered by the elevating mechanism 8 to bring the wafer 10a into contact with the stage 3. At this time, the supply of current from the support member 1 to the wafer 10a is stopped. The temperature of the stage 3 was adjusted to 35 ° C., and the temperature of the wafer 10a in contact with the stage 3 could be lowered from 200 ° C. to 35 ° C. in about 90 seconds. After that, the tungsten film 14 was etched again through the copper film pattern selectively etched by the plasma discharge.

The etching of the tungsten film 14 was carried out by flowing SF ₆ at 50 sccm and Cl ₂ at 10 sccm at a pressure of 15 Pa. The RF power applied was 350w. At this time, the etch rate of tungsten was 2800 angstrom / min. The in-plane uniformity of etching was a good value of ± 3%. Through the above procedure, the wafer temperature control device of the present invention can be used to continuously carry out copper / tungsten laminated metal wiring in the same reaction vessel.

As described above, in the present embodiment, the processing is performed by setting the temperature from high temperature to low temperature. However, depending on the film quality of the wafer, according to this wafer temperature control device, the temperature is changed from low temperature to high temperature in one batch process. It is also possible to perform multiple processes by changing.

[0032]

As described above, in the present invention,
By providing a plurality of supporting members for supporting the wafer and a power supply unit for supplying an electric current through the supporting members to generate Joule heat, the temperature of the wafer can be uniformly adjusted to a desired temperature regardless of the central portion or the peripheral portion. Can be In addition, since the current or time passed through the wafer can be changed arbitrarily, the temperature of the wafer can be changed over a wide range.
Further, by providing a mechanism for bringing the heated wafer into contact with or separated from the cooled stage,
There is also an effect that a plurality of wafers having different temperatures can be processed by one batch processing.

[Brief description of drawings]

FIG. 1 is a diagram schematically showing a wafer temperature control device according to an embodiment of the present invention.

FIG. 2 is a diagram showing an outline of a wafer temperature control device in another embodiment of the present invention.

FIG. 3 is a cross-sectional view of a wafer used as a sample.

FIG. 4 is a diagram schematically showing an example of various conventional semiconductor wafer temperature control devices.

[Explanation of symbols]

 1 Support Member 2 Power Supply Unit 3, 27a, 27b Stage 4 Temperature Control Device 5 Switching Mechanism 6 Temperature Sensor 7, 26 Clamp 8 Lifting Mechanism 9 Movable Plate 10, 10a Wafer 11 Silicon Substrate 12 Thermal Oxide Film 13 BSG Film 14 Tungsten Film 15 Copper film 16 Mask 28 Introducing tube 29 Power source for electrostatic attraction 30 Holder 31 Infrared lamp 32 Electrode

Claims (3)

[Claims] 1. A plurality of conductive rod-shaped supporting members for mounting a semiconductor wafer on a tip thereof, a clamp for pressing the semiconductor wafer to the supporting member side, and a current between the supporting members for supplying a current to the semiconductor wafer. A semiconductor wafer temperature control device, comprising: a power supply section for generating flow Joule heat; and a temperature sensor for detecting the temperature of the semiconductor wafer. 2. The semiconductor wafer temperature control device according to claim 1, further comprising a mechanism for moving the support member up and down to bring the semiconductor wafer into contact with and separate from the temperature-controlled stage. 3. The semiconductor wafer is brought into contact with the support member and an electric current is applied to the semiconductor wafer to generate Joule heat to heat the semiconductor wafer to a desired processing temperature, and thereafter, the semiconductor wafer and the stage are separated from each other. 3. The semiconductor wafer temperature control device according to claim 2, further comprising a control mechanism which is brought into contact with the semiconductor wafer to further heat or cool the semiconductor wafer to continuously perform a processing temperature different from the processing temperature.