JPH0945756A - Semiconductor manufacturing device and manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To realize a semiconductor manufacturing device which can perform a plurality of treatments by one unit and can manufacture semiconductor elements with high quality during a film forming step. SOLUTION: A voltage is impressed between a semiconductor wafer 1 placed on the upper surface of a dielectric insulating layer 2 and an electrode plate 4 provided on the lower surface of the dielectric insulating layer 2 by a direct current power source. Then the wafer 1 is sucked and supporting on a wafer supporting face 3 of an upper surface of the dielectric insulating layer 2 caused by electrostatic attracting force generating. Plasma is generated in a plasma region 16 to perform sputtering by a treatment gas such as Ar being introduced into a treatment chamber 17 and a high frequency voltage being impressed to a counter electrode 14 by a high frequency power source 15. In the semiconductor manufacturing device being constituted of the above, the dielectric insulating layer 2 is adjusted as its voltage resistivity ρ being in a range of 10<8> Ωcm<ρ<10<13> Ωcm at the temperature where film making is practically performed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor manufacturing apparatus and a semiconductor manufacturing method suitable for performing a process for manufacturing a semiconductor element on a wafer while heating the wafer in a vacuum.

[0002]

2. Description of the Related Art In an etching process and a thin film forming process in a semiconductor manufacturing process, it is necessary to securely hold and hold a wafer at a predetermined position of an apparatus and cool or heat the wafer to a desired temperature.

As a sample holding means for such an application, an electrostatic adsorption type sample holding device which can be used even in a vacuum and is capable of generating an adsorption force on the entire back surface of a wafer has become widespread. The electrostatic adsorption device is configured by laminating an electrode plate and an insulating dielectric, and by generating a potential difference between the electrode plate and the sample, a Coulomb force, that is, an electrostatic attraction force is generated, and the insulating dielectric surface The sample is adsorbed and held on the top. Such an electrostatic adsorption type sample holding device is disclosed in, for example, Japanese Patent Application Laid-Open No. 3-204924.

[0004]

In the thin film forming process using CVD or sputtering, desired physical property values such as resistance value,
In order to obtain the dielectric constant, refractive index, reflectance, etc., it is necessary to control the wafer temperature to a desired value, and the temperature must be uniform within the wafer surface. The temperature is 100 ° C. in the thin film forming process using CVD or sputtering, and up to 700 ° C. depending on the process. Further, the processing temperature differs depending on the type of film to be formed, and therefore processing at different temperatures is required. Further, even if the film type is the same, the physical properties differ depending on the film forming temperature. Therefore, in order to obtain films having different roles, a plurality of film forming processes are performed at different wafer temperatures.

However, most of the current wafer holding methods of the CVD apparatus and the sputtering apparatus are methods of mechanically clamping the peripheral portion of the wafer surface, so that the adhesion to the wafer susceptor having a heating source such as a heater is not sufficient. Unfortunately, the wafer cannot be heated to a high temperature such as 700 ° C., and it is difficult to obtain a desired film quality. In addition, since the temperature controllability is poor, it is not possible to perform film formation at different temperatures with a single device. There is also a problem that it is necessary to prepare a plurality of devices having different wafer temperatures.

On the other hand, an electrostatic attraction device which has recently become popular has been developed for a dry etching process as disclosed in the above publication. That is, the dry etching is performed while cooling the wafer, and the temperature of the wafer is from about room temperature to about -60 ° C. In electrostatic attraction, the resistance of the insulating layer used as a dielectric is important, but the insulating layer used as a dielectric has the property that its resistivity decreases as the temperature rises. If the resistivity is too low, it becomes difficult to accumulate charges, the adsorption force is reduced, and a large current flows through the sample, which may damage the semiconductor element.
Therefore, the currently prevailing electrostatic chucking device for dry etching as shown in the above publication is not suitable for manufacturing a device by diverting it to a thin film forming process. By adjusting the resistivity of the insulating layer to an appropriate range, the wafer suction holding by electrostatic attraction can be applied to the thin film forming process, and even when the heating temperature range for the wafer is as wide as 100 to 700 ° C. An object of the present invention is to provide a semiconductor manufacturing apparatus and a manufacturing method which can be processed by one device.

[0007]

In order to achieve the above object, the present invention provides a vacuum container and a vacuum container, the electrode plate is provided on one surface and the wafer is placed on the other surface. An insulating dielectric, a voltage applying means for applying a voltage between the electrode plate and the wafer, and a heating means for heating the wafer,
By applying a voltage by the voltage applying means, an electrostatic attraction force is generated between the electrode plate and the wafer to suck and hold the wafer on the surface of the insulating dielectric, and to perform a process for manufacturing a semiconductor element on the wafer. In semiconductor manufacturing equipment,
Insulating dielectrics are used in the heating temperature range for thin film formation.
It is characterized in that the value of the volume resistivity ρ falls within the range of 10 ⁸ Ωcm <ρ <10 ¹³ Ωcm.

According to the present invention, in the semiconductor manufacturing apparatus having the above structure, the temperature of the wafer is detected, the heating means is controlled based on the detected temperature, and the heating temperature for the wafer is adjusted. The dielectric has a volume resistivity ρ of 1 in the heating temperature range for thin film formation.
It is characterized in that it falls within the range of 0 ⁸ Ωcm <ρ <10 ¹³ Ωcm.

According to the present invention, in the semiconductor manufacturing apparatus having the above structure, the volume resistivity ρ of the insulating dielectric is 10 ⁸ Ωcm <ρ <1 in the heating temperature range for forming a thin film.
A plurality of different dielectric insulating layers within the range of 0 ¹³ Ωcm are provided, an electrode plate is attached to each of the dielectric insulating layers, and the voltage from the voltage applying means is individually applied to each of the dielectric insulating layers. It is characterized in that a means for doing so is provided.

The present invention also provides the above semiconductor manufacturing apparatus,
The apparatus is installed in a semiconductor manufacturing system as a CVD apparatus or a sputtering apparatus, and the semiconductor manufacturing apparatus is at least one of an exposure step, a thermal oxidation / diffusion step, an ion implantation step, an etching step and a wiring step of the semiconductor manufacturing system. It was installed in. .

Further, according to the present invention, an insulating dielectric having an electrode plate on one surface and a wafer placed on the other surface is housed in a vacuum container, and a voltage is applied between the electrode plate and the wafer. Is applied to generate an electrostatic attraction force between the electrode plate and the wafer, the wafer is attracted and held on the surface of the insulating dielectric, and the wafer is heated to perform a process for manufacturing a semiconductor element on the wafer. In the applied semiconductor manufacturing method, as the insulating dielectric, the volume resistivity ρ is within the heating temperature range for forming the thin film.
Values using 10 ⁸ Ωcm <ρ <fall within the scope of 10 ¹³ [Omega] cm insulating dielectric, without replacing the insulating dielectric, heating the wafer at any temperature in the range of 100 to 700 ° C. That is.

[0012]

According to the above construction, the volume resistivity ρ of the insulating dielectric is 10 ⁸ Ωcm in the heating temperature range for thin film formation.
Since it falls within the range of <ρ <10 ¹³ Ωcm, it is possible to prevent the attraction force from being lowered and a large current to flow to the wafer. The volume resistivity ρ is 10 ⁸ Ωcm <ρ <10 ¹³ Ωc
By using an insulating dielectric that falls within the range of m, 1
The wafer can be heated at any temperature in the range of 00 to 700 ° C., and a single apparatus can perform film forming processing at a plurality of temperatures.

Further, since the wafer is adsorbed and held on the insulating dielectric by the electrostatic attraction force, the adhesion between the wafer and the surface of the insulating dielectric is improved, which improves the heat transfer coefficient and is desired. It becomes possible to form a film by controlling the temperature corresponding to the physical property value of. Therefore, it becomes possible to realize film formation at a high temperature such as 700 ° C., which is impossible with the conventional mechanical clamping method.

Further, in the exposure process, the thermal oxidation / diffusion process, the ion implantation process, the etching process, the wiring process, etc., all the wafers can be held in the processing apparatus by electrostatic attraction, which allows the temperature to be maintained. Since the controllability is improved, highly accurate element processing can be performed regardless of how large the diameter of the wafer is. That is, in the semiconductor manufacturing process, there are factors such as heat treatment and film formation that deform the wafer.
The degree becomes more severe as the diameter of the wafer increases,
By using electrostatic attraction for holding the wafer, the deformation of the wafer can be corrected, and accurate exposure and efficient heat conduction can be achieved. As a result, element processing can be performed with high accuracy.

[0015]

Embodiments of the present invention will be described below with reference to the drawings. In the following embodiments, a sputtering apparatus will be described as an example of a semiconductor manufacturing apparatus, but the present invention is not limited to this, and a heat treatment apparatus, a CVD apparatus, or the like for heating a wafer to manufacture a semiconductor. Valid for all devices. Further, in the following embodiments, the electrostatic adsorption method will be described by taking as an example a so-called single-pole type electrostatic adsorption device in which conduction is made from a wafer by a single electrode, but it is constituted by two electrodes without conduction from the wafer. The present invention also has the same effect as to a so-called bipolar electrostatic chucking device. Further, the same applies to a single-pole type electrostatic adsorption device of the type that conducts electricity from the wafer via plasma.

(First Embodiment) FIG. 1 shows a semiconductor manufacturing apparatus of the present invention, and shows a schematic structure of a sputtering apparatus as an example thereof. In FIG. 1, 1 is a semiconductor wafer, 2
Is a dielectric insulating layer as an insulating dielectric. Wafer 1
Are adsorbed and held on the upper surface of the dielectric insulating layer 2, that is, on the wafer holding surface 3. An electrode plate 4 is provided on the lower surface (the surface opposite to the wafer holding surface 3) of the dielectric insulating layer 2. The dielectric insulating layer 2 is fixed on the base 5 arranged below the electrode plate 4. A plurality of heaters 6 are provided below the base 5, and these heaters 6 are heater power supplies 7
It is connected to the.

Further, a tubular insulator 8 is provided so as to penetrate the dielectric insulating layer 2, the electrode plate 4 and the base 5, and a conducting portion 10 connected to a DC power source 9 is inserted into the insulator 8. There is. The DC power supply 9 is also connected to the electrode plate 4, and the DC power supply 9 can apply a voltage between the electrode plate 4 and the wafer 1 in contact with the conductive portion 10. Further, a groove 11 is formed in the wafer holding surface 3 on the upper surface of the dielectric insulating layer 2 so that gas is supplied into the groove 11 from a gas supply source (not shown) via the valve 12 and the pipe 13. There is.

A counter electrode (target) 14 is provided above the dielectric insulating layer 2 on which the wafer 1 is placed at a predetermined interval.
The counter electrode 14 is connected to a high frequency power source 15 for plasma generation. In addition, 16 has shown the plasma region.

The dielectric insulating layer 2, the electrode plate 4, the base 5, the counter electrode 14 and the like are provided inside the process chamber 17, and the process chamber 16 has a vacuum atmosphere by an exhaust device (not shown). be able to. In FIG. 1, 18 and 19 are grounds. The electrode plate 4 may be embedded in the base 5 as shown in FIG. 1 or may be embedded in the dielectric insulating layer 2.

By the way, 10 such as CVD and sputtering
In the thin film process at a high temperature of 0 ° C. to 700 ° C., the dielectric insulating layer 2 has a volume resistivity ρ of 10 ⁸ Ωcm <ρ <10 ¹³ Ωcm in the temperature range in which the thin film is formed.
Must be adjusted so that In the case of electrostatic attraction, if the resistance of the ceramics used for the dielectric insulating layer 2 is too small, it becomes difficult to accumulate charges, the attraction force is reduced, and a large current flows through the wafer 1, which causes a semiconductor element. There is a harmful effect of destroying. On the other hand, if the resistance is too high, the time constant becomes longer when the voltage is applied or released, that is, when adsorption / desorption occurs, and the voltage is applied until the attraction force necessary for holding the wafer is generated. It takes a long time. Alternatively, it takes a long time from when the voltage is released until the suction force is released. That is,
There is a problem in that the throughput is too bad to efficiently manufacture semiconductors. There is also a problem that the surface resistance becomes smaller than the volume resistance, and a current flows on the surface of the insulating layer, so that the attractive force also decreases. The value of the volume resistivity ρ that can reduce the influence of the residual charge while maintaining the necessary electrostatic characteristics is in the range of 10 ⁸ Ωcm <ρ <10 ¹³ Ωcm.

However, the volume resistivity of the ceramics used for the dielectric insulating layer 2 drops sharply as the temperature rises. For this reason, in a device adjusted to have the above characteristics at room temperature, in a film forming process in a high temperature environment such as that of this embodiment, the resistance is excessively lowered due to the temperature rise, and thus the device having high accuracy is obtained. Cannot be processed.

Therefore, the dielectric insulating layer 2 of this embodiment is adjusted so that the value of the volume resistivity ρ is in the range of 10 ⁸ Ωcm <ρ <10 ¹³ Ωcm at the temperature at which the film is actually formed. Has been done. By changing the purity of ceramics,
That is, the resistivity can be controlled by changing the content of the impurities, and the content of the impurities may be adjusted so that the resistivity falls within the above range at the temperature at which the film is formed. Examples of such ceramics include silicon nitride (Si3N4), beryllia (BeO), boron nitride (BN), aluminum nitride (AlN), silicon oxide (SiO), alumina (Al ₂ O ₃ ) and the like. Physical and oxide ceramics in general can be considered.

In the semiconductor manufacturing apparatus having the above structure, when forming a film on the wafer 1, the wafer 1 is transferred into the process chamber 17 in the vacuum atmosphere by the transfer robot (not shown) through the load lock chamber (not shown), and the dielectric is formed. It is placed on the wafer holding surface 3 of the insulating layer 2. When the wafer 1 is placed on the wafer holding surface 3, the DC power supply 9 applies a voltage between the wafer 1 and the wafer holding surface 3. As a result, electrostatic attraction force is generated on the entire wafer holding surface 3,
The wafer 1 can be sucked and held on the wafer holding surface 3.

Electric power is supplied to the heater 6 from the heater power source 7, and the base 5 and the dielectric insulating layer 2 are preheated to a predetermined temperature. In this case, since the wafer 1 is held in close contact with the wafer holding surface 3 by the electrostatic attraction force, the heat transfer coefficient from the wafer holding surface 3 to the wafer 1 is improved and the wafer 1 can be efficiently heated. Further, since there is a microscopic gap due to the surface roughness between the wafer 1 and the wafer holding surface 3, when a gas such as He gas is introduced into the groove 11 through the pipe 13, this gas is heated. It serves as a transfer medium and can further improve the heat transfer coefficient. Since the groove 11 is formed on the entire surface of the wafer holding surface 3, the wafer 1
The gas can be uniformly introduced to the entire back surface of the wafer 1, and the temperature of the back surface of the wafer 1 can be made uniform.

Then, in the process chamber 17, A
In addition to introducing process gas such as r, high frequency power supply 1
A high frequency voltage is applied to the counter electrode 14 from 5 to generate plasma in the plasma region 16 to perform sputtering.

In the thin film forming process using CVD or sputtering, the physical properties of the film, such as resistance, dielectric constant, refractive index, reflectance, internal stress, etc., change depending on the temperature at which the thin film is formed. Therefore, in order to obtain a desired film quality, it is necessary to control the wafer temperature to a uniform and desired value within the wafer surface. By using the semiconductor manufacturing apparatus of this embodiment, the wafer can be held at least from 100 ° C. to 700 ° C. without replacing the apparatus, that is, with one apparatus continuously, so that the wafer 1 and the wafer holding surface 3 can be held. It is possible to maintain the adhesiveness with and throughout the entire process, and the temperature controllability of the wafer is dramatically improved. As a result, the wafer temperature can be heated to a desired temperature with high in-plane uniformity, and high quality film formation with desired physical properties becomes possible.

Next, since the temperature range that can be covered by one device is wide, the number of devices can be reduced, that is, the investment can be reduced. That is, the step of sputtering at 100 ° C. and 50
This is because if there is a post-treatment step at 0 ° C., the two steps can be treated with one sputtering apparatus. If a single apparatus is used to perform a process that requires a plurality of apparatuses in this manner, the chance of foreign matter adhering to the wafer is reduced, and semiconductor manufacturing with a high yield can be performed. Further, even if the same kind of film is used, it is possible to obtain a plurality of kinds of films having different physical properties depending on the film forming temperature, by simply changing the film forming temperature, and it is not necessary to prepare another apparatus. Furthermore, since the film formation of different film types can be dealt with by changing the target, a semiconductor manufacturing line with high flexibility can be obtained.

In this embodiment, the film forming method in which the heater 6 is installed for holding the wafer to heat the wafer has been described. However, the present invention is also applicable to the film forming method in which the wafer 1 is heated by plasma energy without using the heater. Can be applied, and in this case as well, similar effects can be obtained in terms of accuracy of film quality, in-plane uniformity, and the like.

(Second Embodiment) FIG. 2 shows a schematic structure of a semiconductor manufacturing apparatus according to a second embodiment of the present invention. The feature of this embodiment is that a temperature measuring device 21 having a sensor unit 20 for measuring the temperature of the wafer 1 and a measurement result from the temperature measuring device 21 are taken in, and the supply current to the heater 6 is controlled based on the result. And a control device 22 that operates. The sensor unit 20 is composed of an infrared temperature sensor, and has a tubular insulator 8
Has been inserted inside. In the control device 22, a temperature controller 23
And a controller 24 for controlling the current value to the heater 6.

The signal measured by the sensor portion 20 is converted into temperature information by the temperature measuring device 21 and sent to the control device 22. The control device 22 sends the signal to the controller 24 via the temperature controller 23 to control the current supplied to the heater 6. In this way, by measuring the temperature of the wafer 1 and performing feedback control regarding heating, it is possible to perform film formation with higher accuracy.

In the present embodiment, an example in which the temperature of the wafer is measured by the infrared temperature sensor has been shown, but the same effect can be obtained even if a sensor for measuring fluorescence or a thermocouple is used instead of the infrared temperature sensor. However, the measurement may be performed at a plurality of places instead of one place of the wafer. Further, instead of directly measuring the temperature of the wafer, a method of measuring the temperature at any place on the wafer susceptor and simulating the wafer temperature may be used. Such a semiconductor manufacturing apparatus is particularly effective for CVD and sputtering, which are film forming steps performed at a high temperature as described above.

(Third Embodiment) FIG. 3 is a third embodiment of the present invention, showing a detailed structure of a portion such as a dielectric insulating layer and a base for holding a wafer. As shown in the figure, in this embodiment, a plurality of types of dielectric insulating layers having different volume resistivities are combined to form a wafer holder. The volume resistivity ρ of each dielectric insulating layer is 10 ⁸ Ωcm <ρ <10 ¹³
It is set in the range of Ωcm. For example, the dielectric insulating layer 30 is used in the range of 100 ° C to 350 ° C, the dielectric insulating layer 31 is used in the range of 350 ° C to 500 ° C, and the dielectric insulating layer 32 is used in the range of 500 ° C to 700 ° C. The value of the volume resistivity ρ of each dielectric insulating layer is set so as to be possible. In this case, each dielectric insulating layer is the holding surface 3 of the wafer.
3 must be on the same plane, and the electrode plates 34 must be insulated from each other between different types of dielectrics. Further, the electrode plates 34 are provided by the number of the respective dielectric insulating layers.

Further, a switch group 36 for individually turning on and off is provided between the DC power source 35 and each electrode plate 34,
The power supply from the DC power supply 35 can be stopped for the electrode plate that exceeds the applicable temperature range. In addition, 3 in the figure
7 is a base.

(Fourth Embodiment) FIG. 4 shows a fourth embodiment of the present invention, which is a schematic view of a semiconductor manufacturing line. The diameter of the wafer is increasing year by year, and it is expected that the wafer will be 8 inches at present and 12 inches in the near future. At present, the so-called mechanical chuck method of mechanically clamping the wafer is mainly used for holding the wafer. As the diameter of the wafer becomes larger, the bending of the wafer becomes larger. Further, when some processes, for example, a film forming process and a heat treatment process are performed, an internal stress is generated in the film on the wafer and the wafer, and the bending becomes larger. That is, in the semiconductor manufacturing process, there are many factors that deform the wafer such as heat treatment and film formation, and the degree thereof becomes more severe as the diameter of the wafer increases.

For this reason, it is necessary to flatten and hold the wafer in order to perform high-precision processing corresponding to the miniaturization of elements. For example, if the wafer is bent during the exposure process, the focus will shift and exposure will not be successful, and during the ion implantation and etching processes, the wafer will be cooled and the wafer cooling efficiency will decrease due to the bending. Further, in the film forming process, the heating efficiency is lowered as already described. Therefore, in all dry processes except the wet cleaning process such as the exposure process, thermal oxidation / diffusion process, ion implantation process, etching process, and wiring process, if wafer holding inside the processing equipment is performed by electrostatic adsorption, a large diameter High-precision element processing suitable for semiconductor manufacturing is progressing. Also, by utilizing electrostatic attraction not only for holding the wafer in the process equipment but also for transferring the wafer, even if the diameter of the wafer is increased, the wafer can be transferred at high speed without dropping, and high throughput and high efficiency semiconductor Manufacture can be realized.

[0036]

As described above, according to the present invention, a single device can perform a plurality of processes in the thin film forming process, so that a semiconductor element can be efficiently manufactured. Further, since it becomes possible to hold all the wafers by electrostatic attraction, it is possible to obtain a semiconductor manufacturing line suitable for increasing the wafer size.

[Brief description of drawings]

FIG. 1 is a schematic configuration diagram of a semiconductor manufacturing apparatus according to a first embodiment of the present invention.

FIG. 2 is a schematic configuration diagram of a semiconductor manufacturing apparatus according to a second embodiment of the present invention.

FIG. 3 is a detailed configuration diagram of a wafer holder according to a third embodiment of the present invention.

FIG. 4 is a schematic diagram of a semiconductor manufacturing line in which the semiconductor manufacturing apparatus of the present invention is installed.

[Explanation of symbols]

 1 Wafer 2,30,31,32 Dielectric Insulating Layer 3,33 Wafer Holding Surface 4,34 Electrode Plate 5 Base 6 Heater 7 Heater Power Supply 8 Insulator 9,35 DC Power Supply 10 Conducting Part 11 Groove 12 Valve 13 Piping 14 Counter electrode 15 High-frequency power supply 16 Plasma region 17 Process chamber 18, 19 Earth 20 Sensor part 21 Temperature measuring device 22 Control device 23 Temperature controller 24 Controller 36 Switch group

Continuation of front page (51) Int.Cl. ⁶ Identification code Office reference number FI Technical display location H01L 21/22 511 H01L 21/22 511G 21/3065 21/302 C

Claims (7)

[Claims] 1. A vacuum container and a container housed in the vacuum container,
An insulating dielectric having an electrode plate on one surface and a wafer placed on the other surface, voltage applying means for applying a voltage between the electrode plate and the wafer, and heating means for heating the wafer. By applying a voltage by the voltage applying means, an electrostatic attraction force is generated between the electrode plate and the wafer to adsorb and hold the wafer on the surface of the insulating dielectric, and a semiconductor on the wafer. In a semiconductor manufacturing apparatus that performs a process for manufacturing an element, the insulating dielectric has a volume resistivity ρ within a range of 10 ⁸ Ωcm <ρ <10 ¹³ Ωcm in a heating temperature range for forming a thin film. Semiconductor manufacturing equipment characterized by entering. 2. A vacuum container, and a container housed in the vacuum container,
An insulating dielectric having an electrode plate on one surface and a wafer placed on the other surface, voltage applying means for applying a voltage between the electrode plate and the wafer, and heating means for heating the wafer. By applying a voltage by the voltage applying means, an electrostatic attraction force is generated between the electrode plate and the wafer to adsorb and hold the wafer on the surface of the insulating dielectric, and a semiconductor on the wafer. In a semiconductor manufacturing apparatus that performs a process for manufacturing an element, a control unit that detects the temperature of the wafer and controls the heating unit based on the detected temperature to adjust the heating temperature for the wafer is provided. In the heating temperature range for thin film formation, the volume resistivity ρ
Is within the range of 10 ⁸ Ωcm <ρ <10 ¹³ Ωcm. 3. A vacuum container and a container housed in the vacuum container,
An insulating dielectric having an electrode plate on one surface and a wafer placed on the other surface, voltage applying means for applying a voltage between the electrode plate and the wafer, and heating means for heating the wafer. By applying a voltage by the voltage applying means, an electrostatic attraction force is generated between the electrode plate and the wafer to adsorb and hold the wafer on the surface of the insulating dielectric, and a semiconductor on the wafer. In a semiconductor manufacturing apparatus that performs a process for manufacturing an element, the insulating dielectric has a volume resistivity ρ of 10 ⁸ Ωcm <ρ <10 ¹³ Ωc in a heating temperature range for forming a thin film.
A plurality of different dielectric insulating layers within the range of m are provided, and the electrode plate is attached to each of the dielectric insulating layers, and the voltage from the voltage applying means is individually applied to each of the dielectric insulating layers. A semiconductor manufacturing apparatus, characterized in that it is provided with means for applying to the semiconductor device. 4. The semiconductor manufacturing apparatus according to claim 1, wherein the dielectric insulating layer is silicon nitride (Si ₃ N ₄ ), beryllia (BeO), boron nitride (BN), Aluminum nitride (AlN), silicon oxide (SiO), alumina (Al
A semiconductor manufacturing apparatus characterized by being composed of nitride-based and oxide-based ceramics such as ₂ O ₃ ). 5. A semiconductor manufacturing system, wherein the semiconductor manufacturing apparatus according to claim 1 is installed as a CVD apparatus or a sputtering apparatus. 6. The semiconductor manufacturing apparatus according to claim 1 is installed in at least one of an exposure step, a thermal oxidation / diffusion step, an ion implantation step, an etching step and a wiring step. Semiconductor manufacturing system. 7. An insulating dielectric having an electrode plate on one surface and a wafer mounted on the other surface is housed in a vacuum container, and a voltage is applied between the electrode plate and the wafer. An electrostatic attraction force is generated between the electrode plate and the wafer to attract and hold the wafer on the surface of the insulating dielectric, and the wafer is heated to perform a process for manufacturing a semiconductor element on the wafer. In the semiconductor manufacturing method, as the insulating dielectric, the volume resistivity ρ has a value of 10 ⁸ Ωcm <ρ <10 ¹³ Ωc in a heating temperature range for forming a thin film.
A method for manufacturing a semiconductor, comprising using an insulating dielectric within a range of m, and heating the wafer at an arbitrary temperature within a range of 100 to 700 ° C. without exchanging the insulating dielectric.