JPH0981604A - Software/hardware cooperation design system and design method therefor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a software/hardware cooperation design system and the design method capable of efficiently finding the division of a software and a hardware for satisfying constraints provided beforehand. SOLUTION: Respective plural function blocks for which an operation description for describing the operation of a logic system is divided are analyzed and whether or not it is suitable for realization by the hardware is judged by a function block analysis and judgement means 113. The judged result (c) and the specified result of a software/hardware specifying means 107 are compared and a specified/judged result comparison means 115 clearly demonstrates the function block for which specifying different from the judged result (c) is performed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to designing a logical system composed of software and hardware.
The present invention relates to a software / hardware co-design system that supports simultaneous design of software and hardware.

[0002]

2. Description of the Related Art In the case of implementing a logical system, a method for implementing by a hardware or a method for implementing by a software using a general-purpose processor is generally used. However, since the LSI has become large-scaled with the development of the fine processing technology in recent years, the above two methods are often used together. In such a case, conventionally, a hardware part and a software part are first separated based on the experience of the designer, and then the hardware and the software are designed independently.

However, with this procedure, there is a high possibility that a mismatch with the constraints of the logical system provided in advance occurs at the stage where the overall image of the hardware has become concrete as the design progresses. If a mismatch occurs, change the function block realized by hardware to the realization by software to reduce the amount of hardware.Change the function block realized by software to the realization by hardware. It is necessary to change the division of software and hardware that was initially done based on the experience of the designer, such as to speed up the process, and in many cases, it will be necessary to restart the design from the beginning. . Therefore, there has been a problem that the design period becomes long.

In order to solve this problem, using the behavioral description describing the behavioral function of the logical system, the program size and the processing time for the software-separated portion and the behavioral description for the hardware-separated portion are used. As a result, by estimating the amount of hardware and processing time before designing, it is possible to repeatedly change the separation of software and hardware so that the estimation result satisfies the constraint of the logical system set in advance, and the constraint can be satisfied. A design procedure called software / hardware co-design is proposed in which the actual design is started only when it is confirmed.

According to this procedure, since the functional blocks realized by software and the functional blocks realized by hardware can be divided in advance so as to satisfy the constraints before the design is started, the design time can be reduced by re-designing as described above. The increase can be resolved.

However, in this procedure, when the division of software and hardware is changed so as to satisfy the constraint, the designer must change various combinations until the division that satisfies the constraint is found.
For example, if you want to reduce the amount of hardware, which function block is effective if you change from hardware to software, or if you want to increase the processing speed, which function block is effective when you change from software to hardware? Since it was not possible to judge that, the designer had to sequentially try all possible combinations, which was very inefficient.

[0007]

As described above,
The traditional design procedure, in which software and hardware are separated based on the experience of the designer, and then software and hardware are designed separately, may cause a mismatch with constraints at some advanced stage of the design. However, in many cases, it is necessary to redesign from the beginning, resulting in a problem that the design period becomes long.

On the other hand, after estimating the program size, the amount of hardware, and the processing time of each of the software part and the hardware part, and finding the division of the software and the hardware such that the estimation result satisfies the constraint, the software and the hardware are respectively separated. In the software / hardware co-design procedure of starting the design, there is no need to redo the design at a stage where the design has advanced to some extent as compared with the above-mentioned conventional procedure, so that there is an effect of shortening the design period, When deciding the separation from the hardware, all possible combinations have to be tried sequentially, so it takes time to decide the separation, and there is the problem of inefficiency in terms of design time.

Therefore, the present invention has been made in consideration of the above circumstances, and an object of the present invention is to efficiently find a division of software and hardware that satisfies a preset constraint. It is to provide a software / hardware co-design system and its design method.

[0010]

In order to achieve the above object, the present invention is a software / hardware co-design system for designing a logical system composed of software and hardware, which is composed of software and hardware. A behavioral description storage means for storing behavioral description describing the behavior of the logical system, a functional block division means for dividing the behavioral description stored in the behavioral description storage means into a plurality of functional blocks, and a plurality of the functional blocks. For each of them, software / hardware designating means for designating whether to implement by software or hardware, and program size and processing time are estimated for the functional block for which realization by software is designated. Hard for the functional blocks that are specified to be implemented And software / hardware estimate means to estimate the E A quantity and processing time, the software /
In a software / hardware co-design system having a constraint checking means for checking whether or not the estimation result of the hardware estimating means satisfies a preset constraint, the behavioral description of each of the plurality of functional blocks is analyzed, and Functional block analysis determining means for determining whether or not it is suitable for implementation by hardware, and comparing the determination result of the functional block analysis determining means with the designation result of the software / hardware designating means, and different from the determination result. It is characterized by comprising a designation / judgment result comparison means for clearly indicating the designated functional block.

The functional block analysis determining means is
It can be determined by whether or not the behavioral description of each functional block is suitable for hardware that performs pipeline processing, and whether it is suitable for hardware that performs parallel processing.

[0012]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a diagram showing an example of the configuration of a software / hardware co-design system according to an embodiment of the present invention.

The software / hardware co-design system 101 shown in FIG. 1 includes a behavioral description storage means 103 for storing behavioral description a which describes the behavior of a logical system composed of software and hardware, and a behavioral description storage means 103. Functional block dividing means 105 for dividing the behavioral description a stored in the above into a plurality of functional blocks, and software / hardware designation for designating whether each of the plurality of functional blocks is realized by software or hardware. Means 107 and software / hardware for estimating a program size and processing time for a functional block designated to be implemented by software, and estimating a hardware amount and processing time for a functional block designated to be implemented by hardware. Wear estimating means 1
09 and software / hardware estimating means 109
Constraint checking means 111 for checking whether or not the estimation result b satisfies the constraint set in advance, and outputting the check result e;
A functional block analysis determining unit 113 that analyzes the behavioral description a of each of the plurality of functional blocks and determines whether or not it is suitable to be implemented by hardware, a determination result c of the functional block analysis determining unit 113, and software /
It is composed of a specification / judgment result comparison means 115 that compares the specification result d of the hardware specification means 107 and outputs the comparison result f by clearly indicating the functional block that is designated differently from the judgment result c.

Next, the operation of the software / hardware co-design system according to the embodiment of the present invention will be described using a specific example of the behavioral description a with reference to the drawings. In addition,
FIG. 2 is a diagram showing an example of the behavioral description a shown in FIG.
It is composed of functional blocks 201, 202, and 203. FIG. 3 is a flowchart showing the procedure of software / hardware co-design according to the embodiment of the present invention.

In FIG. 3, first, the behavioral description storage means 1
03 stores the behavioral description a (step 1).

Next, the functional block dividing means 105 divides the behavioral description a stored in the behavioral description storing means 103 in step 1 into functional blocks 201, 202 and 203.
(Step 2).

Next, the software / hardware designating means 107 designates, for each of the functional blocks 201, 202 and 203 obtained by dividing the behavioral description a in step 2, whether it is implemented by software or hardware. . FIG. 4 is a diagram showing an example of a designation result regarding how to implement each of the functional blocks 201, 202, and 203. Here, the functional block 201 and the functional block 2
02 is realized by software, functional block 203
Specifies the implementation by hardware respectively
(Step 3).

Next, the software / hardware estimating means 109 estimates the program size and the processing time for the functional blocks 201 and 202 designated to be realized by software in step 3, while realizing by hardware. The hardware amount and the processing time are estimated for the functional block 203 designated as (step 4).

Next, the constraint checking means 111 performs step 4
It is checked whether or not the estimation result estimated by the software / hardware estimation means 109 in step 3 satisfies the constraint set in advance. If the estimation result satisfies the constraint, the software and hardware are determined based on the specification result in step 3. , Respectively, and the design of the desired logical system ends here. (Step 5).

Next, in step 5, when the estimation result does not satisfy the constraint, the function block analysis judging means 113
Is the functional block 201, 20 divided in step 2.
Analyze the behavioral description for each of 2, 203,
It is determined whether the description is suitable for the hardware. FIG.
It is a figure which shows an example of the determination result of whether realization by hardware is suitable about each of functional blocks 201, 202, and 203 (step 6). Note that this determination method will be described later.

Next, the designation / judgment result comparison means 115
In step 3, software / hardware designation means 10
7 is compared with the determination result (FIG. 4) performed by the functional block analysis determination means 113 in step 6 (FIG. 5), and the functional block that is designated differently from the determination result is specified. FIG. 6 is a diagram showing an example of a comparison result of the designation result shown in FIG. 4 and the determination result shown in FIG. 5 (step 7).
.

Finally, based on the comparison result shown in FIG. 6, the designation in step 2 is changed, and in step 5, steps 3 to 7 are repeated until the estimation result in step 4 satisfies the constraint (step 8). In addition,
This changing method will be described later.

Next, the determination method of step 6 will be described.

Regarding the functional block 201 shown in FIG. 2, first, the reference relation of variables is analyzed. It can be seen that the variables referring to the values are arrays data, aa, x, y, and the variables setting the values are arrays ilu, aa, x, y. It can also be seen that among these, x and y are used only as indexes of the array, and aa is used to temporarily hold a value from the order relation of setting / reference. As a result, the array data is regarded as the input of the functional block 201 and the array illu is regarded as the output.

Next, it is determined whether or not the description is suitable for the hardware based on the dependency relationship between the input and the output. D in one loop
data [x] [y], data [x] [y-1], da
Since the calculation is performed using three values of ta [x−1] [y] and the calculation is regular, it is determined that the description is suitable for hardware that performs pipeline processing. Further, since the output is calculated only from the input and the calculation for each loop is independent, it is determined that the description is suitable for hardware that performs parallel processing.

As described above, the functional block 201 is suitable for hardware that performs parallel processing or pipeline processing. At this time, as shown in FIG. 5, the determination result is displayed as "suitable". It

As for the functional block 202 shown in FIG. 2, as a result of analyzing the reference relation of variables, the array illu is input to the functional block, the array vi is output, and the variable dict has the reference first inside the loop and the setting later. Therefore, the calculation result of the previous loop is regarded as a variable that is temporarily stored for use in the calculation of the next loop. Il in one loop
The calculation is performed using the values of lu [m] [n], but in this case, since there is no regularity in the method of determining the values of m and n, it is determined that the description is not suitable for hardware that performs pipeline processing. . In addition, since the calculation result in the loop one time before is used by the variable dict, it is determined that the description is not suitable for the hardware that performs parallel processing because a dependency relationship occurs in each calculation. Therefore, the functional block 202 determines that the description is not suitable for hardware.

As described above, since the functional block 202 is not suitable for the hardware that performs the parallel processing and the pipeline processing, the determination result is displayed as "not suitable" as shown in FIG.

Similarly, regarding the functional block 203 shown in FIG. 2, as a result of analyzing the reference relation of variables, the array vi is input to the functional block 203, the array vo is output, the variable xd,
Since yd is also referenced inside the loop and set later, the calculation result of the previous loop is regarded as a variable that is temporarily stored for use in the calculation of the next loop. Since the calculation is performed using the values of vi [x] and vi [x-1] in one loop, it is determined that the description is suitable for the hardware that performs the pipeline processing because it is a rule. However, since the calculation result in the loop one time before is used by the variables xd and yd, it is determined that the description is not suitable for the hardware that performs parallel processing because a dependency relationship occurs in each calculation.

As described above, the functional block 203 is suitable for hardware that executes pipeline processing, and the determination result is displayed as "suitable" as shown in FIG.

Next, the designation changing method in step 8 will be described.

In FIG. 6, designation / judgment result comparison means 1
Function block 2 is a functional block 2 in which realization by software is specified in step 2 although it is determined in step 6 that realization by hardware is suitable.
01 is highlighted by highlighting. As a result, the designer changes the designation of the functional block realized by software and the functional block realized by hardware so as to satisfy the constraint.

For example, when the software / hardware designation shown in FIG. 4 does not satisfy the constraint because the processing time is too long, the hardware realization among the functional blocks 201 and 203 designated to be implemented by software is performed. The processing time can be shortened by changing the suitable functional block from software implementation to hardware implementation. In the past, the designer had to try by trial and error to find out how to change the designations for these two functional blocks to satisfy the constraint. However, in the present invention, the constraint shown in FIG. It is possible to efficiently find software / hardware designations.

Therefore, it is possible to shorten the processing time by changing the designation of the highlighted functional block 201. In this case, parallel processing or pipeline processing may be selected in consideration of the restrictions on the amount of hardware.

FIG. 7 is a functional block 201 shown in FIG.
It is a figure which shows another example of the specification result about the implementation | achievement method of each 202 and 203. Here, functional block 2
01, 202, and 203 respectively specify implementation by hardware.

FIG. 8 is a diagram showing an example in which the designated result shown in FIG. 7 and the judgment result shown in FIG. 5 are compared by the designation / judgment result comparing means 115, and the functional blocks designated differently from the judgment result are clearly shown. The function block 202 is highlighted because it is specified to be implemented by hardware even though the functional block 202 is not a description suitable for hardware.

For example, in the software / hardware designation shown in FIG. 7, it is assumed that the amount of hardware is too large to satisfy the constraint. In this case, the amount of hardware can be reduced by changing the function realized by hardware to the function realized by software. Therefore, see the display shown in FIG. By changing the implementation of 202 from hardware implementation to software implementation, the amount of hardware can be reduced without significantly affecting the processing time.

An example of hardware implementation of the functional blocks shown in FIG. 2 will now be described.

9 and 10 are diagrams showing an example of a logic circuit when the functional block 201 shown in FIG. 2 is realized by hardware. FIG. 9 is hardware for parallel processing, and FIG. 10 is pipeline processing. It shows the hardware for performing. 11 is a functional block 2 shown in FIG.
02 is a diagram showing an example of a logic circuit when it is realized by hardware, and FIG. 12 is a diagram showing an example of a logic circuit when the function block 203 shown in FIG. 2 is realized by hardware.

As is apparent from FIGS. 9 to 12, FIG.
The amount of hardware in the logic circuit for pipeline processing in FIG. 12 is small, but the amount of hardware in the logic circuit for parallel processing in FIG. Recognize.

On the other hand, a functional block realized by software requires a processor and a memory, but since it can be shared with other blocks, the hardware amount can be regarded as zero if ignored. In general, the processing time tends to be shorter in hardware than in software, in pipeline processing than in serial processing, and in parallel processing in parallel processing than pipeline processing.

Therefore, the operation time of the function block 201 and the function block 203 can be greatly shortened by implementing the hardware for pipeline processing or parallel processing. On the other hand, the operation of the functional block 202 is sequential, and even if it is realized by hardware, the processing time cannot be significantly shortened, and since the amount of hardware is large, it is suitable to be realized by software. .

[0044]

As described above in detail, according to the present invention, the behavioral description describing the behavior of the logical system is analyzed to determine whether each functional block is suitable for the hardware, and By comparison with the result specified by the user, the hardware implementation is specified regardless of the functional block or the description not suitable for the hardware, even though the description suitable for the hardware is specified. You can specify the function blocks that are in use. With this, when the constraint is not satisfied and the designation is changed, it is possible to easily determine which functional block the designation should be changed to effectively reduce the hardware amount or the processing time. For,
It becomes possible to specify the software and the hardware that satisfy the constraint without wasteful trial and error, and as a result, the design period can be shortened.

[Brief description of drawings]

FIG. 1 is a diagram showing a configuration of a software / hardware co-design system according to an exemplary embodiment of the present invention.

FIG. 2 is a diagram showing an example of a behavioral description a shown in FIG.

FIG. 3 is a flowchart showing a procedure of software / hardware co-design according to the embodiment of the present invention.

FIG. 4 is a functional block 201, 202, 20 shown in FIG.
It is a figure which shows an example of the designation | designated result about each 3 realization method.

5 is a functional block 201, 202, 20 shown in FIG.
It is a figure which shows an example of the determination result of whether realization by hardware is suitable about each of three.

6 is a diagram showing an example of a comparison result of the designation result shown in FIG. 4 and the determination result shown in FIG.

FIG. 7 is a functional block 201, 202, 20 shown in FIG.
It is a figure which shows another example of the designation | designated result about each 3 realization method.

8 is a diagram showing an example in which the designation result shown in FIG. 7 and the determination result shown in FIG. 5 are compared by a designation / judgment result comparing means 115, and functional blocks designated differently from the determination result are clearly shown.

9 is a diagram showing an example of a logic circuit when the functional block 201 shown in FIG. 2 is realized by hardware that performs parallel processing.

10 is a diagram showing an example of a logic circuit when the functional block 201 shown in FIG. 2 is realized by hardware that performs pipeline processing.

11 is a diagram showing an example of a logic circuit when the functional block 202 shown in FIG. 2 is realized by hardware.

FIG. 12 is a diagram showing an example of a logic circuit when the functional block 203 shown in FIG. 2 is realized by hardware.

[Explanation of symbols]

 101 software / hardware co-design system 103 behavior description storage means 105 functional block dividing means 107 software / hardware designating means 109 software / hardware estimating means 111 constraint checking means 113 functional block analysis determining means 115 designation / determination result comparing means 201 , 202, 203 functional blocks

Claims (2)

[Claims] 1. A software / hardware co-design system for designing a logical system composed of software and hardware, which stores an operation description describing the operation of the logical system composed of software and hardware. Description storage means, functional block dividing means for dividing the behavioral description stored in the behavioral description storage means into a plurality of functional blocks, and each of the plurality of functional blocks are implemented by software or hardware. Software / hardware designating means to specify whether or not, and the program size and processing time are estimated for the function block specified to be realized by software, and the hardware amount is calculated for the function block specified to be realized by hardware. And hardware / software to estimate processing time In the software / hardware co-design system, the software / hardware co-design system includes: a cost estimation unit; and a constraint inspection unit that inspects whether or not the estimation result of the software / hardware estimation unit satisfies a preset constraint. Analyze each behavior description,
A functional block analysis determining means for determining whether or not it is suitable for implementation in hardware, a determination result of the functional block analysis determining means and a designation result of the software / hardware designating means are compared, and the determination result is A software / hardware co-design system comprising: specification / judgment result comparison means that clearly indicates different functional blocks. 2. A first step of storing a behavioral description that describes the behavior of a logical system composed of software and hardware, and dividing the behavioral description stored in the first step into a plurality of functional blocks. A second step; a third step of designating whether each of the plurality of functional blocks divided in the second step is realized by software or hardware; and in the third step, software is executed. A fourth step of estimating a program size and a processing time for a functional block whose realization is specified by, and a hardware amount and a processing time of a functional block whose realization is specified by a hardware; A fifth step of inspecting whether or not the estimation result of the step 4 satisfies a preset constraint, and the fifth step If the estimation result does not satisfy the constraint in the inspection result at the step, is it appropriate to analyze the behavioral description of each of the plurality of functional blocks divided in the second step and realize the same in hardware? A sixth step of determining whether or not, a seventh step of comparing the determination result of the sixth step with the designation result of the third step, and clearly indicating a functional block designated different from the determination result. Changing the designation in the third step based on the comparison result of the step and the seventh step, until the estimation result of the fourth step in the fifth step satisfies a preset constraint. Software / hardware, characterized in that it comprises an eighth step of repeating the third step to the seventh step. Wear co-design method.