JPH0974557A - Decoder and mpeg video decoder - Google Patents

Abstract

PROBLEM TO BE SOLVED: To realize an MPEG video decoder simple in configuration and capable of avoiding overflow of a bit buffer without degrading picture quality at the time of a high speed reproduction. SOLUTION: A picture skip circuit 6 is connected to the side of a node 6a at the time of a normal reproduction and transfers each picture read from a bit buffer 2 as is to a decode core circuit 4. In the picture skip circuit 6, the connection to the side of each node 6a and 6b is switched in accordance with the controls of a picture header detection circuit 3 and a decision circuit 5, each picture read from the bit buffer 2 is thinned by a picture unit and the picture is transferred to the decode core circuit 4. Namely, when the picture skip circuit 6 is connected to the side of the node 6b, the picture read from the bit buffer 2 is skipped without being transferred to the decode core circuit 4.

Description

Detailed Description of the Invention

[0001]

The present invention relates to a decoder and an MP.
The present invention relates to an EG (Moving Picture Expert Group) video decoder.

[0002]

2. Description of the Related Art The information handled by multimedia is enormous and diverse, and it is necessary to process such information at high speed in order to put multimedia into practical use. In order to process information at high speed, data compression / decompression technology is indispensable. As such data compression / decompression technology, the “MPEG” method is exemplified. This MPEG system is based on the ISO (International Organization).
for Standardization) / IEC (Intarnational Elec)
trotechnical Commission)
It is being standardized by O / IEC JTC1 / SC29 / WG11).

[0003] MPEG is composed of three parts. Part 1 “MPEG System Part” (ISO / IEC
IS 11172 Part1: Systems) defines a multiplex structure (multiplex structure) of video data and audio data and a synchronization method. Part 2 "MPE
In the "G video part" (ISO / IEC IS 11172 Part2: Video), a high-efficiency encoding method of video data and a format of the video data are specified. Part 3, "MPEG
Audio Part ”(ISO / IEC IS 11172 Part3: Audio)
Defines a high-efficiency encoding method of audio data and a format of audio data.

[0004] The video data handled by the MPEG video part relates to a moving image, and the moving image is composed of several tens (eg, 30) frames (still images, frames) per second. Video data includes a sequence (Sequence), a GOP (Group Of Pictures), a picture, a slice (Slice), and a macro block (Macrob).
lock), and a block in order of 6 layers.

[0005] At present, MPEG-1 and MPEG-1 are mainly used due to differences in encoding rates.
-2. In MPEG-1, a frame corresponds to a picture. In MPEG-2, a frame or a field can correspond to a picture. Two fields constitute one frame. A structure in which a frame corresponds to a picture is called a frame structure, and a structure in which a field corresponds to a picture is called a field structure.

[0006] MPEG uses a compression technique called inter-frame prediction. Inter-frame prediction compresses data between frames based on temporal correlation. In the inter-frame prediction, bidirectional prediction is performed. The bidirectional prediction is to use both forward prediction for predicting a current reproduced image from a past reproduced image (or picture) and backward prediction for predicting a current reproduced image from a future reproduced image. .

[0007] This bidirectional prediction is based on an I-picture (Intra-Pi
), a P picture (Predictive-Picture), and a B picture (Bidirectionally predictive-Picture). The I picture is generated independently of a past or future reproduced image. The P picture is generated by forward prediction (prediction from a past I picture or P picture). B pictures are generated by bidirectional prediction. In bidirectional prediction, a B picture is generated by any one of the following three predictions. Forward prediction; prediction from past I or P pictures; backward prediction; prediction from future I or P pictures, bidirectional prediction; prediction from past and future I or P pictures. Then, these I, P, and B pictures are respectively encoded. That is, an I picture is generated even if there is no past or future picture. In contrast, a P picture is not generated without a past picture, and a B picture is not generated without a past or future picture.

In the inter-frame prediction, first, an I picture is periodically generated. Next, a frame several frames ahead of the I picture is generated as a P picture. This P
The picture is generated by one-way (forward) prediction from the past to the present. Subsequently, a frame located before the I picture and after the P picture is generated as a B picture. When generating this B picture, an optimal prediction method is selected from three of forward prediction, backward prediction, and bidirectional prediction. In general, in a continuous moving image, a current image and images before and after the current image are very similar, and only a part thereof is different. Then, the previous frame (for example, I
Assuming that the picture and the next frame (for example, a P picture) are the same, if there is a change between both frames, only the difference (B picture data) is extracted and compressed.
Thus, data between frames can be compressed based on temporal correlation.

A data string (bit stream) of video data encoded in accordance with the MPEG video part in this way is called an MPEG video stream (hereinafter abbreviated as video stream).

MPEG-1 is mainly used for video CDs.
(Compact Disc) and CD-ROM (CD-Read Only Memor
y)) and other storage media are used, and MPEG-2 is compatible with a wide range of applications including MPEG-1.

In the storage medium, the following three special reproduction functions are required. A function to play a video faster than normal playback speed (hereinafter referred to as high-speed playback).
A function to play a movie at a slower speed than the normal playback speed (hereinafter referred to as slow playback). A function to play a video one frame at a time (hereafter referred to as frame-by-frame playback). The fast playback function
For example, it is used when the user performs fast-forward playback to view a moving image in a short time, or when performing fast-forward playback or fast-forward reverse playback to search for a desired moving image. The low-speed playback function and the frame-by-frame playback function are used, for example, when the user carefully watches a moving image.

FIG. 8 shows a conventional MP having a high-speed playback function.
The principal block circuit of an EG video decoder is shown. MPE
The G video decoder 101 includes a bit buffer 102, a picture header detection circuit 103, an MPEG video decoding core circuit (hereinafter abbreviated as decoding core circuit) 104, a video stream skip circuit 105, and a control core circuit 10.
6.

The control core circuit 106 includes the circuits 102 to 10 respectively.
Control 5 The video stream read from the recording medium such as a video CD is transferred to the bit buffer 102 via the video stream skip circuit 105.

The bit buffer 102 is a FIFO (First-
In-First-Out (RAM) Random Access Memory (RAM)
The video stream transferred from the video stream skip circuit 105 is sequentially stored.

The picture header detection circuit 103 detects a picture header attached to the head of each picture of the video stream stored in the bit buffer 102. The control core circuit 106 reads out a video stream of one picture for each frame period from the bit buffer 102 based on the detection result of the picture header detection circuit 103. In MPEG-1, a moving image is composed of 30 frames (frames) per second, and one frame period is 1/30 second.

The decode core circuit 104 decodes each picture read from the bit buffer 102 in accordance with the MPEG video part and generates a video output for each picture. The video output is output to the display 107 provided outside the MPEG video decoder 101.

The bit buffer 102 is provided because the data amount of each picture of I, P and B is different. The data amount of I picture is about 30 kbytes,
The data amount of the P picture is about 10 to 15 kbytes, and the data amount of the B picture is 0 to about 6 kbytes. On the other hand, the bit rate RB of the video stream read from the recording medium during normal reproduction is constant. The decoding core circuit 104 performs decoding for each picture, and the decoding processing time differs depending on the data amount of each picture. Therefore, when the video stream read from the recording medium is directly transferred to the decode core circuit 104, some pictures cannot be decoded by the decode core circuit 104. In order to prevent this, by providing a bit buffer 102 as a buffer memory for the video stream read from the recording medium, I, P,
That is, the difference in the data amount of each B picture is absorbed.

The video stream skip circuit 105
During normal reproduction, it is connected to the node 105a side and transfers the video stream read from the recording medium to the bit buffer 102 as it is. In addition, during high-speed reproduction, the connection to the nodes 105a and 105b is switched according to the reproduction speed, and the video buffer read from the recording medium is intermittently bit-buffered according to the reproduction speed.
Transfer to That is, when the video stream skip circuit 105 is connected to the node 105b side, the video stream read from the recording medium is transferred to the bit buffer 10
It is skipped without being transferred to 2. As a result, the video stream transferred to the bit buffer 102 is thinned by the amount skipped by the video stream skip circuit 105.

As described above, the bit rate RB of the video stream read from the recording medium during normal reproduction
Is constant. Therefore, it is necessary to control the occupancy rate of the bit buffer 102 so that the bit buffer 102 does not overflow or underflow due to too much or too little data amount of the video stream for one picture. Therefore, in the MPEG video part, a virtual MPEG video decoder is assumed and the definition for it is made.

FIG. 9 shows changes in the occupied amount of the bit buffer 102 during normal reproduction. Bit buffer 10
The occupancy Bm of 2 increases with the bit rate RB as the slope of the graph. The bit rate RB is defined as shown in equation (1) according to the BR (Bit Rate) of the sequence header at the beginning of the sequence. The picture rate RP of the video stream read from the recording medium is defined by the PR (Picture Rate) of the sequence header. The capacity B of the bit buffer 102 is VBV (Vbv [Video Bufferring Verifie
r] Buffer Size) is defined as shown in equation (2). Then, for each frame period, the video stream for one picture to be decoded by the decode core circuit 104 at that time is read out from the bit buffer 102 at once. Here, the data amount X of the video stream read from the recording medium and input to the bit buffer 102 in one frame period is defined as shown in Expression (3) according to the bit rate RB and the picture rate RP. Therefore, the occupancy Bm (= B0 to B6) of the bit buffer 102 immediately after the video stream for one picture is read from the bit buffer 102 at once is based on the data amount X and the capacity B of the bit buffer 102.
It is defined so as to satisfy the condition shown in Expression (4).

RB = 400 × BR (1) B = 16 × 1024 × VBV (2) X = RB / RP (3) 0 <Bm <B−X = B− (RB / RP) (4) Bit buffer 10 so that the condition shown in equation (4) is satisfied.
If the occupancy Bm of 2 is specified, the bit buffer 1
02 does not overflow or underflow. Conversely, when the occupied amount Bm of the bit buffer 102 exceeds the threshold value (BX), it is extremely likely that the bit buffer 102 overflows due to the video stream input to the bit buffer 102 in the next one frame period. Become.

During normal reproduction, the bit rate RB and the picture rate RP are set so that the equation (4) is satisfied.
, And the respective values of the capacity B are specified. Therefore, equation (2)
If the capacity B of the bit buffer 102 is set as shown in, the bit buffer 102 will not overflow or underflow.

However, in the actual bit buffer 102,
In order to reliably prevent the overflow, the capacitance is set to a value obtained by adding the margin B in consideration of the decoding processing time of the decode core circuit 104 to the capacitance B shown in the equation (2). Normally, the margin α is set to a value similar to the data amount X shown in equation (3). For example, in the video CD, since the capacity B is defined as 46 kbytes and the data amount X is defined as 6 kbytes, the actual capacity of the bit buffer 102 is set to 52 k (= B + X = 46 k + 6 k) bytes.

During high speed reproduction, the bit rate of the video stream read from the recording medium increases with the reproduction speed. That is, when performing high-speed reproduction at a speed n times the normal reproduction speed, the bit rate of the video stream read from the recording medium is n times (= n × RB) the bit rate RB at the normal reproduction. Become.

However, as described above, since the capacity B of the bit buffer 102 is set corresponding to the normal reproduction, when the bit rate of the video stream becomes n × RB, the bit buffer 102 overflows. Become. Therefore, at the time of high speed reproduction, the video stream transferred to the bit buffer 102 is thinned by controlling the video stream skip circuit 105 as described above. As a result, the bit rate of the video stream transferred to the bit buffer 102 becomes substantially equal to the bit rate RB during normal reproduction, and overflow of the bit buffer 102 is avoided.

[0026]

The conventional MPEG video decoder 101 has the following problems. In normal reproduction, if the capacity B of the bit buffer 102 is set as shown in equation (2), the bit buffer 102 will not overflow in an ideal state. However, in an actual state, even if the capacity B of the bit buffer 102 is set as shown in Expression (2),
In the following cases, the bit buffer 102 may overflow.

(1) The bit rate RB of the video stream read from the recording medium is not synchronized with the bit rate of the video output, and the bit rate RB is larger than the bit rate of the video output.

(2) When the video stream read from the recording medium is not encoded according to the standard.
Since the bit buffer 102 is composed of a ring buffer, if it overflows, the video stream already stored in the bit buffer 102 will be overwritten with the newly input video stream. As a result, the video stream already stored in the bit buffer 102 is destroyed and lost.

For example, if the bit buffer 102 overflows during the decoding of an arbitrary picture in the decoding core circuit 104, a new input is made to the portion of the picture being decoded which remains in the bit buffer 102. The video stream is overwritten. As a result, the portion of the picture being decoded that remains in the bit buffer 102 is destroyed and lost. Then, the decoding core circuit 104 cannot complete the decoding of the picture, and cannot generate the video output of the picture.

As described above, P pictures cannot be generated without past pictures, and B pictures cannot be generated without past or future pictures. Only I pictures can be generated without past or future pictures. Therefore, when the picture being decoded at the time when the bit buffer 102 overflows is an I picture or a P picture, among the pictures of the video stream accumulated in the bit buffer 102, the picture next to the picture being decoded is It becomes impossible to decode all P pictures and B pictures up to the I picture read out. That is, in the decode core circuit 104, the bit buffer 1
The decoding process cannot be restarted until the next I picture is read from 02.

As described above, when the bit buffer 102 overflows, a large number of pictures cannot be decoded, so that frames dropped in a moving picture reproduced by those pictures occur. As a result, the motion of the moving image is not smooth and becomes jerky, and the image quality deteriorates, making it difficult to see.

During high speed reproduction, the control of the video stream skip circuit 105 is extremely complicated. Therefore, the control core circuit 106 that controls the video stream skip circuit 105 must be configured using a microcomputer. Therefore, the increase in cost and the increase in size of the entire device due to the provision of the microcomputer cannot be avoided.

Since the control of the video stream skip circuit 105 at the time of high speed reproduction is performed according to the reproduction speed, the video stream skipped from the node 105b side has nothing to do with the picture. Therefore, at the time of high-speed reproduction, the video stream transferred from the video stream skip circuit 105 to the bit buffer 102 includes a picture whose data has been interrupted in the middle, and the video stream accumulated in the bit buffer 102 is not recorded. It will be continuous.

When the video stream becomes discontinuous and the I picture or P picture is interrupted, all P pictures and B pictures until the next I picture is transferred to the bit buffer 102 can be generated. Disappear. In other words, during high-speed reproduction, the decode core circuit 104 can only decode I-pictures whose data is not interrupted.

The ratio of I pictures included in the video stream read from the recording medium is at most 1 to 2 /
Seconds. Therefore, during high-speed reproduction of 2 to 4 times, which is relatively slow, frames are dropped in a moving image reproduced by undecodable pictures, and only 1 to 2 frames / second can be displayed. As a result, it is possible to obtain only a very inferior moving image similar to the frame-advanced reproduction even though the high-speed reproduction is performed. In other words, the motion of the moving image is not smooth and becomes jerky, and the image quality is deteriorated, making it difficult to see.

For example, when a video CD is used as the recording medium, the track jump method is used. In this system, the optical pickup of the video CD player is made to scan between recording tracks (one round of the CD) of the video CD, and a certain amount of video stream is read and then jumping to another recording track is repeated. Then, if an I picture happens to be included in the video stream read from the video CD, the I picture is decoded. In this case, it is impossible to decode all I-pictures in the video stream read from the video CD, and some I-pictures that cannot be decoded occur. Only 1 to 0.5 frames / second can be displayed. In addition, the number of I pictures included in the video stream read at one time from the video CD is not constant (one I picture may not be read in some cases).
The interval between frames is not constant and only very bad moving images can be obtained.

However, in the video CD v2.0 standard, the I picture scan method is used. In this method, the information of the recording track in which the I picture is stored in the video stream is specified. That information is called "scan information". By controlling the optical pickup of the video CD player using this scan information, it becomes possible to decode all I pictures in the video stream read from the video CD. However, even in this case, as described above, during the relatively slow high speed reproduction of 2 to 4 times,
Only frames / second can be displayed.

By the way, in the picture, I, P,
In addition to the three types of B pictures, D pictures are specified. D picture is DCT (Discrete Cosine Tran)
It consists only of the DC (Direct Current) component of the form coefficient, and does not coexist in the same sequence as the I, P, and B pictures. This D picture is specified on the assumption that fast-forward playback or fast-forward reverse playback is performed when the user searches for a moving image to be viewed. However, since D picture is rarely included in the video stream, D picture
Even when high-speed playback is performed based on the picture,
During a relatively slow high speed reproduction of 2 to 4 times, the motion of the moving image is not smooth and the image quality is deteriorated.

The present invention has been made to solve the above problems and has the following objects. 1] To provide a decoder and an MPEG video decoder which can avoid overflow of a bit buffer and have a simple structure.

2) To provide an MPEG video decoder which is capable of smoothing the motion of a moving image during special reproduction to improve the image quality and avoiding overflow of a bit buffer, and having a simple structure.

3] An MPEG video decoder having a simple structure capable of smoothing the motion of a moving image during special reproduction to improve the image quality and avoiding overflow and underflow of a bit buffer is provided. To do.

[0042]

The gist of the present invention is to control the bit buffer so that it does not overflow.

The gist of the invention described in claim 2 is to control so that the occupied amount (Bm) of the bit buffer (2) does not exceed a predetermined threshold value (Bthn). According to the invention of claim 3, the occupancy of the bit buffer (2) (B
When m) exceeds a predetermined threshold value (Bthn), the gist is to skip data from the bit buffer until the occupied amount falls below the threshold value.

When the occupied amount (Bm) of the bit buffer (2) exceeds a predetermined threshold value (Bthn), data is read from the bit buffer until the occupied amount falls below the threshold value. The main point is to skip and perform normal decoding when the occupied amount does not exceed the threshold value.

According to a fifth aspect of the invention, a bit buffer (2), a decode core circuit (4) for decoding each picture read from the bit buffer in accordance with the MPEG video part, and the bit buffer occupation Quantity (Bm)
Determination threshold control circuit (5, 6,) that sets a threshold value (Bthn) of the bit buffer and skips the picture supplied from the bit buffer to the decoding core circuit until the occupancy amount falls below the threshold value. The point is to have 7) and.

According to the invention of claim 6, a bit buffer (2) for accumulating a video stream, and a decoding core circuit (4) for decoding each picture read from the bit buffer in accordance with the MPEG video part are provided. , Bit buffer occupancy (Bm) based on video playback speed
Determination threshold control circuit (5, 6,) that sets a threshold value (Bthn) of the bit buffer and skips the picture supplied from the bit buffer to the decoding core circuit until the occupancy amount falls below the threshold value. The point is to have 7) and.

The invention described in claim 7 includes a bit buffer (2) for accumulating a video stream, and a decoding core circuit (4) for decoding each picture read from the bit buffer in accordance with the MPEG video part. , Bit buffer occupancy (Bm) based on video playback speed
When the occupancy exceeds the threshold, the picture supplied from the bit buffer to the decoding core circuit is skipped until the occupancy falls below the threshold, and only the B picture is skipped. Then, the gist is that the determination control circuit (5, 6, 7) that does not skip the P picture and the I picture is provided.

The eighth aspect of the present invention is the MPEG video decoder according to any one of the fifth to seventh aspects, wherein the decision control circuit has a bit buffer occupancy amount after reading an I picture or a P picture. Even if the value is below the threshold, the gist is to skip if the next picture read from the bit buffer is a B picture.

According to a ninth aspect of the present invention, in the MPEG video decoder according to any one of the fifth to eighth aspects, the decision control circuit has a bit buffer occupation amount after reading an I picture or a P picture. When the first threshold value (B2thn) is exceeded, or after the P picture is read, the occupied amount of the bit buffer is the second threshold value (B3thn).
If the value exceeds, then the gist is to skip if the picture read from the bit buffer next is a B picture and set the first threshold value to a value higher than the second threshold value.

The invention described in claim 10 is the invention according to claims 5 to 9.
In the MPEG video decoder according to any one of the items 1 to 3, the type of each picture included in the video stream is detected and the data of each picture is detected before the video stream stored in the bit buffer is input to the bit buffer. A video stream analysis circuit (12) for analyzing the amount is provided, and the judgment control circuit determines a picture to be skipped based on the type of each picture included in the video stream analyzed by the video stream analysis circuit and the data amount of each picture. The main point is to make a selection.

The invention described in claim 11 is the invention according to claims 5 to 1.
The MPEG video decoder according to any one of 0, further comprising a frame buffer for storing a decoding result of each picture generated by the decoding core circuit, the inside of the frame buffer being a forward reference area, a backward reference area,
The gist is to divide the B picture storage area into three areas and use the B picture storage area as an extension memory of the bit buffer when skipping a B picture.

The invention described in claim 12 is the invention according to claims 5 to 1.
2. In the MPEG video decoder according to any one of 1, the decode core circuit is configured so that 2
One I picture or P picture is decoded, and the previously decoded I picture or P picture is treated as intermediate data for performing forward prediction or bidirectional prediction, and only the I picture or P picture decoded later is a reproduced picture. The point is to treat as.

The invention described in claim 13 is the invention according to claims 5 to 1.
The MPEG video decoder according to any one of 1, wherein a frame buffer that stores a decoding result of each picture generated by the decoding core circuit is provided, and the inside of the frame buffer is a forward reference area, a backward reference area,
The decoding core circuit is divided into three areas of a B picture storage area, and the decoding core circuit decodes two I pictures or P pictures within one frame period, and forward decoding or both of the previously decoded I pictures or P pictures is performed. The gist is to treat it as intermediate data for performing the direction prediction, store the intermediate data in the B picture storage area, and treat only the I picture or P picture decoded later as the reproduced picture.

The invention described in claim 14 is the invention according to claims 5 to 1.
3. In the MPEG video decoder according to any one of item 3, the threshold value or the first and second threshold values is a buffer size (Vbv Buffer Size) defined by a sequence header attached to the beginning of a sequence of a video stream.
) And bit rate (Bit Rate) and picture rate (Pic
(ture rate) and the ratio (n) of the actual reproduction speed to the normal reproduction speed.

According to the first aspect of the invention, overflow can be avoided by controlling the bit buffer so that it does not overflow. Claim 2
According to the invention described in (1), the bit buffer overflow can be avoided by controlling the occupied amount of the bit buffer so as not to exceed a predetermined threshold value.

According to the third or fourth aspect of the invention, by skipping the data from the bit buffer, overflow of the bit buffer can be avoided. Here, if the skipped data is in picture units, not only I pictures but also P pictures and B pictures are skipped.
It is also possible to decode the picture. As a result, dropped frames are reduced in the reproduced moving image, the moving image of the moving image is smoothed, and the image quality is improved and it is easy to see. According to the invention described in claim 4, normal decoding can be performed when the occupied amount does not exceed the threshold value.

According to the fifth aspect of the invention, the judgment control circuit sets the threshold value of the occupancy amount of the bit buffer, and the video stream is skipped from the bit buffer based on the threshold value, so that the overflow of the bit buffer is prevented. It can be avoided.

According to the sixth aspect of the present invention, the judgment control circuit sets a threshold value of the bit buffer occupancy based on the reproduction speed of the moving image, and based on the threshold value, the video stream is output from the bit buffer in picture units. By skipping, overflow of the bit buffer can be avoided. Since the video stream is skipped in units of pictures, it is possible to decode not only I pictures but also P pictures and B pictures. As a result, the motion of the moving image can be smoothed.

According to the seventh aspect of the present invention, by skipping a B picture of low importance, it is possible to avoid the overflow of the bit buffer and smooth the motion of the moving image.

According to the invention described in claim 8, by skipping the B picture in advance, it is possible to take preventive measures against the next overflow of the bit buffer.

According to the ninth aspect of the present invention, the threshold value (first threshold value) for the preventive measures for I pictures is set to a value higher than the threshold value (second threshold value) for preventive measures for P pictures. As a result, the precautionary measures for I pictures can be relaxed compared to those for P pictures. As a result, it is possible to reduce unnecessary skipping of B pictures, and it is possible to further smooth the motion of a moving image.

According to the tenth aspect of the present invention, the picture to be skipped can be optimally selected, and in particular, the unnecessary skip of the B picture can be reduced.

According to the eleventh aspect of the present invention, since all B pictures are skipped during high speed reproduction of 4 × speed or more, the capacity of the bit buffer is increased by the amount corresponding to the B picture storage area of the frame buffer. You can
As a result, it is possible to reliably avoid overflow of the bit buffer.

According to the twelfth aspect of the invention, the number of skipped P-pictures decreases and the number of decodable P-pictures increases. As a result, more B pictures can be decoded. Therefore, the motion of the moving image during high-speed reproduction can be further smoothed.

According to the thirteenth aspect of the present invention, since the B picture storage area of the frame buffer can be used for storing the intermediate data, it is not necessary to separately provide a frame buffer for storing the intermediate data.

According to the fourteenth aspect of the present invention, the threshold value or the first and second threshold values can be optimally set.

[0067]

BEST MODE FOR CARRYING OUT THE INVENTION

(First Embodiment) A first embodiment of the present invention will be described below with reference to FIGS.

FIG. 1 shows a block circuit of a main part of the MPEG video decoder of this embodiment having a high-speed reproduction function.
The MPEG video decoder 1 includes a bit buffer 2, a picture header detection circuit 3, an MPEG video decode core circuit (hereinafter abbreviated as a decode core circuit) 4, a variable threshold overflow judgment circuit (hereinafter abbreviated as a judgment circuit) 5, and a picture skip circuit. 6 and the control core circuit 7. The circuits 3 to 7 are mounted on a 1-chip LSI.

The control core circuit 7 controls the circuits 2 to 6. A video stream read from a recording medium such as a video CD is transferred to the bit buffer 2.

The bit buffer 2 is a RAM having a FIFO structure.
It is composed of a ring buffer composed of the following and sequentially stores the transferred video stream as it is. The bit buffer 2 is provided to absorb the difference in the data amount of each picture of I, P, and B, as in the case of providing the bit buffer 102 in the conventional MPEG video decoder 101. .

The picture header detection circuit 3 detects the picture header at the beginning of each picture in the video stream stored in the bit buffer 2, and detects the picture type (I, P, B) specified in each picture header. ) Is detected.

The control core circuit 7 reads an appropriate video stream for each frame from the bit buffer 2 based on the detection result of the picture header detection circuit 3 and the determination result of the determination circuit 5 described later. The video stream read from the bit buffer 2 remains in the bit buffer 2 even after being read.

Each picture read from the bit buffer 2 is transferred to the decode core circuit 4 via the picture skip circuit 6. The decode core circuit 4 decodes each picture in accordance with the MPEG video part and generates a video output for each picture. The video output is
It is output to the display 8 provided outside the MPEG video decoder 1.

The picture skip circuit 6 is switched between the nodes 6a and 6b under the control of the control core circuit 7. Then, when the picture skip circuit 6 is connected to the node 6a side, the picture read from the bit buffer 2 is transferred to the decode core circuit 4 as it is. When connected to the node 6b side, the picture read from the bit buffer 2 is skipped without being transferred to the bit buffer 2. As a result, the picture transferred to the decode core circuit 4 is the picture skip circuit 6
The skipped portion is thinned out in picture units.

The determination circuit 5 determines the threshold value Bth of the occupied amount Bm of the bit buffer 2 based on the reproduction speed designated from the outside.
n is set, the occupancy Bm of the bit buffer 2 and the threshold Bth are set.
Compare with n. The external reproduction speed is specified by a magnification n with respect to the normal reproduction speed. For example, when reproducing at 2 × speed, the magnification is n = 2, and the threshold value Bthn =
It becomes Bth2. Further, during normal reproduction, the magnification n = 1 and the threshold Bthn = Bth1.

Then, the decision circuit 5 uses the bit buffer 2
If the occupied amount Bm of the bit buffer 2 does not exceed the threshold value Bthn, it is determined that the bit buffer 2 is normal without fear of overflow. In this case, the control core circuit 7 reads the video stream for one picture from the bit buffer 2. Then, the control core circuit 7 connects the picture skip circuit 6 to the node 6a side and transfers the picture read from the bit buffer 2 to the decode core circuit 4.

Further, the judging circuit 5 judges that the bit buffer 2 may overflow when the occupied amount Bm of the bit buffer 2 exceeds the threshold value Bthn. In this case, the control core circuit 7 reads a video stream of an appropriate picture from the bit buffer 2 until the occupied amount Bm of the bit buffer 2 falls below the threshold value Bthn. Then, the control core circuit 7 connects the picture skip circuit 6 to the node 6b side, and skips all video streams of appropriate pictures read from the bit buffer 2.

FIG. 2 shows changes in the occupied amount Bm of the bit buffer 2 in this embodiment. As described above, the occupied amount Bm of the bit buffer 2 at the time of normal reproduction increases with the bit rate RB as the slope of the graph.

In the MPEG video decoder 1 of this embodiment, as in the conventional MPEG video decoder 101, the bit rate RB, the picture rate RP, and the capacity are set so that the expression (4) is satisfied during normal reproduction. B
Each value of is specified. That is, if the capacity B of the bit buffer 2 is set as shown in Expression (2), even if the connection of the picture skip circuit 6 is fixed to the node 6a side, the bit buffer 2 is ideally set. Does not overflow or underflow.

Therefore, during normal reproduction, the occupied amount Bm (= B0 to B4) immediately after the data for one picture is read from the bit buffer 2 at once is calculated by the equation (5) based on the threshold value Bth1. It is specified to meet the conditions shown. In addition, the threshold value Bth1 is calculated based on the equation (4) by the equation (6)
It is set as shown in.

0 <Bm <Bth1 <B (5) Bth1 = B−X = B− (RB / RP) (6) By the way, in the actual state, as shown in the formula (2), Even if the capacity B of the bit buffer 2 is set, if the connection of the picture skip circuit 6 is fixed to the node 6a side,
In the cases (1) and (2), the bit buffer 2 may overflow.

However, in this embodiment, when the occupied amount Bm of the bit buffer 2 exceeds the threshold value Bth1 during normal reproduction, it is determined that the bit buffer 2 may overflow. Then, until the occupancy Bm of the bit buffer 2 falls below the threshold value Bth1, the bit buffer 2
A video stream for an appropriate picture is read from. Then, the picture skip circuit 6 is connected to the node 6b side, and all the video streams of appropriate pictures read from the bit buffer 2 are skipped. Therefore, according to the present embodiment, during normal reproduction, the bit buffer 2 does not overflow even in the cases (1) and (2).

The occupied amount Bm of the bit buffer 2 at the time of high speed reproduction increases with the bit rate n × RB as the slope of the graph. For example, the occupied amount Bm of the bit buffer 2 at the time of double speed reproduction increases with the bit rate 2 × RB as the slope of the graph.

Therefore, at the time of high speed reproduction, the occupied amount Bm (= B0 to B4) immediately after the data for one picture is read from the bit buffer 2 at once is shown in the equation (7) based on the threshold value Bthn. It is prescribed to meet the conditions. Note that the threshold value Bthn is set as shown in Expression (8).

0 <Bm <Bthn (7) Bthn = B−n × X = B− (n × RB / RP) (8) The occupied amount Bm of the bit buffer 2 during high speed reproduction
Is greater than the threshold value Bthn, it is determined that the bit buffer 2 may overflow. For example, during double speed reproduction, the occupied amount Bm is equal to the threshold value Bth2 (= B- (2 * RB
/ RP)) is exceeded, the occupancy Bm during triple speed playback
Exceeds the threshold value Bth3 (= B- (3 * RB / RP)), it is determined that the bit buffer 2 may overflow. Then, the occupied amount B of the bit buffer 2
A video stream for an appropriate picture is read from the bit buffer 2 until m falls below a threshold value Bthn, and the video stream is skipped. Therefore, according to the present embodiment, the bit buffer 2 does not overflow during high-speed reproduction even in the case of (2) above.

If the bit buffer 2 overflows while the decoding core circuit 4 is decoding an arbitrary picture, a newly input video stream is supplied to the portion of the picture being decoded which remains in the bit buffer 2. Is overwritten. As a result, the portion of the picture being decoded that remains in the bit buffer 2 is destroyed and lost. Then, the decoding core circuit 4 cannot complete the decoding of the picture, and cannot generate the video output of the picture. Therefore, it is absolutely necessary to prevent the bit buffer 2 from overflowing while the decode core circuit 4 is decoding an arbitrary picture.

Therefore, it is necessary to determine whether or not the bit buffer 2 may overflow before the decoding core circuit 4 starts decoding an arbitrary picture. More precisely, when the picture header detection circuit 3 detects a picture header, it is determined whether or not the bit buffer 2 may overflow, and whether or not the picture is skipped via the picture skip circuit 6 is determined. There is a need to.

By the way, the data amount of one picture is 0.
Although it is up to 40 bytes, the data amount cannot be known until the decoding is completed in the decoding core circuit 4. The decoding processing time for one picture varies depending on the data amount of the picture and the operation speed of the decoding core circuit 4, but is usually 1/3 to 3 / of one frame period.
It is about 4.

When the data amount of the picture read from the bit buffer 2 is 0 byte, the occupied amount Bm of the bit buffer 2 does not change before and after the reading of the picture, and therefore overflow is avoided even if the picture is skipped. It is not possible. Conversely, even if the data amount of the picture read from the bit buffer 2 is 0 bytes, overflow does not occur if the bit buffer 2 has sufficient free space.

Therefore, a free space corresponding to the data amount of the video stream read from the recording medium and input to the bit buffer 2 in one frame period is secured in the bit buffer 2. Then, even if the data amount of the picture read from the bit buffer 2 is 0 byte, overflow does not occur.

The data amount of the video stream read from the recording medium and input to the bit buffer 2 in one frame period is (n × X = n × RB / RP). If the free space of the bit buffer 2 is more than this data amount, it will not overflow. Therefore, if the threshold value Bthn is set as shown in Expression (8), overflow of the bit buffer 2 can be reliably avoided.

That is, the decision circuit 5 checks the free space of the bit buffer 2 at the time when the picture header detection circuit 3 detects the picture header, and determines the sufficient free space (n
XX = nxRB / RP) is determined. If sufficient free space is not secured, the picture read by the control core circuit 7 from the bit buffer 2 based on the picture header is skipped via the picture skip circuit 6. Subsequently, the determination circuit 5 checks the free capacity of the bit buffer 2 again when the picture header detection circuit 3 detects the next picture header. Since the time required for these processes is much shorter than the decoding process time of the decode core circuit 4, it is sufficient to start the decoding process of the decode core circuit 4 after the bit buffer 2 has sufficient free space. Be in time.

By the way, the bit buffer 2 may underflow when the picture header detection circuit 3 detects a picture header or after the decoding core circuit 4 starts decoding. In this case, as long as the video stream read from the recording medium is input to the bit buffer 2, the video stream for one picture may be sequentially read from the bit buffer 2, so there is no particular problem.

As described in detail above, according to this embodiment,
The following effects can be obtained. At the time of normal reproduction, overflow of the bit buffer 2 can be avoided including the cases shown in (1) and (2) above.

At the time of high speed reproduction, overflow of the bit buffer 2 can be avoided including the case shown in (2) above. By providing the determination circuit 5 and the picture skip circuit 6, it is possible to avoid the overflow of the bit buffer 2 without providing the video stream skip circuit 105 unlike the conventional MPEG video decoder 101. Since the control of the determination circuit 5 and the picture skip circuit 6 is simple as described above, the control core circuit 7
Does not need to be configured using a microcomputer.
The circuits 3 to 7 are mounted on a 1-chip LSI. Therefore, according to this embodiment, unlike the conventional example, the cost does not increase and the size of the entire apparatus does not increase.

The video stream skipped from the node 6b side of the picture skip circuit 6 is in picture units. Therefore, the data is not interrupted in the middle of the picture transferred to the decode core circuit 4. Therefore,
The decode core circuit 4 can decode not only I pictures but also P pictures and B pictures. As a result, dropped frames in the moving image reproduced on the display 8 are reduced. Therefore, it is possible to display several frames / second during high-speed reproduction, which is relatively slow at 2 to 4 times.
Therefore, the motion of a moving image during high-speed playback can be smoothed, and the image quality can be greatly improved.

(Second Embodiment) Next, a second embodiment of the present invention will be described with reference to FIGS. The structure of the MPEG video decoder of this embodiment is the same as that of the first embodiment. In this embodiment, the two threshold values B2thn and B3thn are set so as to satisfy the formula (9). The values of the thresholds B2thn and B3thn are the first
It is set according to the playback speed as in the embodiment,
The image quality of the moving image reproduced on the display 8 may be actually examined and set appropriately.

0 <B3thn <B2thn <B (9) The decision circuit 5 compares the occupancy amount Bm of the bit buffer 2 with the respective threshold values Bthn and B2thn, and the occupancy amount Bm is expressed by equations (10) to.
It is determined which area is included in (12).

Bm <B3thn (10) B3thn <Bm <B2thn (11) B2thn <Bm (12) The decision circuit 5 determines the bit buffer 2 of the bit buffer 2 as shown in equation (10). When the occupied amount Bm does not exceed the threshold value B3thn, it is determined that the bit buffer 2 is normal without fear of overflow. In this case, the control core circuit 7 reads the video stream for one picture from the bit buffer 2. Then, the control core circuit 7 connects the picture skip circuit 6 to the node 6a side and transfers the picture read from the bit buffer 2 to the decode core circuit 4.

The determination circuit 5 has the following formula (12):
When the occupancy Bm of the bit buffer 2 exceeds the threshold value B2thn and does not exceed the threshold value Bthn, if the picture read from the bit buffer 2 is an I picture or a P picture, the first flag is set. Further, as shown in the equation (11), when the occupied amount Bm of the bit buffer 2 exceeds the threshold value B3thn and does not exceed the threshold value B2thn, the bit buffer 2
If the picture read from is a P picture, a second flag is set. When the first or second flag is set, the control core circuit 7 is
If the picture read from the bit buffer 2 is a B picture, the picture skip circuit 6 is connected to the node 6b side to skip the picture.

FIG. 3 shows a change in the occupied amount Bm of the bit buffer 2 in this embodiment. Occupancy Bm is threshold B3t
If it exceeds hn, if the picture read from the bit buffer 2 is a B picture, the picture is skipped without decoding (figure * 1). Here, even if the occupied amount Bm still exceeds the threshold value B3thn after the B picture is skipped, if the next picture read from the bit buffer 2 is an I picture or a P picture, it is decoded (* 2 in the figure).

Even if the occupied amount Bm exceeds the threshold value B3thn, if the picture read from the bit buffer 2 is an I picture or a P picture, it is decoded (see *
3). Here, if the occupied amount Bm still exceeds the threshold value B3thn after the decoding of the I picture or P picture, if the next picture read from the bit buffer 2 is a B picture, it is skipped without decoding (illustration *
4). This B picture skip is repeated until the occupied amount Bm falls below the threshold value B3thn (* 5 in the figure).

When the occupied amount Bm exceeds the threshold value B2thn and the picture read from the bit buffer 2 is an I picture or a P picture, the decision circuit 5 sets a first flag (* 6 in the figure). When the first flag is set and the picture read next from the bit buffer 2 is a B picture, the B picture is skipped even if the occupancy Bm is below the threshold B3thn (shown in the figure *
7).

The occupied amount Bm exceeds the threshold value B3thn and the threshold value B3
If it does not exceed 2thn and the picture read from the bit buffer 2 is a P picture, the determination circuit 5 sets a second flag (* 8 in the figure). When the second flag is set and the picture read next from the bit buffer 2 is a B picture, the B picture is skipped even if the occupancy Bm is below the threshold value B3thn (*
9).

The occupation amount Bm exceeds the threshold value B3thn and the threshold value B3
If it does not exceed 2thn, and the picture read from the bit buffer 2 is an I picture, the decision circuit 5 outputs the second picture.
Flag is not set (figure * 10). If the second flag is not set and the occupied amount Bm is below the threshold value B3thn, decoding is performed even if the next picture read from the bit buffer 2 is a B picture.

As described in detail above, according to this embodiment,
In addition to the effects of the first embodiment, the following effects can be obtained. When the occupied amount Bm of the bit buffer 2 exceeds the threshold value B3thn and does not exceed the threshold value Bthn, the I picture and the P picture are decoded as much as possible, and the B picture is preferentially skipped.

Since the B picture is generated by bidirectional prediction, its importance is lower than that of the I picture and P picture. Therefore, by skipping B-pictures of low importance with priority, it is possible to reduce the number of dropped frames in the moving image reproduced on the display 8 as compared with the first embodiment. As a result, the motion of the moving image during high-speed playback can be further smoothed, and the image quality can be further improved.

By setting the first flag, the bit buffer 2 is decoded after the I picture or P picture is decoded.
Even if the occupancy amount Bm of the B buffer falls below the threshold value B3thn, the B picture read next from the bit buffer 2 can be skipped in advance with a margin. Further, by setting the second flag, even if the occupied amount Bm of the bit buffer 2 is below the threshold value B3thn after the P picture is decoded, the B picture read next from the bit buffer 2 is skipped in advance with a margin. You can

In this way, skipping a B picture in advance is nothing but taking precautions against the next overflow of the bit buffer 2. Therefore, the overflow of the bit buffer 2 can be more reliably avoided.

The data amount of the I picture is as large as 2-3 times that of the P picture. Therefore, the degree of decrease in the occupied amount Bm of the bit buffer 2 is larger when the I picture is read than when the P picture is read. Therefore, it is less likely that the bit buffer 2 will overflow after the I-picture is read than after the P-picture is read. Therefore, by setting the first and second flags, I picture and P
The above-mentioned precautionary measures differ from the picture. That is, I
By setting the threshold B2thn of the preventive measure for the picture to a value higher than the threshold B3thn of the preventive measure for the P picture, the preventive measure for the I picture can be loosened as compared with that of the P picture. As a result, unnecessary skips of B pictures can be reduced.

When the video stream having the GOP structure (arrangement of picture types) shown in a) and b) below is read from the recording medium, the effect of the present embodiment at the time of high speed reproduction is simulated. The results shown were obtained.

A) IBPBPBPBP ... b) IBBPBBPBBPBBPBBIBP ... [1] During double speed reproduction; In the case of a), all I pictures and P pictures can be decoded, and as a result, 30 frames / second full rate Can be displayed with. In the case of b), all of the I and P pictures and a part of the B picture can be decoded, and as a result, they can be displayed at 25 frames / second or more.

[2] During 4 × speed reproduction; a) and b), I picture and 3 to 4 P pictures following it can be decoded, and as a result, it can be displayed at 15 frames / second or more. (Third Embodiment) Next, a third embodiment of the present invention will be described with reference to FIG. In this embodiment,
The same components as those in the first embodiment have the same reference numerals, and a detailed description thereof will be omitted.

FIG. 4 shows a block circuit of a main part of the MPEG video decoder of this embodiment having a special reproduction function (high speed reproduction function, low speed reproduction function, frame advance reproduction function). In addition to the circuits 2 to 7 of the MPEG video decoder 1 of the first embodiment, the MPEG video decoder 11 of the present embodiment includes a picture header detection / data amount analysis circuit (hereinafter abbreviated as analysis circuit) 12, a register 13, It is composed of 14. Each of the circuits 3 to 7 and 12 to 14 is an L chip of one chip.
It is installed in SI.

The control core circuit 7 includes circuits 2 to 6 and 12 to 1 respectively.
Control 4 The video stream read from the recording medium such as a video CD is transferred to the bit buffer 2 via the analysis circuit 12.

The analysis circuit 12 has the following two functions. The picture header at the beginning of each picture of the video stream read from the recording medium is detected, and the picture type (I, P, B) specified in each picture header is detected. The data amount of each detected picture is analyzed.

Each of the registers 13 and 14 is an R having a FIFO structure.
Composed of AM. The register 13 sequentially stores the type of each picture detected by the analysis circuit 12. That is, the GOP structure of the video stream accumulated in the bit buffer 2 is recorded in the register 13.

The register 14 sequentially stores the data amount of each picture analyzed by the analysis circuit 12. The determination circuit 5 is
It has the following two functions. Similar to the second embodiment, the occupied amount Bm of the bit buffer 2 and each threshold value B2th
Comparing n and B3thn, the occupancy Bm is calculated from the equations (10) to (1
It is determined which area is included in 2). A picture to be skipped is selected based on the GOP configuration recorded in the register 13, the data amount of each picture recorded in the register 14, and the above determination result.

In the first and second embodiments, the GOP structure of the video stream and the data amount of each picture cannot be known until the decoding is completed in the decoding core circuit 4.

However, in this embodiment, by providing the analysis circuit 12, it is possible to analyze the GOP structure and the data amount of each picture before inputting the video stream to the bit buffer 2. That is, it is possible to determine whether or not the bit buffer 2 may overflow before the video stream is input to the bit buffer 2. Therefore, GO of the video stream
The picture to be skipped can be optimally selected according to the P configuration and the data amount of each picture. As a result, in particular, unnecessary skipping of B pictures can be minimized.

As described in detail above, according to this embodiment,
In addition to the effects of the second embodiment, the following effects can be obtained. The number of B pictures that can be decoded increases while avoiding the overflow of the bit buffer 2. Therefore, it is possible to further smooth the motion of the moving image during high-speed reproduction and further improve the image quality.

Since the number of pictures accumulated in the bit buffer 2 and the data amount of each picture can be grasped, the occupation amount Bm of the bit buffer 2 can be accurately known. It is also possible to accurately know the degree of decrease in the occupied amount Bm of the bit buffer 2 after an arbitrary picture is read.

In general, the bit rate of the video stream read from the recording medium at the time of low speed reproduction or frame advance reproduction is the same as that at the time of normal reproduction. That is, during low-speed reproduction or frame-by-frame reproduction, the number of pictures read from the bit buffer 2 per unit time is reduced to reduce the number of frames of a moving image reproduced on the display 8. However, as described above, the conventional MP
In the EG video decoder 101, the degree of decrease in the occupied amount Bm of the bit buffer 2 after an arbitrary picture has been read out is unknown. Therefore, in order to avoid overflow or underflow, the video stream is read from the recording medium and transferred to the bit buffer 2 each time a picture is read from the bit buffer 2. Therefore, the operation of reading the video stream from the recording medium has to be frequently repeated. For example, when a video CD is used as a recording medium, if the video stream is frequently read from the video CD, the control of the drive device of the optical pickup of the video CD player becomes complicated and the mechanical load on the drive device is increased. Also becomes larger and more prone to failure.

In the present embodiment, since the degree of decrease in the capacity of the bit buffer 2 after an arbitrary picture is read can be accurately known, only when the possibility of overflow or underflow becomes high. The video stream may be read from the recording medium. Therefore, according to the present embodiment, it is possible to reduce the operation of reading the video stream from the recording medium during the low speed reproduction or the frame advance reproduction. Therefore, when a video CD is used as a recording medium, the drive of the optical pickup of the video CD player can be easily controlled, and the mechanical load on the drive can be reduced to reduce failures.

(Fourth Embodiment) Next, a fourth embodiment of the present invention will be described with reference to FIG. In the present embodiment, the same components as those in the third embodiment are designated by the same reference numerals, and detailed description thereof will be omitted.

FIG. 5 shows a block circuit of a main part of the MPEG video decoder of this embodiment having a special reproduction function.
The MPEG video decoder 21 of the present embodiment includes the circuits 2 to 7 and 1 of the MPEG video decoder 11 of the third embodiment.
In addition to 2 to 14, it is composed of a frame buffer 22.

The control core circuit 7 includes circuits 2 to 6 and 12 to 1.
4 and 22 are controlled. The decoding result (video output) of each picture generated by the decoding core circuit 4 is transferred to each area 22a to 22c of the frame buffer 22. Further, the decoding result of each picture read from each area 22 a to 22 c of the frame buffer 22 is transferred to the decoding core circuit 4.

The frame buffer 22 is composed of RAM,
The inside is divided into three areas (a front reference area 22a, a rear reference area 22b, and a B picture storage area 22c). The forward reference area 22a stores a decoding result (video output) of a future I picture or P picture used when performing backward prediction in the decode core circuit 4. The backward reference area 22b stores a decoding result of a past I picture or P picture used when performing forward prediction in the decoding core circuit 4.
A B picture decoding result is stored in the B picture storage area 22c. Then, the video output stored in any one of the areas 22a to 22c is output to the display 8.

Frame buffer 22 and bit buffer 2
Means that the number of parts is reduced and the MPEG video decoder 1
In order to reduce the cost of 1, the area is provided separately in one RAM. By the way, the front reference area 22a
Since the I picture or P picture stored in the backward reference area 22b is used as basic data for performing forward prediction or backward prediction, it must be stored in each area 22a, 22b until it is no longer needed. I won't. Since the B picture is not treated as the basic data, it is useless if it is output to the display 8.
The areas 22a to 22c are called planes.

When the MPEG video decoder and the MPEG audio decoder are mounted on one LSI, the bit buffer (audio bit buffer) for the MPEG audio decoder is also the frame buffer 22 and the bit buffer for the MPEG video decoder. (Video bit buffer) 2 and one RAM are provided in separate areas. For example, when a video CD is used as the recording medium, 4M DRAM is used, the capacity of the video bit buffer 2 is 52 kbytes, and the capacity of each of the areas 22a to 22c of the frame buffer 22 is 14 respectively.
The size of the audio bit buffer is set to 8.5 kbytes, the capacity of the audio bit buffer is set to 6.5 kbytes, and the capacity of the user area is set to 8 kbytes. By the way, the user area is a video CDv
Used as a 2.0 standard sector buffer.

At the time of high-speed reproduction of 4 × speed or more, decoding of I-pictures and P-pictures makes it possible to obtain a moving picture with a sufficiently smooth motion, so that all B-pictures can be skipped.

In addition, at the time of high speed reproduction of 8 times speed or more,
Since a moving image with a sufficiently smooth motion can be obtained only by decoding the I picture, it is possible to skip all P pictures and B pictures.

As described above, the B picture storage area 22 of the frame buffer 22 is used during the high speed reproduction of 4 × speed or more.
c becomes unnecessary. In view of this, in the present embodiment, the B picture storage area 22c of the frame buffer 22, which is no longer needed, is used as the bit buffer 2 during high speed reproduction of 4 × speed or higher. That is, the B picture storage area 22c of the frame buffer 22 is used as an extension memory of the bit buffer 2. As a result, in the case of the above-described 4MDRAM, the capacity of the bit buffer 2 can be increased to about 200 kbytes (= the original capacity of the bit buffer 2 52 k + the capacity of the B picture storage area 22c 148.5 k), which is about four times the conventional capacity. it can.

As described in detail above, according to this embodiment,
In addition to the effects of the third embodiment, the following effects can be obtained. It is possible to reliably avoid overflow of the bit buffer 2 even during high-speed reproduction of 4 × speed or more.

When the capacity of the bit buffer 2 was set to about 200 kbytes, a simulation of the effect at the time of high speed reproduction of this embodiment was confirmed, and it was confirmed that a moving image with smooth motion up to about 30 times speed reproduction could be obtained.

(Fifth Embodiment) Next, a fifth embodiment of the present invention will be described with reference to FIGS. The structure of the MPEG video decoder of this embodiment is the same as that of the fourth embodiment.

The decode core circuit 4 has a capability of decoding two I pictures or P pictures in accordance with the MPEG video part within one frame period and generating a video output for each picture. Then, when the decoding core circuit 4 decodes two I pictures or P pictures within one frame period, the video output of the previously decoded I picture or P picture is not output to the display 8 but is decoded later. I picture or P
Only the video output of the picture is output to the display 8. That is, only the I picture or P picture decoded later is treated as a reproduced picture. The previously decoded video output of the I picture or P picture is treated as intermediate data used when performing forward prediction.

As described above, the B picture storage area 22c of the frame buffer 22 becomes unnecessary during high speed reproduction of 4 × speed or more. In view of this, in the present embodiment, during high-speed playback of 4 × speed or higher, the previously decoded I-picture or P-picture video output is stored in the B-picture storage area 22c of the unnecessary frame buffer 22. Therefore, the previously decoded I picture or P
It is not necessary to provide a separate frame buffer for storing the video output of the picture.

Next, the operation of this embodiment will be described with reference to FIGS.
It will be described according to. When a video stream having a GOP structure as shown in FIG. 6A is read from the recording medium,
The pictures processed in each frame period (pictures decoded by the decode core circuit 4, pictures reproduced by the display 8, pictures skipped by the picture skip circuit 6) are as shown in FIG. 6B.

FIG. 7 shows a change in the occupied amount Bm of the bit buffer 2 in the case shown in FIG. First, the P picture P1 is decoded. Here, even after the P picture P1 is read from the bit buffer 2, if the occupied amount Bm still exceeds the threshold value B3thn, the two B pictures B2 and B3 that are read subsequently are skipped without decoding. To do. If the occupation amount Bm still exceeds the threshold value B3thn, the P picture P4 is decoded. At this time, the previously decoded P picture P1 is used only as intermediate data when the decoding core circuit 4 performs forward prediction to generate the P picture P4, and is not reproduced. Then, only the P picture P4 is reproduced. These processes are performed within one frame period.

Within the next one frame period, B picture B5
To decode and play. On the other hand, in the second embodiment (dotted line in the figure), the P picture P1 is first decoded and reproduced, and then the B pictures B2 and B3 are skipped without decoding. These processes are performed within one frame period. Therefore, at this point, the P picture P4 remains stored in the bit buffer 2. Therefore, the risk of overflow of the bit buffer 2 during the decoding of the P picture P4 during the next one frame period becomes extremely high.

As described in detail above, according to this embodiment,
In addition to the effects of the fourth embodiment, the following effects can be obtained. P that can be decoded while avoiding overflow of the bit buffer 2 during high-speed reproduction of 4 × speed or more
More pictures. As a result, more B pictures can be decoded. Therefore, it is possible to further smooth the motion of the moving image during high-speed reproduction and further improve the image quality.

Similar to the second embodiment, in this embodiment, even if the threshold value B3thn is set to the same value as the threshold value Bthn,
The same effect as above can be obtained. The above-described embodiments may be modified as follows, and in that case, the same operation and effect can be obtained.

[1] In each of the above-described embodiments, high-speed reproduction based on the D picture is also performed. In this case, the effect of each of the above embodiments can be further enhanced. [2] The coefficient n in the above equation (8) is set to a value larger than the magnification n for the normal reproduction speed. For example, in the 2 × speed reproduction, the coefficient n in the equation (8) is a value larger than 2 (n> 2)
To In this case as well, the same effects as those of the above-described respective embodiments can be obtained, but if the coefficient n is made too large, dropped frames in the reproduced moving image will increase. That is, it is best to make the coefficient n equal to the magnification n, but the value of the coefficient n may be adjusted if it is small.

[3] In the fourth embodiment, the frame buffer 22 is provided separately from the bit buffer 2. [4] In the fifth embodiment, a frame buffer for storing the video output of the previously decoded I picture or P picture is provided separately from the frame buffer 22.

[5] The first embodiment and the second embodiment are used together. [6] Not only video CD player but VTR (Video
The present invention is applied to a reproducing device of a storage medium using the MPEG system such as a Tape Recorder) and a DVD (Digital Video Disk) player.

[7] The first to fifth embodiments are replaced with software processing using a CPU. That is, the signal processing in each circuit (3 to 7, 12) is replaced with software-like signal processing using a CPU.

Although the respective embodiments have been described above, technical ideas other than the claims which can be understood from the respective embodiments will be described below together with their effects. (A) The MPEG video decoder according to any one of claims 5 to 9, wherein the decode core circuit and the determination control circuit are formed on one chip.

(B) In the MPEG video decoder according to the tenth aspect, the decoding core circuit, the judgment control circuit and the video stream analysis circuit are formed on one chip.
PEG video decoder.

By the above (a) or (b),
The entire MPEG video decoder can be downsized. (C) In the MPEG video decoder according to claim 11, the bit buffer and the frame buffer are one R
MPEG video decoder composed by AM.

By doing so, the number of parts constituting the MPEG video decoder is reduced, and the cost can be reduced. By the way, in this specification, the members according to the configuration of the present invention are defined as follows.

(A) The judgment control circuit comprises a variable threshold overflow judgment circuit 5, a picture skip circuit 6, and a control core circuit 7. (B) The video stream analysis circuit is composed of the picture header detection / data amount analysis circuit 12.

(C) The recording medium includes not only a video CD but also any digital recording medium such as a DVD, a CD-ROM, a hard disk and a video tape.

[0154]

【The invention's effect】

1] It is possible to provide a decoder and an MPEG video decoder which can avoid overflow of a bit buffer and have a simple structure.

2] It is possible to provide an MPEG video decoder having a simple structure capable of smoothing the motion of a moving image during special reproduction to improve the image quality and avoiding the overflow of the bit buffer. it can. 3) It is possible to smooth the motion of a moving image during special reproduction to improve the image quality and to avoid overflow and underflow of the bit buffer.
An MPEG video decoder having a simple structure is provided.

[Brief description of drawings]

FIG. 1 is a block circuit diagram of a main part of first and second embodiments.

FIG. 2 is a graph for explaining the first embodiment.

FIG. 3 is a graph for explaining the second embodiment.

FIG. 4 is a block circuit diagram of an essential part of a third embodiment.

FIG. 5 is a block circuit diagram of a main part of fourth and fifth embodiments.

FIG. 6 is a schematic diagram for explaining a fifth embodiment.

FIG. 7 is a graph for explaining the fifth embodiment.

FIG. 8 is a block circuit diagram of a main part of a conventional example.

FIG. 9 is a graph for explaining a conventional example.

[Explanation of symbols]

 1, 11 and 21 ... MPEG video decoder 2 ... Bit buffer 3 ... Picture header detection circuit 4 ... MPEG video decoding core circuit 5 ... Variable threshold overflow determination circuit 6 ... Picture skip circuit 6a, 6b ... Node 7 ... Control core circuit 8 ... Display 12 ... Picture header detection / data amount analysis circuit 22 ... Frame buffer 22a ... Front reference area 22b ... Back reference area 22c ... B picture storage area

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁶ Identification code Office reference number FI technical display location // H03M 7/30 H04N 7/137 Z

Claims (14)

[Claims] 1. A decoder for controlling a bit buffer so as not to overflow. 2. The occupied amount (Bm) of the bit buffer (2)
A decoder that controls so that the value does not exceed a predetermined threshold value (Bthn). 3. Occupancy of bit buffer (2) (Bm)
Decoder that skips data from the bit buffer until the occupancy falls below the threshold value when the threshold value exceeds a predetermined threshold value (Bthn). 4. Occupancy of bit buffer (2) (Bm)
Decoder exceeds a predetermined threshold value (Bthn), data is skipped from the bit buffer until the occupancy amount falls below the threshold value, and normal decoding is performed when the occupancy amount does not exceed the threshold value. 5. A bit buffer (2) and each picture read from the bit buffer are MPEG-coded.
The decode core circuit (4) for decoding in accordance with the video part and the threshold (Bthn) of the bit buffer occupancy (Bm) are set, and when the occupancy exceeds the threshold, the occupancy reaches the threshold. An MPEG video decoder provided with a decision control circuit (5, 6, 7) for skipping a picture supplied from a bit buffer to a decoding core circuit until it falls below the threshold. 6. A bit buffer (2) for accumulating a video stream, and each picture read from the bit buffer is MPEG
The decoding core circuit (4) for decoding in accordance with the video part, and the bit buffer occupancy (B
The threshold value (Bthn) of m) is set, and when the occupancy exceeds the threshold, the decision control circuit (5, 5) that skips the picture supplied from the bit buffer to the decoding core circuit until the occupancy falls below the threshold. 6,7) and M
PEG video decoder. 7. A bit buffer (2) for accumulating a video stream, and each picture read out from the bit buffer is MPEG encoded.
The decoding core circuit (4) for decoding in accordance with the video part, and the bit buffer occupancy (B
m) threshold value (Bthn) is set, and when the occupied amount exceeds the threshold value, the picture supplied from the bit buffer to the decoding core circuit is skipped until the occupied amount falls below the threshold value, and the skipped picture is B Just the picture
An MPEG video decoder including a decision control circuit (5, 6, 7) that does not skip P pictures and I pictures. 8. The M according to claim 5,
In the PEG video decoder, the determination control circuit is
An MPEG video decoder that skips if the next picture to be read from the bit buffer is a B picture even if the occupied amount of the bit buffer falls below the threshold value after reading the I picture or P picture. 9. M according to any one of claims 5 to 8.
In the PEG video decoder, the determination control circuit is
When the occupied amount of the bit buffer exceeds the first threshold value (B2thn) after reading the I picture or P picture, or when the occupied amount of the bit buffer exceeds the second threshold value (B3thn) after reading the P picture. An MPEG video decoder that skips the next picture read from the bit buffer if the picture is a B picture and sets the first threshold to a value higher than the second threshold. 10. The MPEG video decoder according to any one of claims 5 to 9, wherein each picture included in the video stream is stored in the bit buffer before being input to the bit buffer. A video stream analysis circuit (12) for detecting the type of each picture and analyzing the data amount of each picture,
An MPEG video decoder, wherein the determination control circuit selects a picture to be skipped based on the type of each picture and the data amount of each picture included in the video stream analyzed by the video stream analysis circuit. 11. The MPEG video decoder according to claim 5, further comprising a frame buffer that stores a decoding result of each picture generated by the decoding core circuit, the inside of the frame buffer being forward. Reference area, backward reference area, and B picture storage area
An MPEG video decoder which is divided into two areas, and when a B picture is skipped, the B picture storage area is used as an additional memory of the bit buffer. 12. The MPEG video decoder according to claim 5, wherein the decode core circuit has two I pictures or P pictures within one frame period.
An MPEG video decoder that decodes a picture, treats a previously decoded I picture or P picture as intermediate data for performing forward prediction or bidirectional prediction, and handles only a decoded I picture or P picture as a reproduced picture. . 13. The MPEG video decoder according to claim 5, further comprising a frame buffer for storing a decoding result of each picture generated by the decoding core circuit, the inside of the frame buffer being forward. Reference area, backward reference area, and B picture storage area
The decoding core circuit is divided into two regions, and the decoding core circuit decodes two I pictures or P pictures within one frame period, and performs forward prediction or bidirectional prediction for the previously decoded I picture or P picture. An MPEG video decoder that handles halfway data, stores the halfway data in a B picture storage area, and handles only I or P pictures decoded later as playback pictures. 14. The MPEG video decoder according to claim 5, wherein the threshold value or the first and second threshold values is a buffer defined by a sequence header attached to the beginning of a sequence of a video stream. Size (Vbv Buffer Size) and bit rate (Bit
MPEG video decoder set by (Rate), picture rate (Picture Rate), and a ratio (n) of the actual reproduction speed to the normal reproduction speed.