JPH0974230A - Intrinsic junction flux quantum memory - Google Patents

Abstract

PROBLEM TO BE SOLVED: To make the memory operate at the liquid nitrogen temperature exceeding 77K by a method wherein one of a tunnel type Josephson junction connected to a laminated structure made of a weak superconducting layer held by upper and lower superconducting electrodes is used as a memory state detecting element. SOLUTION: In the parts 1, 2 of laminated intrinsic junction, the strong superconducting electrode in Josephson layer structure works as the superconducting electrode of Josephson junction while the weak supercondicting layer works as the tunnel barrier layer of Josephson junction. That is, in these parts, the tunnel type SIS Josephson junction is laminated in multiple film thickness direction to be formed as so-called series connected intrinsic junction. At this time, the reading-out operation is performed by feeding reading-out control current to the reading-out control line 11. Since the laminated layer intrinsic junction is used for the rapid operation, the operational rate is featured by extreme rapidity. Through these procedures, the title intrinsic junction magnetic quantum memory can be operated even at the liquid nitrogen temperature exceeding 77K.

Description

Detailed Description of the Invention

[0001]

TECHNICAL FIELD The present invention relates to a liquid nitrogen temperature (7
The present invention relates to an intrinsic junction magnetic flux quantum memory which operates at a temperature near 7 K) or higher. More specifically, the present invention relates to a memory device that consumes low power and operates at high speed. Further, as a concrete application example, application to a memory for a superconducting computer, a memory for processing communication data, etc. is expected.

[0002]

2. Description of the Related Art As a high speed logic gate, Nb-AlO _x using niobium (Nb) which is a metal-based low temperature superconductor is used.
The logic gate formed of the -Nb Josephson junction operates at the highest speed. In addition, such a logic gate has 1.5
It holds the maximum device speed recording (including semiconductor devices) of psec / gate. This Josephson junction is a so-called SIS junction (tunnel type junction) in which a thin insulating layer (AlO _x ) is sandwiched with a superconductor, and the SIS junction type operates at the highest speed among the Josephson junctions. As a high-speed memory that operates in the same environment as such a high-speed logic gate, a persistent current type memory (WH Henkels et al .: IEEE) is used.
J. Solid-State Circuits, SC
14-5, p. 794 (1979)) and a single magnetic flux quantum memory (P. Gueret et al .: IEEE T).
rans. on MAG-13, p. 52 (197
There is 7)). These are memory formed by combining Nb-AlO _x -Nb Josephson junctions and superconducting loop.

[0003]

However, in high temperature superconductors, high temperature superconducting memory devices operating at 77K or higher have not yet been realized. The reasons are that SIS bonding has not been realized, and that it is difficult to realize good superconducting contact between high temperature superconductors.

On the other hand, BiSr which is a Bi-based high temperature superconductor
CaCuO has a layered structure in the c-axis direction of the crystal axis,
The i ₂ O ₃ layer and the SrO layer are insulator tunnel barrier layers (I
Layer). Therefore, a SIS junction type Josephson junction is naturally formed. This is a so-called intrinsic junction in which a large number of Josephson junctions are stacked in the c-axis direction. It has been measured in a BiSrCaCuO single crystal bulk that the intrinsic junction exhibits a current-voltage characteristic of a SIS junction type having hysteresis (R. Kleiner et.
al. : Phys. Rev. Lett. 68 (199
2) p. 2394). Similar characteristics have also been obtained with Tl-based superconductors (R. Kleiner and P.
Muller: Phys. Rev. B49 (1994)
p. 1327).

By using this intrinsic junction, a current injection type ultra high speed logic gate can be constructed. If a high-temperature superconducting logic gate operating at 77K or higher is realized in this manner, then a high-temperature superconducting memory operating in a similar environment is required.

An object of the present invention is to solve the above problems and to provide an intrinsic junction magnetic flux quantum memory which operates at a liquid nitrogen temperature of 77 K or higher using an intrinsic junction. That is, according to the present invention, it is difficult to manufacture a SIS junction type Josephson junction using a high temperature superconductor, and therefore a high temperature superconducting memory that operates at a liquid nitrogen temperature (77K) or higher cannot be realized. It solves the problem.

[0007]

In order to solve the above problems, therefore, an intrinsic junction flux quantum memory according to the present invention allows an oxide high temperature superconductor to hold a flux quantum and hold the above flux quantum. In a superconducting memory in which the polarity of is associated with binary logic "1" and "0",
The oxide high-temperature superconductor comprises a strong superconducting layer serving as an upper superconducting electrode, a strong superconducting layer serving as a lower superconducting electrode, a barrier sandwiched between the upper superconducting electrode and the lower superconducting electrode. One of a plurality of tunnel type Josephson junctions formed in the above laminated structure and connected in series with each other is used as a memory state detection element. It is characterized by being used.

Preferably, a magnetic flux quantum retention region consisting of holes formed in the oxide high temperature superconductor is provided.

Preferably, the lower superconducting electrode is cut out from the oxide high-temperature superconductor by etching to a predetermined depth around the plurality of tunnel type Josephson junctions, and A common electrode for multiple tunnel-type Josephson junctions,
Further, the hole formed in the layered structure below the etched portion is used as a magnetic flux quantum holding region.

[0010]

BEST MODE FOR CARRYING OUT THE INVENTION In an example of an embodiment of an intrinsic junction magnetic flux quantum memory according to the present invention, an intrinsic junction (stacked SIS junction) expressed by a high temperature superconducting thin film (for example, BiSrCaCuO) having a layered structure is used. Using a magnetic flux quantum memory (made of a metal-based low-temperature superconductor, 4.2K operation: K. Miyahara et al.
l. : U. S. Patent No. 4764898
Aug. 16 (1988)) as a high temperature superconductor.

An example of an intrinsic junction magnetic flux quantum memory according to the present invention will be described below with reference to the drawings. In all the drawings, the same reference numerals indicate the same constituent elements.

FIG. 1 is a perspective view for explaining a schematic structure of a memory device structure in which a magnetic flux quantum memory is formed by using an intrinsic junction. In the figure, reference numeral 1
Is a magnetic flux quantum detection junction formed by a laminated intrinsic junction, 2 is a contact junction formed by a laminated intrinsic junction having a large area, 3 is a hole of a high temperature superconductor for retaining the magnetic flux quantum, and 4 is a written magnetic flux quantum Is a superconducting link (a portion of the superconductor having a narrow width) 5 for a superconducting layer below the layer mesa-etched to form the laminated intrinsic junctions 1 and 2 and serving as a common lower electrode. . Further, reference numerals 6 and 7 are interlayer insulating layers (SiO 2
Etc.), 8 and 9 are metal wiring layers, 10 is a magnetic flux quantum write control line (metal wiring layer), and 11 is a magnetic flux quantum read control line (metal wiring layer).

FIG. 2 is a sectional view taken along the line AA 'in FIG. Reference numerals 1 to 11 denote the same components as in FIG. Further, reference numeral 12 is an epitaxial substrate (for example, Mg) for epitaxially growing a high temperature superconducting thin film.
O, etc.), 13 is a portion obtained by etching all layers of the high-temperature superconductor film, 14 is a portion obtained by mesa-etching the high-temperature superconducting thin film 5 to a predetermined depth to form a laminated intrinsic junction, and 15 is a portion obtained by mesa-etching. Is a portion backfilled with an insulating layer (eg, SiO).

Next, a case where the memory device structure of this embodiment is formed of a laminated structure high temperature superconducting thin film will be described. First, a high-temperature superconducting thin film BiSrCaCuO having a layered structure, for example, is epitaxially grown on the epitaxial substrate 12 by vapor deposition or sputtering. At this time, the thin film is grown so that the c-axis of the crystal structure of the thin film is oriented perpendicular to the substrate surface and the ab plane is parallel to the substrate surface. In a high temperature superconducting thin film having a strong layered structure, a thin film having such a crystal orientation is most likely to grow, and the resulting film has excellent crystallinity. Next, using a photoresist patterned by photolithography as a mask, the thin film is etched to the substrate surface (ion milling or chemical etching) to form a device pattern of the high temperature superconducting thin film. At this time, the hole 3 of the high-temperature superconductor to be the magnetic flux quantum storage portion and the constricted portion of the superconductor below the write control line are simultaneously formed by etching all layers. Then, similarly, the thin film is etched to a predetermined depth using the photoresist patterned by photolithography as a mask to form the laminated intrinsic junctions 1 and 2 (mesa etching portion 14).
A current (bias current) is applied to the laminated intrinsic junctions 1 and 2 from the thin film surface toward the surface of the epitaxial substrate 12, and the voltage is measured between the thin film surface and the substrate surface. According to the current-voltage characteristics obtained by this measurement, a so-called Josephson junction, in which a superconducting current (Josephson current) flows at zero voltage, is connected in series. In particular, when a BiSrCaCuO thin film is provided on the epitaxial substrate 12, this thin film serves as an insulating barrier layer, so that the laminated intrinsic junction becomes a tunnel type Josephson junction (SIS junction). The lower electrodes of the laminated intrinsic junctions 1 and 2 are connected under the mesa etching portion 14 by the high temperature superconducting thin film 5 while maintaining superconductivity. After the mesa etching, the insulator thin film SiO is left with the resist remaining.
And then removing the resist (so-called lift-off), the mesa-etched portion 15 can be backfilled with SiO 2.

An interlayer insulating layer 7 and metal wiring layers 8, 9 and 11 can be formed thereon by vapor deposition and lift-off using a photoresist patterned by photolithography again. Further, the interlayer insulating layer 6 and the magnetic flux quantum write control line (metal layer) 10 are the backfill layer 15
It can be formed by etching (SiO) to an appropriate depth, depositing the metal layer 10 and lifting off.

FIG. 3 is a diagram for explaining the operation of the memory device shown in FIGS. 1 and 2. In the figure, reference numeral 16 is a magnetic field generated by a write control current flowing through the magnetic flux quantum write control line 10, 17 is a magnetic field generated by a read control current flowing through the magnetic flux quantum read control line 11, and 18 is a hole 3 of the magnetic flux quantum storage portion. This is the magnetic field generated by the magnetic flux quantum retained at.

First, the function of each part will be described. In the laminated intrinsic junctions 1 and 2, the layer having a strong superconducting property of the laminated structure functions as a superconducting electrode of the Josephson junction, and the layer having a weak superconducting property functions as a tunnel barrier layer of the Josephson junction. That is, this part is a tunnel type S
A large number of IS Josephson junctions are stacked in the film thickness direction to form so-called intrinsic junctions connected in series. Among these, the junction 1 is a magnetic flux quantum detection junction that detects the magnetic field of the magnetic flux quantum held in the magnetic flux quantum storage unit 3. Junction 2 is an contact junction formed with a large junction area so that the Josephson current is sufficiently larger than that of junction 1 (that is, formed to pass a superconducting current to the connection between superconducting layers). The junction is always in the superconducting state during operation of the memory, and does not transfer voltage (Josephson junction). Reference numeral 3 is a magnetic flux quantum accumulating portion (hole) that holds the magnetic flux quantum that has entered from the superconducting link 4. The writing of the magnetic flux quantum is performed by the magnetic field 16 generated when a current is applied to the write control line 10 to pass through the superconducting link 4 and enter the magnetic flux quantum accumulating portion 3 to become a magnetic flux quantum. The detection of the magnetic flux quantum generated by the magnetic field 18 and held in the magnetic flux quantum storage unit 3 is performed by the magnetic flux quantum detection junction 1. A part of the magnetic field 18 of the held magnetic flux quantum is applied to the tunnel barrier layer of the magnetic flux quantum detection junction 1 as shown in FIG. In this magnetic flux quantum detection junction 1, a bias current is supplied from the metal wiring layer 8 and passed through the common lower electrode 5 and the contact junction 2 to the metal wiring layer 9. Further, when a control current is passed through the control current line 11, a part of this magnetic field 17 becomes a magnetic field 18 of the holding flux quantum.
Is applied to the tunnel barrier layer of the magnetic flux quantum detection junction 1 in the same manner as.

Next, the operation of the memory device of this embodiment will be described.

In this memory, the polarities of the magnetic flux quanta held in the magnetic flux quantum storage unit 3 are made to correspond to "1" and "0" of the memory. Here, the direction of the magnetic flux quantum (polarity of the magnetic field) in FIG. 3 will be described as “1”.

The "1" write operation is performed by the write control line 1
This is performed by passing a current in the direction of 0 in FIG. A part of the magnetic field generated by this current penetrates the magnetic flux quantum storage unit 3 through the superconducting link 4, and the magnetic flux quantum of "1" is held. This magnetic flux quantum is retained in the magnetic flux quantum storage unit 3 even if the write current is removed. However, if more magnetic flux quanta are written than the magnetic flux quantum accumulating portion has, the extra magnetic flux quanta are released through the superconducting link 4 when the write current is removed.

The "0" write operation is performed by the write control line 1
It is performed by passing a current in the direction of 0 in the direction opposite to that in FIG. As a result, a magnetic field in the opposite direction to that in the case of "1" enters the magnetic flux quantum storage unit 3, and the magnetic flux quantum of "0" is held. At this time, if the immediately preceding memory state is “1”, the flux quantum in the positive direction is first held in the flux quantum storage unit 3, but the reverse direction written by the “0” write operation is performed. Are all canceled by the magnetic field of, and the magnetic flux quanta in the opposite direction are written, resulting in the "0" state in which only the magnetic flux quanta in the opposite direction are held.

The read operation is performed by causing a read control current I _C to flow through the read control line 11.

In FIG. 4, while the read control current I _{C is} passed through the read control line 11, the metal wiring layers 8 to 9 of FIG.
6 is a graph for explaining a control characteristic of the detection junction 1 when a bias current I _B is applied to (the dependence of the Josephson current on the control current). In the figure, the solid line indicates that the magnetic flux quantum is not held, the alternate long and short dash line indicates that the magnetic flux quantum storage unit stores a magnetic flux quantum of "1", and the broken line indicates that the magnetic flux quantum storage unit indicates "0".
The magnetic flux quantum of is held. The control characteristic shown in FIG. 4 is a plot of how the bias current (Josephson current) that can flow in the junction 1 at zero voltage is reduced by applying a magnetic field to the tunnel barrier layer of the detection junction 1. Is. Therefore, when the operating point is in this peak, the detection junction 1 remains in the zero voltage state, and when the operating point goes out of this peak, the detection junction 1 transitions to the voltage state. In this characteristic, the magnetic field of the retained magnetic flux quantum is applied to the tunnel barrier layer of the detection junction 1 to shift the characteristic in the lateral direction (control current axis direction). In the read operation, the bias current I _{B is made} to flow to the detection junction 1 so that the operating point becomes the point A in FIG.
Next, a control current is passed through the read control current line 11 to move the operating point to point B. At this time, when the magnetic flux quantum held in the magnetic flux quantum storage unit 3 is "1", the detection junction 1 does not undergo voltage transition because both the points A and B are in the mountain of "1". However, when the magnetic flux quantum held at this time is "0", the point B is outside the peak of "0", and therefore the detection junction 1 causes a voltage transition. Therefore, as a result of the read operation, it is possible to determine whether the magnetic flux quantum held in the magnetic flux quantum storage unit is "1" or "0" depending on whether or not the detection junction 1 has caused a voltage transition.

In this memory, the write cell selection can be realized by using two write control lines as a word line and a bit line and selecting the coincidence between them.

The read cell is selected by the bias current line 8
Using 9 and 9 and the read control line 11 as a word line and a bit line, the read cell selection can be realized depending on whether or not the detection junction 1 of the coincident cell of these two makes a voltage transition.

In this way, this memory becomes a nondestructive read random access memory. Moreover, since this memory uses the laminated intrinsic junction which operates at high speed for reading, it has a characteristic that the operation speed is very high. Further, since the memory uses a superconducting Josephson junction, the power consumption is as small as about 1/1000 that of a semiconductor memory, so the thermal limit is loose and it can be mounted at a high density.

In the description of the embodiments of the present invention, the case of the BiSrCaCuO thin film was mainly described, but any material can be used as long as it is a high temperature superconductor in which a laminated intrinsic junction is formed. The structure of the invention is configurable and the material is not limited to BiSrCaCuO thin films.

Although the metal wiring layers (8, 9, 10, 11) are used in FIGS. 1, 2 and 3, this does not necessarily require the use of a normal conductive metal thin film and is technically possible. If so, these may be high-temperature oxide superconductors or other conductors.

[0029]

As described above, the liquid nitrogen temperature (7
It is possible to realize an ultra-high speed and low power consumption intrinsic junction magnetic flux quantum memory that operates at 7K) or higher.

[Brief description of drawings]

FIG. 1 is a perspective view for explaining a schematic configuration of a memory device structure in which a magnetic flux quantum memory is configured by using an intrinsic junction as one embodiment of an intrinsic junction magnetic flux quantum memory of the present invention.

FIG. 2 is a cross-sectional view taken along the line AA ′ of FIG.

FIG. 3 is a schematic cross-sectional view of the main part of the memory device for explaining the operation of the high temperature superconducting flux quantum memory.

FIG. 4 is a graph showing the control current dependence of the Josephson current of a flux quantum detection junction of a high temperature superconducting flux quantum memory.

[Explanation of symbols]

1 Multilayer Intrinsic Junction (Flux Quantum Detection Junction) 2 Multilayer Intrinsic Junction (Contact Junction) 3 High-Temperature Superconductor Hole (Flux Quantum Accumulator) for Holding Flux Quantum 4 Superconducting Link for Writing Flux Quantum (Narrow width superconductor part) 5 Part that becomes common lower electrode in superconductor layer under mesa etching (high-temperature superconducting thin film) 6,7 Interlayer insulating layer 8,9 Metal wiring layer 10 Flux quantum write control line (Metal wiring layer) 11 Magnetic flux quantum read-out control line (metal wiring layer) 12 Epitaxial substrate 13 Part where the high temperature superconductor film is etched in all layers 14 High temperature superconducting thin film 5 has a predetermined depth to form a laminated intrinsic junction. 15 Mesa-etched part up to now 15 Mesa-etched part of the high-temperature superconductor is backfilled with an insulating layer (eg, SiO) Magnetic field 6 Fluxoid read control current flowing through the magnetic field 17 read control line 11 is held in the hole 3 of the magnetic field 18 flux quantum storage unit generating a write control current flowing through the write control line 10 is generated is generated

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Minoru Suzuki 1-6, Uchisaiwaicho, Chiyoda-ku, Tokyo Nihon Telegraph and Telephone Corporation

Claims (3)

[Claims] 1. A high-temperature oxide superconductor holds a magnetic flux quantum, and the retained magnetic flux quantum has a polarity of "1" of binary logic.
In the superconducting memory corresponding to "0", the oxide high-temperature superconductor comprises a strong superconducting layer serving as an upper superconducting electrode, a strong superconducting layer serving as a lower superconducting electrode, and A weak superconducting layer serving as a barrier layer sandwiched between the upper superconducting electrode and the lower superconducting electrode, and
Further, an intrinsic junction magnetic flux quantum memory, wherein one of a plurality of tunnel type Josephson junctions formed in the laminated structure and connected in series with each other is used as a memory state detecting element. 2. The intrinsic junction magnetic flux quantum memory according to claim 1, further comprising a magnetic flux quantum holding region formed of a hole formed in the high temperature oxide superconductor. 3. The lower superconducting electrode is cut out from the high temperature oxide superconductor by etching to a predetermined depth around the plurality of tunnel type Josephson junctions. 2. The in-hole according to claim 1, wherein the tunnel quantum Josephson junction serves as a common electrode, and the hole formed in the layered structure below the etched portion serves as a magnetic flux quantum retention region. Trinsic junction magnetic flux quantum memory.