JPH0974205A - Thin film transistor and manufacture thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To make it possible to apply a large current by a method wherein a thin film transistor, which is equivalent to a circuit on which a plurality of thin film transistors are connected in parallel, is formed by contriving a channel structure. SOLUTION: In the active layer of a thin film transistor, a source S and a drain D are formed on the rectangular regions on both ends, a square pole like unit channel C is arranged in the center in parallel with the direction of the channel width W, and a channel C is formed. That is, as the channel C is arranged in such a manner that a plurality of unit channels Co of the channel width (w) are placed in parallel with each other, a thin film transistor, which is equivalent to the circuit on which a plurality of thin film transistors are connected in parallel, can be obtained.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film transistor used in an active matrix type liquid crystal display device,
And a method for manufacturing the same.

[0002]

2. Description of the Related Art Conventionally, thin film transistors have been used in various integrated circuits. For example, in an active matrix type liquid crystal display device, it is used as a switching element of a pixel or a driver element formed in a peripheral circuit.

[0003]

In particular, the thin film transistors forming the peripheral circuit are required to be able to operate at high speed and handle a large current. To handle a large current, the channel width of the thin film transistor may be lengthened. Therefore, the present inventor manufactured thin film transistors having different channel widths while keeping the channel length constant, and measured the current density in the ON state. FIG. 6 shows the measurement result.

FIG. 6 shows the relative ratio of the current density to a thin film transistor having a channel width of 10 μm.
The horizontal axis represents the channel width W, and the vertical axis represents the relative ratio of the current density. As shown in FIG. 6, as the channel width W becomes longer, the relative ratio of the current density exponentially decreases. For example, the relative ratio of the current density of a thin film transistor having a channel width W of 100 μm to that of a thin film transistor having a channel width W of 10 μm is about 0.85. This means that the current increases only 8.5 times despite the channel width W becoming 10 times. Therefore, as a method of manufacturing a thin film transistor capable of passing a large current, increasing the channel width W is inefficient and not appropriate.

On the other hand, if a plurality of thin film transistors are connected in parallel, a large current can be handled while maintaining the characteristics of each thin film transistor.

An object of the present invention is to solve the above problems and devise a channel structure to manufacture a thin film transistor equivalent to a circuit in which a plurality of thin film transistors are connected in parallel to handle a large current. Is to enable.

[0007]

In order to solve the above problems, the structure of a thin film transistor according to the present invention is a thin film transistor having a semiconductor film in which a source, a drain and a channel are formed. The plurality of semiconductors are arranged in parallel at a predetermined interval along the channel width direction.

FIG. 1 is a top view of a semiconductor film of a thin film transistor according to the present invention, and FIG. 2 is a sectional view of a channel taken along the line AA ′ of FIG. In the semiconductor film, a source S and a drain D are formed in rectangular regions at both ends, and a plurality of square columnar unit channels Co are arranged in parallel in the channel width W direction in the center to form a channel C. ing. Therefore, by arranging the unit channels Co parallel to the channel width W direction, it can be said that the channel C is formed in a comb-like shape along the channel length direction.

Alternatively, from the viewpoint that the channel is formed by patterning a semiconductor film, it can be said that the channel C has a plurality of slit-shaped openings along the channel length direction.

Further, in the method of manufacturing a thin film transistor according to the present invention, the semiconductor film on which the source S, the drain D and the channel C as shown in FIGS. 1 and 2 are formed is crystallized and then patterned. It is characterized by

[0011]

With respect to the thin film transistor having the above structure, a structure similar to the structure of the channel of the present invention is referred to as a "multi-channel structure", which is IEEE TRANSACTIO.
NS ELCTRON DEVICES, VOL. 3
5, NO. 11, 1988.11., P1986-198.
9 are described.

The "multi-channel structure" is a structure of channels formed in a slit shape. The purpose of adopting the "multi-channel structure" is to provide a thin film transistor having a large on-current / off-current ratio and a small leak current, which is significantly different from the object of the present invention.

An object of the present invention is to provide a thin film transistor capable of passing a large current. In order to achieve this object, a plurality of square columnar unit channels Co are arrayed in parallel with the channel width W direction. By doing so, the channel width W is increased. This makes it possible to equivalently obtain a circuit transistor in which a plurality of thin film transistors are connected in parallel by using one thin film transistor, and it becomes possible to flow current more efficiently than a thin film transistor in which the channel width is simply lengthened.

The "multi-channel structure" is manufactured by crystallizing a semiconductor after patterning a channel in a slit shape. However, when the semiconductor film is crystallized, the semiconductor film shrinks, so that a mask pattern may shift in a later step. For this reason, in the present invention, the mask pattern is prevented from shifting by crystallizing the semiconductor film in which the source, the drain, and the channel are formed and then performing patterning.

[0015]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described in detail based on the embodiments shown in FIGS. FIG. 3 is a schematic configuration diagram of the thin film transistor of this embodiment, and shows only the source S, the drain D, the channel C, and the gate electrode G. The source S, drain D, and channel C are formed in the active layer 14 obtained by patterning the crystalline silicon film. The channel C is formed in a comb tooth shape having a slit-shaped opening having a longitudinal direction in the channel length direction. A gate electrode G is provided on the upper layer of the channel C via a gate insulating film (not shown).

A method of manufacturing the thin film transistor of this embodiment will be described with reference to FIG. FIG. 4 is a configuration diagram of the thin film transistor in each step, and is a cross-sectional view along the channel length direction.

First, the base film 12 is formed on the glass substrate 11 to a thickness of 1000 to 5000 Å. For example, as the base film 12, a silicon oxide film having a thickness of 2000 Å is formed by a plasma CVD method using TEOS and oxygen as source gases. After that, the amorphous silicon film 13 is formed to a thickness of 500 Å by the plasma CVD method or the low pressure CVD method.
(Fig. 4 (A))

Next, the amorphous silicon film 13 is crystallized by heating or irradiating laser light. In this embodiment, KrF
Irradiation with an excimer laser transforms the amorphous silicon film 13 into a crystalline silicon silicon film. The active layer 14 of the thin film transistor is formed by patterning the crystalline silicon film by adopting the known photolithography method and dry etching method. (FIG. 4 (B))

FIG. 1 is a top view of the active layer 14, and FIG. 2 is a cross-sectional view of the thin film transistor including the channel formation region taken along the line AA 'of FIG. In the active layer 14, a source S and a drain D are formed in rectangular regions at both ends, and square columnar unit channels Co are arranged in parallel in the channel width W direction to form a channel region 19 in the center. There is. That is, the channel width W is increased by arranging a plurality of unit channels Co having a channel width w in parallel in the channel region 19. However, the substantial channel width Wef is not W, but Wef = (channel width w of unit channel Co) × (number of unit channels Co). The channel width w of the unit channel Co is about the same as the channel width of a thin film transistor which is generally widely used. Also, the substantial channel width We
The f, the channel width w of the unit channel Co, the number, etc. may be determined based on the value of the current to be passed through the thin film transistor. For example, the width w of the unit channel Co may be 10 μm, and the substantial channel width Wef may be about 100 μm.

By manufacturing a thin film transistor using the active layer 14 shown in FIGS. 1 and 2, the channel width Wef
A thin film transistor equivalent to the thin film transistor can be obtained, and at the same time, a thin film transistor equivalent to a circuit in which thin film transistors having a channel width w are connected in parallel can be obtained. Therefore, it is possible to efficiently increase the current that can be passed through the thin film transistor, rather than simply increasing the channel width.

After forming the active layer 14, as shown in FIG. 4C, a silicon oxide film having a thickness of 1000 Å is formed by a sputtering method or a plasma CVD method.
As a film. Next, an aluminum film is formed to a thickness of 5000Å by electron beam evaporation or sputtering, and patterned to form the gate electrode 16. In addition, scandium was previously added to the aluminum film by 0.1 w.
It is mixed with t%. Thereby, abnormal growth of aluminum due to heating can be prevented.

Next, by the ion doping method, impurity ions are implanted into the active layer 14 using the gate electrode 16 as a mask to form a source region 17 and a drain region 18. When manufacturing an N-type thin film transistor, phosphine (PH ₃ ) is used as a doping gas,
Phosphorus ions are implanted in the active layer 14. On the other hand, in the case of manufacturing a P-type thin film transistor, diborane (B ₂ H ₆ ) is used as a doping gas, and boron ions are implanted into the active layer 14. A source region 17 and a drain region 18 are formed by implanting impurity ions into the active layer 14. Further, since the impurity ions are not substantially implanted into the lower layer of the gate electrode 16, the channel region 19 is formed. Then, annealing is performed at a temperature of 550 to 600 ° C. to activate the implanted impurity ions. (Fig. 4
(C)) FIG. 5 is a cross-sectional view of the channel region 19 taken along the channel width W direction in FIG. 4 (C).

Next, a silicon oxide film having a thickness of 6000Å is formed as an interlayer insulator 20 by the plasma CVD method,
Contact holes are formed in the interlayer insulator 20. Then, a titanium film and an aluminum film are continuously formed,
By patterning, electrodes / wirings 21 and 22 are formed.
Finally, annealing is performed at a temperature of 350 ° C. for 30 minutes in a hydrogen atmosphere of 1 atm. A thin film transistor is completed through the above steps. (FIG. 4 (D))

Since the thin film transistor of this embodiment can pass a large current, it is suitable as an element of a peripheral circuit of an active matrix type liquid crystal display device.

[0025]

The thin film transistor according to the present invention has a structure in which a plurality of rectangular columnar semiconductors are arranged in parallel with each other in the channel width direction to form a channel. Since it is possible to obtain a thin film transistor, a large current can be made to flow more efficiently than a thin film transistor in which the channel width is simply lengthened.

Further, in the method of manufacturing a thin film transistor according to the present invention, since the semiconductor film on which the source, the drain and the channel are formed is crystallized and then patterned, it is possible to avoid shifting the mask pattern. .

[Brief description of drawings]

FIG. 1 is a top view of an active layer of a thin film transistor according to the present invention.

FIG. 2 is a cross-sectional view of the channel taken along the line AA ′ of FIG.

FIG. 3 is a schematic configuration diagram of a thin film transistor of this example.

FIG. 4 is an explanatory view of the method for manufacturing the thin film transistor of this embodiment, which is a cross-sectional view of the thin film transistor taken along the channel length direction.

5C is a cross-sectional view taken along the channel width direction of a thin film transistor including a channel region in FIG.

FIG. 6 is a graph showing a relative ratio of a thin film transistor having a channel width of 10 μm to a current density.

[Explanation of symbols]

 11 ... Glass substrate 12 ... Base film 13 ... Amorphous silicon film 14 ... Active layer 15 ... Gate insulating film 16 ... Gate electrode 17 ... Source region 18 ... Drain region 19 ... Channel region 20 ... Interlayer insulator 21, 22 ... Electrode / wiring

Claims (7)

[Claims] 1. A thin film transistor having a semiconductor film in which a source, a drain and a channel are formed. In the channel, a plurality of prismatic semiconductors are arranged in parallel along a channel width direction at predetermined intervals. A thin film transistor characterized by the above. 2. A thin film transistor having a semiconductor film in which a source, a drain and a channel are formed, wherein the channel is shaped like a comb along the channel length direction. 3. A thin film transistor having a semiconductor film in which a source, a drain and a channel are formed, wherein the channel has a plurality of slit-shaped openings along the channel length direction. 4. The semiconductor film according to any one of claims 1 to 3,
A thin film transistor having crystallinity. 5. A step of crystallizing an amorphous semiconductor film, patterning the crystallized semiconductor film to form a source,
In a method of manufacturing a thin film transistor, which includes a step of forming a region where a drain and a channel are to be formed, in the forming step, in the region where the channel is formed, a prismatic semiconductor has a predetermined width along a channel width direction. A method for manufacturing a thin film transistor, which is formed so as to be arranged in parallel at intervals. 6. A step of crystallizing an amorphous semiconductor film, patterning the crystallized semiconductor film to form a source,
A step of forming a region for forming a drain and a channel; and a step of forming a thin film transistor, wherein in the forming step, the region for forming the channel is formed in a comb shape along the channel length direction. A method for manufacturing a thin film transistor having characteristics. 7. A step of crystallizing an amorphous semiconductor film, patterning the crystallized semiconductor film to form a source,
A method of manufacturing a thin film transistor, comprising: forming a region in which a drain and a channel are to be formed; in the forming step, the region in which the channel is to be formed has a plurality of slit-shaped openings along a channel length direction. A method for manufacturing a thin film transistor, wherein a portion is formed.