JPH0969986A - Rf modulator - Google Patents

Rf modulator

Info

Publication number
JPH0969986A
JPH0969986A JP22440995A JP22440995A JPH0969986A JP H0969986 A JPH0969986 A JP H0969986A JP 22440995 A JP22440995 A JP 22440995A JP 22440995 A JP22440995 A JP 22440995A JP H0969986 A JPH0969986 A JP H0969986A
Authority
JP
Japan
Prior art keywords
circuit
frequency
channel
modulator
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP22440995A
Other languages
Japanese (ja)
Other versions
JP3322534B2 (en
Inventor
Akira Aochi
章 青地
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP22440995A priority Critical patent/JP3322534B2/en
Publication of JPH0969986A publication Critical patent/JPH0969986A/en
Application granted granted Critical
Publication of JP3322534B2 publication Critical patent/JP3322534B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To eliminate a SAW(surface acoustic wave) resonator, and decrease the number of components and lower the cost by employing a PLL frequency synthesizer system for the RF modulator. SOLUTION: The RF modulator consists of a PLL circuit composed of a 1/N frequency divider circuit 1, a phase detector circuit 2, a low-pass filter 3, a voltage-controlled oscillator circuit 4, a 1/P frequency divider circuit 5, and a variable frequency divider circuit (counter) 6. Then the frequency dividing rate of the variable frequency divider circuit 6 is switched between a USA channel and a Japan channel at a selection terminal S1 of a frequency dividing ratio selecting circuit 7 and between an Lo channel and a Hi channel at a selection terminal S2.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する分野】本発明は、ビデオテープレコーダ
(以下VTR)等に使用されるRFモジュレータに関す
るものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an RF modulator used in a video tape recorder (VTR) or the like.

【0002】[0002]

【従来の技術】VTRの再生信号あるいはVTRのチュ
ーナから出力される受信信号は、VTRのRFモジュレ
ータよりRF信号として出力され、その出力信号をテレ
ビジョンチューナで受信して映像を観ることが出来る。
2. Description of the Related Art A VTR reproduction signal or a reception signal output from a VTR tuner is output as an RF signal from a VTR RF modulator, and the output signal can be received by a television tuner to watch a video.

【0003】このため、前記RFモジュレータの出力信
号は特定のチャンネル周波数が規定されており、例えば
NTSCの場合、USAチャンネルではLoチャンネル
が3ch(61.25MHz)とHiチャンネルが4c
h(67.25MHz)、日本チャンネルではLoチャ
ンネルが1ch(91.25MHz)とHiチャンネル
が2ch(97.25MHz)となっている。
Therefore, the output signal of the RF modulator defines a specific channel frequency. For example, in the case of NTSC, 3 channels (61.25 MHz) of Lo channel and 4c of Hi channel in USA channel are specified.
In the Japanese channel, the Lo channel is 1ch (91.25MHz) and the Hi channel is 2ch (97.25MHz).

【0004】従って、図2に示すように、USAチャン
ネル仕様のRFモジュレータでは3chまたは4ch、
日本チャンネル仕様のRFモジュレータでは1chまた
は2chの周波数で共振する素子が、各々2つ組み込ま
れた弾性表面波レゾネータ(SAWレゾネータ8)を用
いた発振回路で構成し、SAWレゾネータ内の各素子を
ch切換スイッチ9によって選択的に使用するようにし
ている。
Therefore, as shown in FIG. 2, in the USA channel specification RF modulator, 3ch or 4ch,
In the RF modulator of the Japanese channel specification, the element that resonates at the frequency of 1ch or 2ch is composed of an oscillation circuit using two surface acoustic wave resonators (SAW resonator 8), and each element in the SAW resonator is ch. The changeover switch 9 is used selectively.

【0005】[0005]

【発明が解決しようとする課題】然し乍ら、SAWレゾ
ネータを用いた発振回路は、その周波数精度及び温度特
性が優れている反面、SAWレゾネータのコストが高
く、RFモジュレータのコストダウンを阻んでいる。
However, although the oscillation circuit using the SAW resonator is excellent in frequency accuracy and temperature characteristics, the cost of the SAW resonator is high, which prevents the cost of the RF modulator from being reduced.

【0006】そこで、コストの高いSAWレゾネータを
用いずに、安価な空芯コイルとコンデンサとバラクタダ
イオードを使用して、電圧制御型発振回路を構成するこ
とが考えられるが、このような所謂LC発振回路では、
周波数精度と温度による周波数ドリフトが大きく、一般
的なRFモジュレータの周波数精度の規格値:±80M
Hzを満足できないという問題がある。
Therefore, it is conceivable to construct a voltage controlled oscillation circuit by using an inexpensive air-core coil, a capacitor and a varactor diode without using a costly SAW resonator. Such a so-called LC oscillation In the circuit,
Frequency drift due to frequency precision and temperature is large, and standard value of frequency precision of general RF modulator: ± 80M
There is a problem that Hz cannot be satisfied.

【0007】[0007]

【課題を解決するための手段】上記課題を解決するため
に本発明では、基準入力信号と、所定の周波数で発振す
る電圧制御型の発振回路と、該発振回路からの発振周波
数信号を可変分周する可変分周手段と、該可変分周手段
によって分周された可変分周信号と前記基準入力信号と
の位相を比較する位相比較手段と、該位相比較手段によ
り検出された位相差信号を積分して前記発振回路に供給
するローパスフィルタとから成るPLL(Phase
Locked Loop)回路を有するRFモジュレー
タにおいて、前記可変分周手段の分周比を切り換える分
周比切換手段を設けたRFモジュレータを提供せんとす
るものである。
In order to solve the above problems, the present invention provides a reference input signal, a voltage control type oscillation circuit which oscillates at a predetermined frequency, and an oscillation frequency signal from the oscillation circuit which is variable. A variable frequency dividing means for performing frequency division, a phase comparing means for comparing the phases of the variable frequency dividing signal frequency-divided by the variable frequency dividing means and the reference input signal, and a phase difference signal detected by the phase comparing means. A PLL (Phase) including a low-pass filter that integrates and supplies to the oscillation circuit.
In an RF modulator having a Locked Loop circuit, an RF modulator provided with a frequency division ratio switching means for switching the frequency division ratio of the variable frequency division means is provided.

【0008】また本発明では、前記分周比切換手段は、
RFモジュレータの使用される国を選択する第1の選択
手段と、該第1の選択手段で選択された国におけるHi
チャンネルまたはLoチャンネルの何れかを選択する第
2の選択手段とを備える。
Further, in the present invention, the dividing ratio switching means is
First selecting means for selecting a country in which the RF modulator is used, and Hi in the country selected by the first selecting means
Second selecting means for selecting either the channel or the Lo channel.

【0009】[0009]

【発明の実施の形態】以下、図面を参照しつつ本発明の
一実施形態につき詳述する。
BEST MODE FOR CARRYING OUT THE INVENTION An embodiment of the present invention will be described in detail below with reference to the drawings.

【0010】本発明では、RFモジュレータをPLL
(Phase Locked Loop)周波数シンセ
サイザ方式とすることにより、高い周波数精度を保ちな
がら、簡便で安価なRFモジュレータとすることが出来
る。
In the present invention, the RF modulator is a PLL.
By using the (Phase Locked Loop) frequency synthesizer method, a simple and inexpensive RF modulator can be provided while maintaining high frequency accuracy.

【0011】図1に本発明のRFモジュレータの要部回
路構成を示す。同図において基準入力信号(x’ta
l)は水晶発振子からの4MHzの発振周波数信号、1
はこの基準入力信号を1/512に分周して基準周波数
(fr)信号を生成する1/N分周回路(N=51
2)、4は所定の周波数で発振する電圧制御型発振回
路、5は1/P分周器、6は前記電圧制御型発振回路4
からの発振周波数信号を1/P分周器5を介してさらに
可変分周する可変分周回路、2は前記可変分周回路6に
よって分周された可変分周信号と前記基準入力信号との
位相を比較する位相検波回路、3は前記位相検波回路2
により検出された位相差信号を積分して前記電圧制御型
発振回路4に供給するローパスフィルタ、7は前記可変
分周回路6の分周比を切り換える分周比選切回路、S1
及びS2は直流電位を設定する選択端子である。
FIG. 1 shows the circuit configuration of the essential parts of the RF modulator of the present invention. In the figure, the reference input signal (x'ta
l) is an oscillation frequency signal of 4 MHz from a crystal oscillator, 1
Is a 1 / N divider circuit (N = 51) that divides this reference input signal to 1/512 to generate a reference frequency (fr) signal.
2), 4 is a voltage control type oscillation circuit that oscillates at a predetermined frequency, 5 is a 1 / P frequency divider, and 6 is the voltage control type oscillation circuit 4
A variable frequency dividing circuit for further variably frequency dividing the oscillation frequency signal from 1 through the 1 / P frequency divider 5 includes a variable frequency dividing signal frequency-divided by the variable frequency dividing circuit 6 and the reference input signal. Phase detection circuit for comparing phases, 3 is the phase detection circuit 2
A low-pass filter for integrating the phase difference signal detected by the above and supplying it to the voltage controlled oscillation circuit 4, a frequency division ratio selection circuit 7 for switching the frequency division ratio of the variable frequency division circuit 6, S1
And S2 are selection terminals for setting the DC potential.

【0012】該各選択端子のクローズ(Lo)及びオー
プン(Hi)によって、前記分周比選択回路7が可変分
周回路6の分周比を選択的に切り換えることで、出力周
波数foを所望のチャンネルの周波数に設定するように
構成されている。
The frequency division ratio selection circuit 7 selectively switches the frequency division ratio of the variable frequency division circuit 6 by closing (Lo) and opening (Hi) the respective selection terminals, so that the desired output frequency fo can be obtained. It is configured to set the frequency of the channel.

【0013】即ち、前記出力周波数(fo)は次式で求
められ、
That is, the output frequency (fo) is obtained by the following equation,

【0014】[0014]

【数1】 [Equation 1]

【0015】上記式において、fr=4MHz/512
=7.8125KHz、P=32とし、可変分周回路6
の分周比:Xを選択端子S1及び選択端子S2の各状態
と連動して下記の表のようになるように選択することに
より、
In the above equation, fr = 4 MHz / 512
= 7.8125 KHz, P = 32, the variable frequency dividing circuit 6
By selecting the frequency division ratio X of X in accordance with the states of the selection terminal S1 and the selection terminal S2 as shown in the table below,

【0016】[0016]

【表1】 [Table 1]

【0017】選択端子S1をクローズ(Lo)にすると
USAチャンネル、選択端子S1をオープン(Hi)に
すると日本チャンネルが選択され、さらに選択端子S2
をクローズ(Lo)にするとHiチャンネル(USA:
4ch、日本:2ch)、選択端子S2をオープン(H
i)にするとLoチャンネル(USA:3ch、日本:
1ch)が選択される。
When the selection terminal S1 is closed (Lo), the USA channel is selected, and when the selection terminal S1 is opened (Hi), the Japanese channel is selected. Further, the selection terminal S2 is selected.
When closed (Lo), Hi channel (USA:
4ch, Japan: 2ch), select terminal S2 open (H
If set to i), Lo channel (USA: 3ch, Japan:
1ch) is selected.

【0018】このように構成することで、1つのRFモ
ジュレータにおいて、例えば前記各選択端子の状態をジ
ャンパーチップの有無で設定するなどして、簡単に仕向
地を使い分けることが可能となる。
With this configuration, in one RF modulator, it becomes possible to easily use different destinations, for example, by setting the state of each selection terminal by the presence or absence of a jumper chip.

【0019】前記Hiチャンネル及びLoチャンネルを
切換える選択端子S2には、VTR本体からの電気信
号、或いはメカ式スイッチ等によってOV(Lo)また
はオープン(Hi)の電位が加えられる。
To the selection terminal S2 for switching between the Hi channel and the Lo channel, an electric signal from the VTR main body or an OV (Lo) or open (Hi) potential is applied by a mechanical switch or the like.

【0020】本発明の回路は、取り扱う周波数が100
MHz以下と低いため、UHF帯にありがちな特別な高
周波技術を必要としない。そして100MHz程度に対
応できる可変分周回路を使用すれば、1/P分周回路5
を削除でき、より簡素な回路とすることが可能である。
The circuit of the present invention handles 100 frequencies.
Since it is as low as MHz or less, it does not require a special high frequency technology which is often found in the UHF band. If a variable frequency dividing circuit that can handle about 100 MHz is used, the 1 / P frequency dividing circuit 5
Can be eliminated, and a simpler circuit can be obtained.

【0021】尚、上記回路における基準入力信号(x’
tal)を供給する水晶発振子を、他の回路ブロックの
水晶発振子を共用することも出来る。例えばテレビジョ
ンチューナのPLL用の4MHzの発振周波数信号や、
VTR本体側の映像信号処理用の3.58MHzの発振
周波数信号を利用することで、4MHzの発振周波数信
号を生成するための水晶振動子を無くすことが出来る。
The reference input signal (x '
It is also possible to share the crystal oscillator that supplies tal) with the crystal oscillator of another circuit block. For example, a 4 MHz oscillation frequency signal for PLL of a television tuner,
By utilizing the oscillation frequency signal of 3.58 MHz for processing the video signal on the VTR main body side, the crystal oscillator for generating the oscillation frequency signal of 4 MHz can be eliminated.

【0022】さらに、テレビジョンチューナのPLL用
の水晶振動子を利用する場合、テレビジョンチューナの
PLL回路より1/512に分周された後の基準周波数
信号(7.8125MHz)を引用すると、1/N分周
回路1が不要となるだけでなく、チューナとRFモジュ
レータとの距離が長くても、その信号による相互の干渉
が極めて起こりにくくなる。
Further, when the crystal oscillator for the PLL of the television tuner is used, when the reference frequency signal (7.8125 MHz) after being divided into 1/512 by the PLL circuit of the television tuner is quoted: Not only is the / N frequency dividing circuit 1 unnecessary, but even if the distance between the tuner and the RF modulator is long, mutual interference due to the signals is extremely unlikely to occur.

【0023】さらに、USAチャンネル及び日本チャン
ネルともに、LoチャンネルとHiチャンネルとの周波
数差は6MHzであるので、位相検波回路2の引き込み
範囲を広帯域にし、6MHzの周波数差を引き込めるよ
うな回路構成とすれば、電圧制御型発振回路4における
LC発振回路にバラクタダイオードを使用する必要が無
くなり、さらに回路の簡素化及びコストダウンに貢献す
ることが出来る。
Further, since the frequency difference between the Lo channel and the Hi channel is 6 MHz for both the USA channel and the Japan channel, the phase detection circuit 2 has a wide pull-in range and a circuit configuration capable of pulling in the frequency difference of 6 MHz. Then, it is not necessary to use a varactor diode in the LC oscillation circuit in the voltage controlled oscillation circuit 4, which can further contribute to simplification of the circuit and cost reduction.

【0024】[0024]

【発明の効果】以上、詳述した如く本発明に依れば、基
準入力信号と、所定の周波数で発振する電圧制御型の発
振回路と、該発振回路からの発振周波数信号を可変分周
する可変分周手段と、該可変分周手段によって分周され
た可変分周信号と前記基準入力信号との位相を比較する
位相比較手段と、該位相比較手段により検出された位相
差信号を積分して前記発振回路に供給するローパスフィ
ルタとから成るPLL(Phase Locked L
oop)回路を有するRFモジュレータにおいて、前記
可変分周手段の分周比を切り換える分周比切換手段を設
けたので、高価なSAWレゾネータを設けることなくU
SAチャンネル及び日本チャンネルに対応するRFモジ
ュレータとすることが出来、部品点数の低減及びコスト
ダウンに極めて有益である。
As described above in detail, according to the present invention, the reference input signal, the voltage control type oscillation circuit which oscillates at a predetermined frequency, and the oscillation frequency signal from the oscillation circuit are frequency-divided. Variable frequency dividing means, phase comparing means for comparing the phases of the variable frequency dividing signal frequency-divided by the variable frequency dividing means and the reference input signal, and the phase difference signal detected by the phase comparing means is integrated. And a low-pass filter for supplying the oscillation circuit to the oscillation circuit (Phase Locked L).
In the RF modulator having the loop circuit, since the frequency division ratio switching means for switching the frequency division ratio of the variable frequency division means is provided, it is possible to provide U without the expensive SAW resonator.
It can be used as an RF modulator corresponding to the SA channel and the Japanese channel, which is extremely useful for reducing the number of parts and cost.

【0025】また本発明に依れば、前記分周比切換手段
は、RFモジュレータの使用される国を選択する第1の
選択手段と、該第1の選択手段で選択された国における
HiチャンネルまたはLoチャンネルの何れかを選択す
る第2の選択手段とを備えたので、簡単にUSAチャン
ネルと日本チャンネルとの切り換え及びHiチャンネル
及びLoチャンネルとの切り換えを行うことが出来る。
Further, according to the present invention, the division ratio switching means includes first selecting means for selecting a country in which the RF modulator is used, and Hi channel in the country selected by the first selecting means. Further, since the second selection means for selecting any one of the Lo channels is provided, it is possible to easily switch between the USA channel and the Japanese channel and the Hi channel and the Lo channel.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明のRFモジュレータの要部構成を示す回
路ブロック図。
FIG. 1 is a circuit block diagram showing a main configuration of an RF modulator of the present invention.

【図2】従来のRFモジュレータの構成を示す回路ブロ
ック図。
FIG. 2 is a circuit block diagram showing a configuration of a conventional RF modulator.

【符号の説明】[Explanation of symbols]

1 1/N分周比回路 2 位相検波回路 3 ローパスフィルタ 4 電圧制御型発振回路 5 1/P分周回路 6 可変分周回路 7 分周比選択回路 S1 選択端子 S2 選択端子 1 1 / N division ratio circuit 2 phase detection circuit 3 low pass filter 4 voltage control type oscillation circuit 5 1 / P division circuit 6 variable division circuit 7 division ratio selection circuit S1 selection terminal S2 selection terminal

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 基準入力信号と、所定の周波数で発振す
る電圧制御型の発振回路と、該発振回路からの発振周波
数信号を可変分周する可変分周手段と、該可変分周手段
によって分周された可変分周信号と前記基準入力信号と
の位相を比較する位相比較手段と、該位相比較手段によ
り検出された位相差信号を積分して前記発振回路に供給
するローパスフィルタとから成るPLL(Phase
Locked Loop)回路を有するRFモジュレー
タにおいて、前記可変分周手段の分周比を切り換える分
周比切換手段を設けたことを特徴とするRFモジュレー
タ。
1. A reference input signal, a voltage-controlled oscillating circuit that oscillates at a predetermined frequency, a variable frequency dividing means that variably divides an oscillation frequency signal from the oscillating circuit, and a variable frequency dividing means. A PLL comprising phase comparison means for comparing the phases of the divided variable frequency divided signal and the reference input signal, and a low-pass filter for integrating the phase difference signal detected by the phase comparison means and supplying it to the oscillation circuit. (Phase
An RF modulator having a Locked Loop circuit, characterized in that frequency division ratio switching means for switching the frequency division ratio of the variable frequency division means is provided.
【請求項2】 前記分周比切換手段は、RFモジュレー
タの使用される国を選択する第1の選択手段と、該第1
の選択手段で選択された国におけるHiチャンネルまた
はLoチャンネルの何れかを選択する第2の選択手段と
を備えたことを特徴とする請求項1記載のRFモジュレ
ータ。
2. The frequency division ratio switching means includes first selection means for selecting a country in which the RF modulator is used, and the first selection means.
The RF modulator according to claim 1, further comprising a second selection unit that selects either the Hi channel or the Lo channel in the country selected by the selection unit.
JP22440995A 1995-08-31 1995-08-31 RF modulator Expired - Fee Related JP3322534B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP22440995A JP3322534B2 (en) 1995-08-31 1995-08-31 RF modulator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22440995A JP3322534B2 (en) 1995-08-31 1995-08-31 RF modulator

Publications (2)

Publication Number Publication Date
JPH0969986A true JPH0969986A (en) 1997-03-11
JP3322534B2 JP3322534B2 (en) 2002-09-09

Family

ID=16813320

Family Applications (1)

Application Number Title Priority Date Filing Date
JP22440995A Expired - Fee Related JP3322534B2 (en) 1995-08-31 1995-08-31 RF modulator

Country Status (1)

Country Link
JP (1) JP3322534B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20040005489A (en) * 2002-07-10 2004-01-16 삼성전기주식회사 RADIO FREQUENCY MODULATOR USING Phase Lock Loop
DE102004020632A1 (en) * 2004-02-27 2005-09-29 Samsung Electro - Mechanics Co., Ltd. High frequency (RF) modulator with narrow bandpass filter

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20040005489A (en) * 2002-07-10 2004-01-16 삼성전기주식회사 RADIO FREQUENCY MODULATOR USING Phase Lock Loop
DE102004020632A1 (en) * 2004-02-27 2005-09-29 Samsung Electro - Mechanics Co., Ltd. High frequency (RF) modulator with narrow bandpass filter

Also Published As

Publication number Publication date
JP3322534B2 (en) 2002-09-09

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