JPH0964025A - Manufacturing method for semiconductor device - Google Patents

Manufacturing method for semiconductor device

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Publication number
JPH0964025A
JPH0964025A JP22188695A JP22188695A JPH0964025A JP H0964025 A JPH0964025 A JP H0964025A JP 22188695 A JP22188695 A JP 22188695A JP 22188695 A JP22188695 A JP 22188695A JP H0964025 A JPH0964025 A JP H0964025A
Authority
JP
Japan
Prior art keywords
film
flow rate
chamber
teos
temperature
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP22188695A
Other languages
Japanese (ja)
Other versions
JP2758860B2 (en
Inventor
Akira Kobayashi
公 小林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Yamagata Ltd
Original Assignee
NEC Yamagata Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Yamagata Ltd filed Critical NEC Yamagata Ltd
Priority to JP22188695A priority Critical patent/JP2758860B2/en
Publication of JPH0964025A publication Critical patent/JPH0964025A/en
Application granted granted Critical
Publication of JP2758860B2 publication Critical patent/JP2758860B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Chemical Vapour Deposition (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device having a silicon oxide film whose film quality in the depth direction is uniform and which is superior in coverage as an inter-layer insulation film, by film-forming until the temperature of a substrate in a chamber becomes set temperature, while flow rate of raw material gas is gradually increased. SOLUTION: A silicon oxide film is formed an a semiconductor substrate in a chamber in a plasma CVD method using organic system raw material gas, for manufacturing a semiconductor device. At this time, film formation is done until the temperature of the substrate in the chamber becomes set temperature, while flow rate of the raw material gas is gradually increased. For example, first, He acting as diluting gas and O2 acting as auxiliary material gas are introduced into the chamber, and the inside of chamber is adjusted at a specified pressure. Then TEOS introduction and RF discharge are started at the same time, the TEOS flow rate is adjusted until reaches set flow rate with the use of lamp up method. The gradient of the lamp up is about TEOS set flow rate × 0.1per second, and lamp up time is about 10 seconds.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は半導体装置の製造方
法に関し、特に有機系原料ガスを用いるプラズマCVD
法による酸化シリコン膜の形成方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to plasma CVD using an organic source gas.
The present invention relates to a method for forming a silicon oxide film by the method.

【0002】[0002]

【従来の技術】半導体装置の製造工程においては種々の
絶縁膜が用いられている。半導体装置の高集積化により
配線間隔の縮小や多層化が進められるに伴ない、段差部
の平坦化の為に層間絶縁膜としては低温で形成できしか
もカバレッジに優れたものが要求されてきている。この
条件を満たす絶縁膜としては、有機系原料ガス、例えば
TEOS(テトラ エチル オルソ シリケート)を用
いるプラズマCVD法による酸化シリコン(SiO2
膜がある。
2. Description of the Related Art Various insulating films are used in the manufacturing process of semiconductor devices. Along with the shrinking of wiring intervals and the progress of multi-layering due to the high integration of semiconductor devices, an interlayer insulating film that can be formed at a low temperature and has excellent coverage has been required to flatten the step portion. . As an insulating film satisfying this condition, silicon oxide (SiO 2 ) formed by a plasma CVD method using an organic source gas such as TEOS (tetraethyl orthosilicate)
There is a membrane.

【0003】このSiO2 膜の形成方法は、原料ガス
(TEOS及びO2 )をチャンバ内に導入し、約350
℃の成膜温度に基板を加熱すると共にチャンバ内の圧力
を所定圧にした状態でRF放電により原料ガスをプラズ
マ状態にして、基板上にSiO2 膜を堆積させる方法で
ある。以下図面を用いて更に説明する。
In this method of forming a SiO 2 film, a raw material gas (TEOS and O 2 ) is introduced into the chamber to obtain about 350
This is a method of depositing a SiO 2 film on the substrate by heating the substrate to a film forming temperature of ° C and making the source gas into a plasma state by RF discharge while keeping the pressure in the chamber at a predetermined pressure. Further description will be given below with reference to the drawings.

【0004】図4は、TEOSを用いSiO2 膜を成膜
する場合のガス導入とRF放電のタイミング図である。
SiO2 膜の成膜は、まずチャンバ内に、副原料ガスで
あるO2 と希釈用ガスであるHeを導入し、この後チャ
ンバ内の圧力を所定の圧力に調整する。チャンバ内の圧
力が安定した後、TEOSをチャンバ内に導入すると同
時にRF放電を開始する。なお、チャンバ内圧力の調整
及びその安定に要する時間は、CVD装置の種類によっ
て異なるが、枚葉式装置で5秒程度は必要である為TE
OS導入及びRF放電はO2 及びHe導入後約5秒を経
過した時点で開始されている。SiO2 の成膜中は、ガ
ス導入とRF放電が連続的に行なわれており、成膜時間
が経過したときに、RF放電と全てのガス導入を同時に
停止させている。
FIG. 4 is a timing chart of gas introduction and RF discharge when forming a SiO 2 film using TEOS.
In forming the SiO 2 film, first, O 2 as a sub-source gas and He as a diluting gas are introduced into the chamber, and then the pressure in the chamber is adjusted to a predetermined pressure. After the pressure in the chamber becomes stable, TEOS is introduced into the chamber and RF discharge is started at the same time. The time required for adjusting the pressure in the chamber and stabilizing it varies depending on the type of the CVD apparatus, but it takes about 5 seconds for a single-wafer type apparatus, so TE
The introduction of the OS and the RF discharge are started about 5 seconds after the introduction of O 2 and He. During the film formation of SiO 2 , gas introduction and RF discharge are continuously performed, and when the film formation time has elapsed, RF discharge and all gas introduction are stopped at the same time.

【0005】[0005]

【発明が解決しようとする課題】上述した従来の有機系
原料ガスを用いるプラズマCVD法で形成されたSiO
2 膜は、深さ方向の膜質が均一でなく、特に成長初期に
形成された膜は膜質が粗になっている。この為、例えば
このSiO2 膜を配線間の層間絶縁膜として用いスルー
ホールを形成した場合、良好なスルーホール形状が得ら
れないという問題点がある。又、SiO2 間を薄く形成
した場合、膜質が不均一な為ピンホールやウィークスポ
ット等の欠陥が生じ、絶縁破壊耐圧の劣化が生じる。
SiO formed by the plasma CVD method using the above-mentioned conventional organic source gas.
The two films did not have uniform film quality in the depth direction, and the film formed especially in the initial stage of growth had a rough film quality. Therefore, if a through hole is formed by using this SiO 2 film as an interlayer insulating film between wirings, there is a problem that a good through hole shape cannot be obtained. Further, when the SiO 2 layer is thinly formed, defects such as pinholes and weak spots occur due to nonuniform film quality, and the breakdown voltage is deteriorated.

【0006】このように成長初期のSiO2 膜の膜質が
粗になるのは、成長初期(RF放電開始時)は、反応温
度が上昇する過渡期にある為、有機原料ガスの分解とO
2 による酸化が不十分な為と考えられる。又膜成長の初
期においては導入するTEOSの流量が設定流量に対し
て、オーバーシュートする為にSiO2 膜は粗膜にな
る。
[0006] The reason why the quality of the SiO 2 film at the initial stage of growth is rough as described above is that the initial stage of growth (at the start of RF discharge) is in the transition period in which the reaction temperature rises.
It is considered that the oxidation by 2 was insufficient. At the initial stage of film growth, the flow rate of TEOS to be introduced overshoots the set flow rate, so that the SiO 2 film becomes a rough film.

【0007】SiH4 を主原料ガスとしたCVD法によ
りシリコン系薄膜(酸化シリコン,窒化シリコン,水素
化アモルファスシリコン)を形成する際に、下層部分の
膜質の異なりをなくし、全体の膜質を均一にする為に、
まず希釈用のガスをチャンバー内に導入し基板温度と圧
力を調整した後にRF放電を開始し、次で原料ガスをチ
ャンバー内に導入する方法が特開平4−123424号
公報に記載されている。
When a silicon-based thin film (silicon oxide, silicon nitride, hydrogenated amorphous silicon) is formed by the CVD method using SiH 4 as a main source gas, the difference in the film quality of the lower layer is eliminated and the overall film quality is made uniform. In order to
JP-A-4-123424 discloses a method in which a diluting gas is first introduced into a chamber, the substrate temperature and pressure are adjusted, RF discharge is started, and then a source gas is introduced into the chamber.

【0008】しかし、この方法を有機系原料ガスを用い
るCVD法で試みたが、十分均一なSiO2 膜は得られ
なかった。しかもこの方法では、基板温度が一定になる
迄膜成長ができない為、スループットが低下するという
欠点がある。又SiH4 を主原料ガスとするSiO2
はカバレッジが悪い為層間絶縁膜としては不適当であ
る。
However, when this method was tried by a CVD method using an organic source gas, a sufficiently uniform SiO 2 film could not be obtained. Moreover, this method has a drawback that the throughput is lowered because the film cannot be grown until the substrate temperature becomes constant. Further, a SiO 2 film using SiH 4 as a main raw material gas has poor coverage and is not suitable as an interlayer insulating film.

【0009】本発明の目的は、深さ方向の膜質が均一で
しかも層間絶縁膜としてカバレッジに優れた酸化シリコ
ン膜を有する半導体装置の製造方法を提供することにあ
る。
An object of the present invention is to provide a method of manufacturing a semiconductor device having a silicon oxide film having uniform film quality in the depth direction and excellent coverage as an interlayer insulating film.

【0010】[0010]

【課題を解決するための手段】本発明の半導体装置の製
造方法は、有機系原料ガスを用いるプラズマCVD法に
よりチャンバー内の半導体基板上に酸化シリコン膜を形
成する半導体装置の製造方法において、前記チャンバー
内の前記基板の温度が設定温度になる迄前記原料ガスの
流量を徐々に増加させながら成膜することを特徴とする
ものである。
A method of manufacturing a semiconductor device according to the present invention is a method of manufacturing a semiconductor device, wherein a silicon oxide film is formed on a semiconductor substrate in a chamber by a plasma CVD method using an organic source gas. It is characterized in that the film is formed while gradually increasing the flow rate of the source gas until the temperature of the substrate in the chamber reaches a set temperature.

【0011】[0011]

【作用】従来の成膜方法では、まず、チャンバー内に、
副原料ガスであるO2 と希釈用ガスであるHeを導入
し、圧力を安定させた後、TEOSを導入し、同時にR
F放電を行なっている為に、ウェハー表面温度(反応温
度)は、プラズマ放電開始とともに上昇し、ある温度で
飽和する。このウェハー表面温度上昇中も成膜を行なっ
ている為に成長初期のウェーハ温度上昇領域とその後の
ウェーハ温度飽和領域とではSiO2 膜の膜質が異なっ
てくる。すなわち成長初期の膜は、成長温度が低い為
に、粗膜となり、このSiO2 膜にスルーホールを形成
した場合その形状が悪化し、又ピンホールやウィークス
ポット等の欠陥発生により半導体装置の特性が不安定と
なる。
In the conventional film forming method, first, in the chamber,
After introducing O 2 as a sub-source gas and He as a diluting gas to stabilize the pressure, TEOS is introduced, and at the same time R
Since the F discharge is performed, the wafer surface temperature (reaction temperature) rises with the start of plasma discharge and becomes saturated at a certain temperature. Since film formation is performed even while the wafer surface temperature rises, the film quality of the SiO 2 film differs between the wafer temperature rise region at the initial stage of growth and the wafer temperature saturation region thereafter. That is, since the growth temperature is low, the film in the initial stage of growth becomes a rough film, and when a through hole is formed in this SiO 2 film, its shape is deteriorated, and defects such as pinholes and weak spots are generated, resulting in the characteristics of the semiconductor device. Becomes unstable.

【0012】本発明では、まず副原料ガスであるO2
び希釈用ガスであるHeをチャンバ内に導入し、圧力調
整を行う。その後、RF放電と同時に主原料であるTE
OS流量を徐々に増加(ランプアップ)しながら導入す
ることにより、成長初期に生じるチャンバー内の温度上
昇に伴う膜質変化を補正するものである。
In the present invention, first, O 2 as a sub-source gas and He as a diluting gas are introduced into the chamber to adjust the pressure. Then, at the same time as the RF discharge, TE which is the main raw material
By introducing while gradually increasing (ramping up) the OS flow rate, the film quality change due to the temperature rise in the chamber occurring at the initial stage of growth is corrected.

【0013】図3に示すように、成膜時のTEOSの流
量が多くなる程、堆積されたSiO2 膜の膜質は粗にな
る為エッチング速度は大きくなる。すなわち、導入する
TEOSの流量に関して云えば、流量が少い方がSiO
2 膜の膜質を密にできる為、低温による膜質の粗を補正
できる。従ってウェーハの温度が上昇し一定になる迄T
EOSの流量を徐々に増加させることにより、成膜初期
におけるSiO2 膜の膜質をウェーハ温度が一定になっ
た時のSiO2 膜のものとほぼ同一にすることができ
る。尚、主原料であるTEOSの流量を徐々に増加させ
ることによりオーバーシュートを防止することが可能で
ある。
As shown in FIG. 3, the higher the flow rate of TEOS during film formation, the coarser the quality of the deposited SiO 2 film becomes, and the higher the etching rate becomes. That is, as for the flow rate of TEOS to be introduced, the lower flow rate is SiO 2.
Since the film quality of the two films can be made dense, the roughness of the film quality due to low temperature can be corrected. Therefore, until the wafer temperature rises and becomes constant, T
By gradually increasing the flow rate of EOS, the film quality of the SiO 2 film at the initial stage of film formation can be made almost the same as that of the SiO 2 film when the wafer temperature is constant. It is possible to prevent overshoot by gradually increasing the flow rate of TEOS, which is the main raw material.

【0014】[0014]

【発明の実施の形態】次に本発明について図面を参照し
て説明する。図1は本発明の一実施の形態を説明する為
のガス導入とRF放電のタイミング図、図2は本実施の
形態に用いるプラズマCVD装置の構成図である。以下
装置の構成と共に説明する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings. FIG. 1 is a timing diagram of gas introduction and RF discharge for explaining an embodiment of the present invention, and FIG. 2 is a configuration diagram of a plasma CVD apparatus used in the present embodiment. The configuration of the device will be described below.

【0015】チャンバー1内にはウェーハ11を設置す
る為のヒータ付きサセプタ3と、このサセプタ3に対向
して原料ガスを導入するシャワープレート2が設けられ
ている。そしてチャンバー1内は真空ポンプ4により真
空状態(3〜4Torr)に保持される。主原料ガスで
あるTEOSはヒータにより約80℃に加熱されたTE
OS供給器7よりマスフローコントローラ6により流量
が制御されてシャワープレート2に供給される。TEO
Sと同様に副原料ガスであるO2 及びキャリア(希釈
用)ガスであるHeも同時にチャンバー1内に導入され
る。尚、バルブ8,9とマスフローコントローラ6及び
これらに接続するチャンバー1までの配管10はTEO
Sの液化防止の為にヒータにより加熱されている。又5
はRF発振器であり、シャワープレート2とサセプタ3
間にプラズマを発生させる。
Inside the chamber 1, there are provided a susceptor 3 with a heater for placing a wafer 11 and a shower plate 2 facing the susceptor 3 for introducing a raw material gas. The inside of the chamber 1 is maintained in a vacuum state (3 to 4 Torr) by the vacuum pump 4. TEOS which is the main raw material gas is TE heated to about 80 ° C by a heater.
The mass flow controller 6 controls the flow rate from the OS supplier 7 and supplies the shower plate 2 with the flow rate. TEO
Similar to S, O 2 as a sub-source gas and He as a carrier (diluting) gas are simultaneously introduced into the chamber 1. The valves 8 and 9, the mass flow controller 6 and the pipe 10 to the chamber 1 connected to them are TEO.
It is heated by a heater to prevent S liquefaction. Again 5
Is an RF oscillator, the shower plate 2 and the susceptor 3
Plasma is generated between them.

【0016】このように構成されたCVD装置を用いウ
ェーハ11上にSiO2 膜を形成する場合は、図1に示
したように、まず、チャンバ内1に希釈用ガスであるH
eと副原料ガスであるO2 を導入し、チャンバ1内を所
定の圧力に調整する。HeとO2 を導入してから圧力が
安定するまでの時間は、装置の種類により異なってくる
が、本実施の形態例の枚葉式プラズマCVD装置の場合
は5秒程度必要である。従ってTEOS導入及びRF放
電は、O2 及びHeガス導入後5秒を経過した時点で開
始される。
When a SiO 2 film is formed on the wafer 11 by using the CVD apparatus having the above-described structure, first, as shown in FIG.
Introducing e and O 2 which is the auxiliary material gas, the inside of the chamber 1 is adjusted to a predetermined pressure. The time from the introduction of He and O 2 until the pressure becomes stable depends on the type of the apparatus, but in the case of the single wafer plasma CVD apparatus of the present embodiment, it takes about 5 seconds. Therefore, the introduction of TEOS and the RF discharge are started 5 seconds after the introduction of O 2 and He gas.

【0017】TEOS導入とRF放電は同時に開始する
か、又はRF放電の開始後にTEOSを導入する。TE
OS流量は設定流量に達するまでランプアップ方式を用
いて調整される。例えば、このランプアップの勾配は、
1秒間にTEOS設定流量×0.1程度で十分であり、
この時のランプアップ時間は、10秒程度必要である。
この時間は、成長初期のウェーハの温度が飽和温度に達
する迄の時間とほぼ同一である。
Introduction of TEOS and RF discharge are started at the same time, or TEOS is introduced after the start of RF discharge. TE
The OS flow rate is adjusted using a ramp-up method until the set flow rate is reached. For example, the slope of this ramp up is
A TEOS setting flow rate of about 0.1 per second is sufficient,
The ramp-up time at this time requires about 10 seconds.
This time is almost the same as the time until the temperature of the wafer in the initial stage of growth reaches the saturation temperature.

【0018】TEOSによるSiO2 成膜中は、ガス導
入とRF放電が連続的に行なわれており、所定の成膜時
間が経過したとき、まず主原料ガスであるTEOS流量
をエアオペレーションバルブ9で停止し、配管10内の
残留TEOSを排出した後にO2 とHe及びRF放電を
同時に停止する事が望ましい。主原料ガスであるTEO
S流量を停止してから、RF放電停止までの時間は、配
管長により異なってくるが、5秒程度で十分である。
During the SiO 2 film formation by TEOS, gas introduction and RF discharge are continuously performed, and when a predetermined film formation time elapses, first, the TEOS flow rate as the main raw material gas is adjusted by the air operation valve 9. It is desirable to stop and discharge the residual TEOS in the pipe 10 and then simultaneously stop O 2 , He and RF discharge. TEO, the main source gas
The time from the stop of the S flow rate to the stop of the RF discharge varies depending on the pipe length, but about 5 seconds is sufficient.

【0019】上記、成膜方法を用いる事により成長初期
のSiO2 膜が硬質化し、成長初期の低温度による膜質
の粗を補正する事ができ、深さ方向での膜質が均一にな
る。この為、このSiO2 を層間絶縁膜として用いても
良好なスルーホールの形状が得られる。更にピンホール
やウィークスポットの欠陥を生じることがなく、絶縁破
壊耐圧も十分な酸化膜を成膜することができる。しかも
低温状態から成膜可能な為、スループットは向上したも
のとなる。
By using the above-described film forming method, the SiO 2 film in the initial stage of growth is hardened, and the roughness of the film quality due to the low temperature in the initial stage of growth can be corrected, and the film quality in the depth direction becomes uniform. Therefore, even if this SiO 2 is used as an interlayer insulating film, a good through hole shape can be obtained. Further, it is possible to form an oxide film having a sufficient breakdown voltage without causing defects such as pinholes and weak spots. Moreover, since the film can be formed from the low temperature state, the throughput is improved.

【0020】尚、上記実施の形態では有機系原料ガスと
したTEOSを用いた場合について説明したが、OMC
TS(オクタ メチル シクロ テトラ シロキサン:
Si4 8 244 )をTEOSと同様に用いることも
できる。又副原料ガスとしてO2 を用いたが、O3 を用
いても同様の効果が得られる。
In the above embodiment, the case where TEOS is used as the organic source gas has been described.
TS (octamethyl cyclo tetra siloxane:
Si 4 C 8 H 24 O 4 ) can be used as well as TEOS. Although O 2 was used as the auxiliary material gas, the same effect can be obtained by using O 3 .

【0021】[0021]

【発明の効果】以上説明したように本発明は、有機系原
料ガスを用いるプラズマCVD法により酸化シリコン膜
を形成する場合に、基板の温度が設定温度になる迄原料
ガスの流量を徐々に増加させて成膜することにより、成
膜初期における膜質を密にできる為、スループットを低
下させることなく深さ方向の膜質を均一にすることがで
きるという効果がある。従ってこの酸化シリコン膜を層
間絶縁膜として用いた場合、カバレッジに優れスルーホ
ールを形成した場合でも良好な形状を得ることができ
る。
As described above, according to the present invention, when the silicon oxide film is formed by the plasma CVD method using the organic source gas, the flow rate of the source gas is gradually increased until the substrate temperature reaches the set temperature. Since the film quality can be made dense at the initial stage of film formation by performing the film formation in this way, there is an effect that the film quality in the depth direction can be made uniform without lowering the throughput. Therefore, when this silicon oxide film is used as an interlayer insulating film, excellent coverage can be obtained and a good shape can be obtained even when a through hole is formed.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施の形態を説明する為のガス導入
とRF放電のタイミング図。
FIG. 1 is a timing chart of gas introduction and RF discharge for explaining an embodiment of the present invention.

【図2】本発明の実施の形態に用いるCVD装置の構成
図。
FIG. 2 is a configuration diagram of a CVD apparatus used in the embodiment of the present invention.

【図3】SiO2 膜のエッチング速度のTEOS流量依
存性を示す図。
FIG. 3 is a diagram showing the TEOS flow rate dependence of the etching rate of a SiO 2 film.

【図4】従来の有機シリコン系酸化膜を形成する場合の
ガス導入とRF放電のタイミング図。
FIG. 4 is a timing chart of gas introduction and RF discharge in the case of forming a conventional organic silicon oxide film.

【符号の説明】[Explanation of symbols]

1 チャンバー 2 シャワープレート 3 サセプタ 4 真空ポンプ 5 RF発振器 6 マスフローコントローラ 7 TEOS供給器 8 エアオペレーションバルブ 9 エアオペレーションバルブ 10 配管 11 ウェーハ 1 Chamber 2 Shower Plate 3 Susceptor 4 Vacuum Pump 5 RF Oscillator 6 Mass Flow Controller 7 TEOS Supplyer 8 Air Operation Valve 9 Air Operation Valve 10 Piping 11 Wafer

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 有機系原料ガスを用いるプラズマCVD
法によりチャンバー内の半導体基板上に酸化シリコン膜
を形成する半導体装置の製造方法において、前記チャン
バー内の前記基板の温度が設定温度になる迄前記原料ガ
スの流量を徐々に増加させながら成膜することを特徴と
する半導体装置の製造方法。
1. Plasma CVD using an organic source gas
In a method of manufacturing a semiconductor device in which a silicon oxide film is formed on a semiconductor substrate in a chamber by a method, film formation is performed while gradually increasing the flow rate of the source gas until the temperature of the substrate in the chamber reaches a set temperature. A method of manufacturing a semiconductor device, comprising:
【請求項2】 有機系原料ガスの導入はRF放電の開始
と同時か又はRF放電の開始以降とする請求項1記載の
半導体装置の製造方法。
2. The method of manufacturing a semiconductor device according to claim 1, wherein the organic source gas is introduced at the same time as the start of the RF discharge or after the start of the RF discharge.
【請求項3】 有機系原料ガスはテトラ エチル オル
ソ シリケート又はオクタ メチル シクロ テトラ
シロキサンである請求項1記載の半導体装置の製造方
法。
3. The organic source gas is tetraethyl orthosilicate or octamethylcyclotetra
The method for manufacturing a semiconductor device according to claim 1, which is siloxane.
JP22188695A 1995-08-30 1995-08-30 Method for manufacturing semiconductor device Expired - Lifetime JP2758860B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP22188695A JP2758860B2 (en) 1995-08-30 1995-08-30 Method for manufacturing semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22188695A JP2758860B2 (en) 1995-08-30 1995-08-30 Method for manufacturing semiconductor device

Publications (2)

Publication Number Publication Date
JPH0964025A true JPH0964025A (en) 1997-03-07
JP2758860B2 JP2758860B2 (en) 1998-05-28

Family

ID=16773725

Family Applications (1)

Application Number Title Priority Date Filing Date
JP22188695A Expired - Lifetime JP2758860B2 (en) 1995-08-30 1995-08-30 Method for manufacturing semiconductor device

Country Status (1)

Country Link
JP (1) JP2758860B2 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7828016B2 (en) 1999-08-24 2010-11-09 Tokyo Electron Limited Gas processing apparatus, gas processing method and integrated valve unit for gas processing apparatus
JP5093479B2 (en) * 2005-11-24 2012-12-12 日本電気株式会社 Method for forming porous insulating film
US20210082732A1 (en) * 2019-09-12 2021-03-18 Applied Materials, Inc. Repulsion mesh and deposition methods
US20220119952A1 (en) * 2020-10-20 2022-04-21 Applied Materials, Inc. Method of reducing defects in a multi-layer pecvd teos oxide film

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7828016B2 (en) 1999-08-24 2010-11-09 Tokyo Electron Limited Gas processing apparatus, gas processing method and integrated valve unit for gas processing apparatus
JP5093479B2 (en) * 2005-11-24 2012-12-12 日本電気株式会社 Method for forming porous insulating film
US20210082732A1 (en) * 2019-09-12 2021-03-18 Applied Materials, Inc. Repulsion mesh and deposition methods
US20220119952A1 (en) * 2020-10-20 2022-04-21 Applied Materials, Inc. Method of reducing defects in a multi-layer pecvd teos oxide film

Also Published As

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