JPH0946002A - Semiconductor optical element and its manufacture - Google Patents

Semiconductor optical element and its manufacture

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Publication number
JPH0946002A
JPH0946002A JP21264995A JP21264995A JPH0946002A JP H0946002 A JPH0946002 A JP H0946002A JP 21264995 A JP21264995 A JP 21264995A JP 21264995 A JP21264995 A JP 21264995A JP H0946002 A JPH0946002 A JP H0946002A
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JP
Japan
Prior art keywords
growth
layer
manufacturing
mask
optical device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP21264995A
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Japanese (ja)
Other versions
JP2914235B2 (en
Inventor
Koji Kudo
耕治 工藤
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NEC Corp
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NEC Corp
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Publication of JP2914235B2 publication Critical patent/JP2914235B2/en
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Expired - Fee Related legal-status Critical Current

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Abstract

PROBLEM TO BE SOLVED: To provide a selective growth method which can change a crystalline layer thickness largely without change a crystalline strain amount almost at all in regions of different mask widths. SOLUTION: A growth blocking mask of a large number of strip-like dielectric thin films which are formed to an array shape at a period A which is shorter than a diffusion length of raw material species in vapor phase inside a reaction tube is introduced in selective growth and selective growth wherein crystal formed in an optical waveguide region between dielectric masks can largely change the thickness of a crystalline layer without changing a crystalline strain amount almost at all to change of a mask width can be realized.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は、半導体光素子の製
造方法および半導体光素子に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor optical device and a semiconductor optical device.

【0002】[0002]

【従来の技術】有機金属気相成長法(MOVPE)にお
ける、ストライプ状誘電体マスクを用いた選択成長は、
誘電体マスクの幅を変えることのみで該誘電体マスクに
挟まれた成長領域に成長される半導体結晶の組成及び層
厚を変化させることができるため、光集積素子等を作製
する基本技術として研究が盛んに行われている。
2. Description of the Related Art Selective growth using a striped dielectric mask in metal organic chemical vapor deposition (MOVPE) is
Since it is possible to change the composition and layer thickness of the semiconductor crystal grown in the growth region sandwiched by the dielectric mask only by changing the width of the dielectric mask, research as a basic technique for manufacturing an optical integrated device, etc. Is being actively conducted.

【0003】図10(A)は、従来の選択成長で用いる
誘電体マスクのパターンを模式的に示した平面図であ
る。図10(A)を参照して、従来の選択成長法では、
InP等の半導体基板1上に、幅1.5μm程度の成長
領域2を挟んで対向する一対のストライプ状誘電体薄膜
のマスク(単に「誘電体マスク」ともいう)5を形成
し、MOVPEを用いて、InGaAsP等の四元結晶
を成長領域2に選択的に成長させる。
FIG. 10A is a plan view schematically showing a pattern of a dielectric mask used in conventional selective growth. With reference to FIG. 10A, in the conventional selective growth method,
On a semiconductor substrate 1 of InP or the like, a pair of stripe-shaped dielectric thin film masks (also simply referred to as “dielectric masks”) 5 facing each other with a growth region 2 having a width of about 1.5 μm therebetween is formed, and MOVPE is used. Then, a quaternary crystal such as InGaAsP is selectively grown in the growth region 2.

【0004】この時、成長される結晶組成波長、及び結
晶層厚が、誘電体マスク5の幅を変えることのみで制御
でき、半導体レーザ、光変調器、光増幅器等の光素子を
集積した光集積素子を一括形成できるため、光集積素子
の作製法として非常に有望である。この従来技術に関す
る参考文献としては、例えば文献1(ジャーナル・オブ
・クリスタルグロース(JCG)、第132巻、第43
5頁−第443頁、1993年)が挙げられる。
At this time, the crystal composition wavelength to be grown and the crystal layer thickness can be controlled only by changing the width of the dielectric mask 5, and an optical device in which optical elements such as a semiconductor laser, an optical modulator and an optical amplifier are integrated is integrated. Since integrated devices can be formed at one time, it is a very promising method for manufacturing an optical integrated device. References relating to this prior art include, for example, Document 1 (Journal of Crystal Growth (JCG), Vol. 132, No. 43).
Pp. 5-443, 1993).

【0005】選択成長では、誘電体マスク5の幅が、よ
り広い場合に、成長領域2に成長される結晶組成が、よ
り長波長側にシフトする。例えば、図10(A)に示す
誘電体マスク5を用いて多重量子井戸を結晶成長する
と、誘電体マスク5の幅(「マスク幅」ともいう)の広
い領域aの量子井戸組成波長を1.55μmとし、マス
ク幅の狭い領域bの量子井戸組成波長を1.48μmと
することができ、領域aを半導体レーザに、領域bを光
変調器とすることで、簡単に半導体レーザ/光変調器集
積化光源が作製できる。
In the selective growth, when the width of the dielectric mask 5 is wider, the crystal composition grown in the growth region 2 shifts to the longer wavelength side. For example, when crystal growth of a multiple quantum well is performed using the dielectric mask 5 shown in FIG. 10A, the quantum well composition wavelength of a region a having a wide width (also referred to as “mask width”) of the dielectric mask 5 is 1. 55 μm, the quantum well composition wavelength of the region b having a narrow mask width can be set to 1.48 μm. By using the region a as the semiconductor laser and the region b as the optical modulator, the semiconductor laser / optical modulator can be easily manufactured. An integrated light source can be produced.

【0006】[0006]

【発明が解決しようとする課題】しかし、選択成長で結
晶組成や結晶層厚を変化させる場合、同時に結晶歪量も
変化する。例えば、マスク幅が30μm、及び4μmの
誘電体マスク5に挟まれた成長領域2に結晶組成1.3
μmのGaInAsP層を成長圧力150torrで選
択成長させる場合、結晶層厚比として、マスク幅30μ
m領域の層厚に対して、マスク幅4μm領域の層厚は1
/2以下となる。
However, when the crystal composition or the crystal layer thickness is changed by the selective growth, the crystal strain amount also changes at the same time. For example, in the growth region 2 sandwiched between the dielectric masks 5 having mask widths of 30 μm and 4 μm, the crystal composition is 1.3.
When a GaInAsP layer of μm is selectively grown at a growth pressure of 150 torr, the mask width is 30 μ as a crystal layer thickness ratio.
The layer thickness in the mask width 4 μm region is 1 with respect to the layer thickness in the m region.
/ 2 or less.

【0007】しかし、結晶歪量は、マスク幅30μm領
域の結晶歪量を0とすると、幅4μm領域では、−0.
5%程度入ってしまう。このため、マスク幅4μm領域
の結晶層厚はあまり厚くすることができない。
However, if the crystal strain amount in the mask width 30 μm region is 0, the crystal strain amount is −0.
It will be about 5%. Therefore, the crystal layer thickness in the mask width region of 4 μm cannot be made too thick.

【0008】すなわち、従来の選択成長では、結晶層厚
比を取りつつ、層厚を厚くすることができないという問
題があった。
That is, the conventional selective growth has a problem that the layer thickness cannot be increased while maintaining the crystal layer thickness ratio.

【0009】例えば、単一電流で、モード飛びのない連
続波長制御を可能とする波長可変階段型導波路構造(T
SG)DBRレーザは、その設計指針として、DBR
(分布ブラッグ反射)領域の光閉じ込め層の層厚に対し
て、位相調整領域の光閉じ込め層の層厚を2倍以上厚く
する必要がある。この要求は、上記選択成長を用いるこ
とで満足することができる。
For example, a variable wavelength stepped waveguide structure (T with a single current that enables continuous wavelength control without mode jumping)
The SG) DBR laser is designed as a DBR
The layer thickness of the light confinement layer in the phase adjustment region must be twice or more the layer thickness of the light confinement layer in the (distributed Bragg reflection) region. This requirement can be satisfied by using the above selective growth.

【0010】しかし、層厚比がとれても、歪の影響のた
めDBR領域の層厚の絶対値を大きくすることができ
ず、TSG−DBRレーザの波長可変幅を十分に広くす
ることができないという問題があった。このTSG−D
BRレーザに関する参考文献としては、文献2(電子情
報通信学会講演論文集エレクトロニクス1、C−39
0、第390頁、1995年春)が挙げられる。
However, even if the layer thickness ratio is taken, the absolute value of the layer thickness in the DBR region cannot be increased due to the influence of strain, and the wavelength tunable width of the TSG-DBR laser cannot be sufficiently widened. There was a problem. This TSG-D
References regarding BR lasers include Document 2 (Proceedings of the Institute of Electronics, Information and Communication Engineers Electronics 1, C-39).
0, p. 390, spring 1995).

【0011】従って、本発明の目的は、MOVPEを用
いた選択成長において、反応管内の気相中の原料種の拡
散長よりも短い周期Λで並列に複数本形成されたストラ
イプ状誘電体薄膜のマスクを導入することにより、前記
誘電体薄膜のマスクに挟まれた成長領域に成長される結
晶の、誘電体マスク幅に対する結晶層厚変化を大きくと
りつつ、同時に結晶歪量変化の小さい選択成長法を提供
することにある。また本発明の目的は、上記従来技術の
問題点を解消し、光導波層の結晶層厚変化を大きくとり
つつ同時に結晶歪量変化の小さい半導体光素子を提供す
ることにある。
Therefore, an object of the present invention is to provide a striped dielectric thin film formed in parallel with a period Λ shorter than the diffusion length of the raw material species in the gas phase in the reaction tube in the selective growth using MOVPE. By introducing a mask, the selective growth method in which the crystal layer thickness of the crystal grown in the growth region of the dielectric thin film sandwiched by the mask is largely changed with respect to the dielectric mask width, and at the same time the crystal strain amount is small To provide. Another object of the present invention is to solve the above-mentioned problems of the prior art and to provide a semiconductor optical device in which the crystal layer thickness of the optical waveguide layer is largely changed and at the same time the crystal strain amount is small.

【0012】[0012]

【課題を解決するための手段】前記目的を達成するた
め、本発明は、量子井戸層または、バルク層からなる半
導体多層構造を、ストライプ状誘電体薄膜に挟まれた光
導波路領域へ選択的に結晶成長する工程を含む半導体光
素子の製造方法において、前記ストライプ状誘電体薄膜
が複数本並列して形成されていることを特徴とする半導
体光素子の製造方法を提供する。
In order to achieve the above object, the present invention selectively selects a semiconductor multi-layer structure composed of a quantum well layer or a bulk layer into an optical waveguide region sandwiched between striped dielectric thin films. A method for manufacturing a semiconductor optical device, comprising a step of growing a crystal, wherein a plurality of the striped dielectric thin films are formed in parallel.

【0013】本発明においては、好ましくは前記ストラ
イプ状誘電体薄膜は、結晶成長時、反応管内の原料種の
拡散長よりも短い周期Λで並列に複数本形成されている
ことを特徴とする。
In the present invention, preferably, a plurality of the striped dielectric thin films are formed in parallel at a period Λ shorter than the diffusion length of the raw material species in the reaction tube during crystal growth.

【0014】[0014]

【作用】以下、本発明の半導体光素子の製造方法の原理
について説明する。
The principle of the method for manufacturing a semiconductor optical device of the present invention will be described below.

【0015】図10(B)に、図10(A)の従来の選
択成長のマスクパターンを用いた場合の気相中のIII族
原料種の横方向濃度勾配の模式図を示す。
FIG. 10B shows a schematic diagram of the lateral concentration gradient of the group III source species in the vapor phase when the conventional selective growth mask pattern of FIG. 10A is used.

【0016】GaInAsPの四元系の選択成長におい
て、誘電体マスク5の幅に対する結晶層厚変化は、主と
して反応管内の気相中のGa、In等のIII族原料種の
横方向拡散によって生じる。すなわち、図10(A)の
誘電体マスク5上では原料種が消費(成長)されないた
め高濃度となり、誘電体マスク5に挟まれた成長領域2
では原料種が消費(成長)されるため低濃度となる。
In the selective growth of the GaInAsP quaternary system, the change in the crystal layer thickness with respect to the width of the dielectric mask 5 is mainly caused by the lateral diffusion of the group III source species such as Ga and In in the vapor phase in the reaction tube. That is, since the raw material species are not consumed (grown) on the dielectric mask 5 in FIG. 10A, the concentration becomes high and the growth region 2 sandwiched between the dielectric masks 5 is formed.
In this case, the raw material species are consumed (grown), resulting in a low concentration.

【0017】これにより、横方向に原料種の濃度勾配が
でき、横方向拡散が生じる(図10(B)参照)。この
時、誘電体マスク5の幅が広いほど、横方向拡散によっ
て成長領域に供給されるIII族原料種の量が大きくなる
ため、結晶層厚が厚くなる。
As a result, a concentration gradient of the raw material species is produced in the lateral direction, and lateral diffusion occurs (see FIG. 10 (B)). At this time, as the width of the dielectric mask 5 is wider, the amount of the group III source species supplied to the growth region by lateral diffusion is larger, and the crystal layer thickness is larger.

【0018】一方、結晶組成の変化は、III族原料種の
気相中の拡散、及び基板表面でのマイグレーションの両
方の影響で生じ、マスク幅が広くなるにつれてIn組成
が増加する。すなわち、In原料の拡散長の方が、Ga
原料の拡散長よりも短いために、横方向Inの濃度勾配
が大きくなり、より多くのInが成長領域に成長され
る。
On the other hand, the change in the crystal composition is caused by both the diffusion of the group III source species in the vapor phase and the migration on the substrate surface, and the In composition increases as the mask width becomes wider. That is, the diffusion length of the In raw material is Ga
Since it is shorter than the diffusion length of the raw material, the concentration gradient in the lateral direction In becomes large, and more In is grown in the growth region.

【0019】従来の選択成長では、この効果を積極的に
利用するため、用いる誘電体マスク5の幅は、原料種の
気相中の拡散長よりも短いものから長いものまで大幅に
変化させていた。しかし、このような従来の選択成長で
は、前述したように、結晶組成の変化、結晶層厚の変化
とともに結晶歪量も大きく変化してしまう。
In the conventional selective growth, in order to positively utilize this effect, the width of the dielectric mask 5 used is largely changed from a length shorter than the diffusion length of the source species in the vapor phase to a length longer than the diffusion length. It was However, in such a conventional selective growth, as described above, the crystal strain amount greatly changes as the crystal composition changes and the crystal layer thickness changes.

【0020】図1に、本発明の半導体光素子の製造方法
で用いるストライプ状誘電体マスク(単に「誘電体マス
ク」ともいう)5のパターンを示す。
FIG. 1 shows a pattern of a stripe-shaped dielectric mask (also simply referred to as “dielectric mask”) 5 used in the method for manufacturing a semiconductor optical device of the present invention.

【0021】従来の選択成長では、図10(A)に示す
ように、1.5μm幅の成長領域2を挟んで一対のみ形
成されたストライプ状誘電体マスク5が用いられてい
た。
In the conventional selective growth, as shown in FIG. 10 (A), a stripe-shaped dielectric mask 5 formed by only a pair of growth regions 2 having a width of 1.5 μm is used.

【0022】これに対して、本発明では、幅1.5μm
の成長領域2を中心に、幅約100μmの領域に亘っ
て、周期Λ(開口部幅と誘電体マスク5の1ラインの幅
の和)で複数本並列状(「アレイ状」ともいう)に誘電
体マスク5を形成する。この時、誘電体マスク5の周期
Λは、気相中のIII族原料種の拡散長よりも短く設定す
る。
On the other hand, in the present invention, the width is 1.5 μm.
Centered on the growth region 2 of 100 .mu.m, a plurality of parallel lines (also referred to as "array form") are formed with a period .LAMBDA. The dielectric mask 5 is formed. At this time, the period Λ of the dielectric mask 5 is set to be shorter than the diffusion length of the group III raw material species in the vapor phase.

【0023】図1に示す本発明に係るマスクパターンを
用いた場合と、図10(A)の従来のパターンを用いた
場合の、GaInAsP結晶の、誘電体マスク5の幅に
対する成長レート変化(誘電体マスク5を用いない全面
成長時の成長レートを基準としている)の実験結果を図
2(A)に、成長レート変化に対する結晶組成変化の実
験結果を図2(B)にそれぞれ示す。
A change in the growth rate of the GaInAsP crystal with respect to the width of the dielectric mask 5 (the dielectric pattern) when the mask pattern according to the present invention shown in FIG. 1 is used and when the conventional pattern shown in FIG. FIG. 2A shows the experimental result of “the growth rate at the time of overall growth without using the body mask 5”, and FIG. 2B shows the experimental result of the change of the crystal composition with respect to the change of the growth rate.

【0024】図2(B)から分かるように、本発明の選
択成長を用いた場合、結晶成長レートを大きく変化させ
つつ、結晶組成波長の変化を従来例と比べて大幅に抑制
できた。即ち、本発明者は、結晶の歪量変化を抑制しつ
つ、大きな層厚変化が得られることを全く新たに見いだ
したのである。
As can be seen from FIG. 2 (B), when the selective growth of the present invention was used, the change in crystal composition wavelength could be greatly suppressed as compared with the conventional example, while the crystal growth rate was greatly changed. That is, the present inventor has newly found that a large change in layer thickness can be obtained while suppressing a change in crystal strain amount.

【0025】この結晶歪の低減効果は、In、Ga等の
原料種の気相中の拡散長(十数μm)に比べて、幅の狭
い誘電体マスク5を用いているため、In原料とGa原
料の拡散長の違いに起因する結晶組成の変化が抑制され
ることによる。
The effect of reducing the crystal strain is that the dielectric mask 5 having a width narrower than the diffusion length (tens of μm) of the raw material species such as In and Ga in the vapor phase is used. This is because the change in the crystal composition due to the difference in the diffusion length of the Ga raw material is suppressed.

【0026】そして、誘電体マスク5の幅に対する成長
レート増加率は、誘電体マスク5の被覆率にほぼ比例す
る。すなわち、被覆領域で消費(成長)されない原料種
が、すべて成長領域で消費(成長)されることによる。
The growth rate increase rate with respect to the width of the dielectric mask 5 is substantially proportional to the coverage rate of the dielectric mask 5. That is, all the raw material species that are not consumed (grown) in the coating region are consumed (grown) in the growth region.

【0027】図2(A)を参照して、例えば、成長領域
2が1.5μm幅で、誘電体マスク5のマスク領域
(「マスク領域5」ともいう)が1.5μm幅の時の成
長レートを「1」とすると、成長領域2が1.5μm幅
で、マスク領域5が3.0μm幅の時の成長レートは
「2」となる。その結果、成長圧力150torrの
時、従来の選択成長では成長レート変化が最大で3倍程
度であったものが、本発明に係る選択成長によれば、5
倍以上変化させられることを見いだした。
With reference to FIG. 2A, for example, growth is performed when the growth region 2 has a width of 1.5 μm and the mask region of the dielectric mask 5 (also referred to as “mask region 5”) has a width of 1.5 μm. When the rate is “1”, the growth rate is “2” when the growth region 2 has a width of 1.5 μm and the mask region 5 has a width of 3.0 μm. As a result, when the growth pressure was 150 torr, the change in the growth rate was about 3 times at maximum in the conventional selective growth.
I found that it can be changed more than twice.

【0028】このように、本発明の半導体光素子の製造
方法では、誘電体マスク5の幅の変化に対して、結晶層
厚変化は大きいが、結晶組成変化は抑制すること、すな
わち結晶歪量の変化を抑制することができる。
As described above, in the method for manufacturing a semiconductor optical device of the present invention, the change in the crystal layer thickness is large with respect to the change in the width of the dielectric mask 5, but the change in the crystal composition is suppressed, that is, the amount of crystal strain. Can be suppressed.

【0029】[0029]

【発明の実施の形態】以下、本発明の実施の形態を図面
を参照して作製行程順に説明する。
BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below in the order of manufacturing steps with reference to the drawings.

【0030】[0030]

【実施形態1】 <波長可変階段型導波路構造(TSG)DBRレーザ>
図3から図5は、本発明の一実施形態に係る波長可変階
段型導波路構造(TSG)DBRレーザの作製工程を工
程順に説明するための図である。
First Embodiment <Tunable Wavelength Staircase Waveguide Structure (TSG) DBR Laser>
3 to 5 are views for explaining a manufacturing process of a wavelength variable step waveguide structure (TSG) DBR laser according to an embodiment of the present invention in process order.

【0031】図3(A)は、一回目の選択成長用マスク
パターンを示す平面図である。
FIG. 3A is a plan view showing a first selective growth mask pattern.

【0032】図3(A)を参照して、まずn−InP基
板1上へ<011>方向に活性領域、位相調整領域、D
BR領域を設け、DBR領域にのみピッチ約240nm
の回折格子20を形成する。
Referring to FIG. 3A, first, on the n-InP substrate 1, the active region, the phase adjustment region, and the D region are formed in the <011> direction.
BR area is provided and pitch is about 240nm only in DBR area
The diffraction grating 20 is formed.

【0033】次に、誘電体マスクとして幅が5μmのS
iO2成長阻止マスク5を、1.5μm開口部(成長領
域2)を挟んで対向するように形成する。
Next, as a dielectric mask, S having a width of 5 μm is used.
The iO 2 growth blocking mask 5 is formed so as to face each other with a 1.5 μm opening (growth region 2) in between.

【0034】図3(B)に、一回目の選択成長後の結晶
層構造の断面を模式的に示す。図3(A)に示すSiO
2成長阻止マスク5が形成された基板1上に、第1のn
−GaInAsP光閉じ込め層3、n−InPスペーサ
層4、GaInAsP/GaInAsP多重量子井戸
(MQW)層6、第2のi−GaInAsP光閉じ込め
層7、及びp−InPクラッド層8を選択成長する。
FIG. 3B schematically shows a cross section of the crystal layer structure after the first selective growth. SiO shown in FIG.
2 On the substrate 1 on which the growth stop mask 5 is formed, the first n
-GaInAsP light confinement layer 3, n-InP spacer layer 4, GaInAsP / GaInAsP multiple quantum well (MQW) layer 6, second i-GaInAsP light confinement layer 7, and p-InP cladding layer 8 are selectively grown.

【0035】この時、開口部(成長領域2)に成長され
る第1、第2のGaInAsP光閉じ込め層3、7の組
成は、1.25μmで、層厚は両層とも0.1μmであ
る。
At this time, the composition of the first and second GaInAsP optical confinement layers 3 and 7 grown in the opening (growth region 2) is 1.25 μm, and the layer thickness of both layers is 0.1 μm. .

【0036】また、多重量子井戸層6(GaInAsP
量子井戸の組成波長1.6μm、層厚7nm/GaIn
AsPバリアの組成波長1.3μm、層厚10nm)の
利得ピーク波長を1.55μmに設定することができ
た。
The multiple quantum well layer 6 (GaInAsP)
Quantum well composition wavelength 1.6 μm, layer thickness 7 nm / GaIn
The composition wavelength of the AsP barrier was 1.3 μm, and the gain peak wavelength of the layer thickness of 10 nm) could be set to 1.55 μm.

【0037】一回目の選択成長後、約50nm厚の第2
のSiO2膜55を基板全面に形成し、第2のSiO2
55のみ一部分ウエットエッチングで除去し、図4
(C)に示すようなマスクパターンを形成する。
After the first selective growth, a second film of about 50 nm thickness is formed.
Of the SiO 2 film 55 is formed on the entire surface of the substrate, removing a portion wet etching only the second SiO 2 film 55, FIG. 4
A mask pattern as shown in (C) is formed.

【0038】そして、このマスクパターンを用いて、選
択エッチングにより、位相調整領域とDBR領域におけ
る、p−InPクラッド層8、第2のi−GaInAs
P光閉じ込め層7、及びGaInAsP/GaInAs
P多重量子井戸層6を除去し、図4(D)に示すような
断面構造を形成する。
Then, by using this mask pattern, the p-InP cladding layer 8 and the second i-GaInAs in the phase adjustment region and the DBR region are selectively etched.
P light confinement layer 7, and GaInAsP / GaInAs
The P-multiple quantum well layer 6 is removed to form a sectional structure as shown in FIG.

【0039】次に、図4(C)のマスクパターンを用い
て、図5(E)に示すように、位相調整領域及びDBR
領域のみに、i−GaInAsP層9、p−InPクラ
ッド層8を二回目の選択成長で形成する。
Next, using the mask pattern of FIG. 4C, as shown in FIG. 5E, the phase adjustment region and the DBR are formed.
The i-GaInAsP layer 9 and the p-InP cladding layer 8 are formed only in the region by the second selective growth.

【0040】この時、位相調整領域、及びDBR領域の
i−GaInAsP層9の組成波長は、それぞれ1.3
3μm、1.32μmであり、層厚は、それぞれ0.6
μm、0.15μmとすることができた。
At this time, the composition wavelengths of the i-GaInAsP layer 9 in the phase adjusting region and the DBR region are respectively 1.3.
3 μm and 1.32 μm, and the layer thickness is 0.6
It was possible to set the thickness to 0.1 μm or 0.15 μm.

【0041】位相調整領域、及びDBR領域の両領域に
おけるi−GaInAsP層9の層厚比は4倍と大きい
にもかかわらず、結晶格子の差は0.05%以下に抑制
することができた。その結果、位相調整領域とDBR領
域の電流注入層(i−GaInAsP層9)の層厚差が
2倍以上という、波長可変階段型導波路構造(TSG)
DBRレーザにおける、連続波長可変特性を得るための
必要条件を満足することができた。
Although the layer thickness ratio of the i-GaInAsP layer 9 in both the phase adjustment region and the DBR region was as large as 4 times, the difference in crystal lattice could be suppressed to 0.05% or less. . As a result, the wavelength tunable staircase waveguide structure (TSG) has a layer thickness difference of twice or more between the phase adjustment region and the current injection layer (i-GaInAsP layer 9) in the DBR region.
It was possible to satisfy the necessary conditions for obtaining continuous wavelength tunable characteristics in the DBR laser.

【0042】このようにして、各半導体層を形成した
後、SiO2成長阻止マスク5のマスク開口幅を全領域
(活性領域、位相調整領域、DBR領域)で6μmに
し、そしてSiO2ストライプは成長領域2の両側一対
のみ残るように再度形成し、このマスクを用いて、p−
InP埋め込み層10(層厚1.5μm)をMOVPE
で結晶成長する。その後、SiO2膜11を形成し、上
部電極12、下部電極13を通常のスパッタ法等により
形成してTSG−DBRレーザを得ることができた。
After each semiconductor layer is formed in this way, the mask opening width of the SiO 2 growth blocking mask 5 is set to 6 μm in the entire region (active region, phase adjusting region, DBR region), and the SiO 2 stripe grows. Re-formation is performed so that only one pair on both sides of the region 2 remains, and using this mask, p-
The InP burying layer 10 (layer thickness: 1.5 μm) is MOVPE
The crystal grows. After that, the SiO 2 film 11 was formed, and the upper electrode 12 and the lower electrode 13 were formed by the usual sputtering method or the like to obtain a TSG-DBR laser.

【0043】素子長800μm(活性領域長300μ
m、位相調整領域長200μm、DBR領域長300μ
m)の素子を作製したところ、発振しきい値電流6mA
でレーザ発振を示し、最大光出力15mW、位相調整領
域及びDBR領域への単一電流注入連続波長可変幅7n
mが得られた。
Element length 800 μm (active region length 300 μm
m, phase adjustment region length 200 μm, DBR region length 300 μm
When an element of m) was produced, the oscillation threshold current was 6 mA.
Shows laser oscillation, maximum optical output 15 mW, single current injection into phase adjustment region and DBR region Continuous wavelength variable width 7 n
m was obtained.

【0044】[0044]

【実施形態2】 <多波長DFBレーザアレイ>図6から図9は、本発明
の第2の実施形態に係る多波長DFB(分布帰還型)レ
ーザアレイの作製工程を説明する図である。
Second Embodiment <Multiwavelength DFB Laser Array> FIGS. 6 to 9 are views for explaining a manufacturing process of a multiwavelength DFB (distributed feedback type) laser array according to a second embodiment of the present invention.

【0045】図6に、一回目の選択成長用誘電体マスク
パターンを示す。まず、p−InP基板31上全面にピ
ッチ約240nmの回折格子20を形成する。次に、周
期300μmで、8組(DFB1、DFB2、…、DF
B8まで)の選択成長用マスクパターンを形成する。マ
スクパターンはDFB1〜DFB8まで同じであり、一
組あたりのマスクパターンとしては、幅が3μmのSi
2成長阻止マスク5が、1.5μm開口部(成長領域
2)を挟んで対向するように一対のみ形成されている。
FIG. 6 shows a dielectric mask pattern for the first selective growth. First, the diffraction grating 20 having a pitch of about 240 nm is formed on the entire surface of the p-InP substrate 31. Next, with a period of 300 μm, 8 sets (DFB1, DFB2, ..., DF
A mask pattern for selective growth up to B8) is formed. The mask pattern is the same from DFB1 to DFB8, and the mask pattern per set is Si with a width of 3 μm.
Only a pair of O 2 growth blocking masks 5 are formed so as to face each other with a 1.5 μm opening (growth region 2) in between.

【0046】図7に、このマスクを用いた一回目の選択
成長後の結晶構造を模式的に斜視図にて示す。
FIG. 7 is a perspective view schematically showing the crystal structure after the first selective growth using this mask.

【0047】図7を参照して、基板31上の成長領域2
に、第1のi−GaInAsP光閉じ込め層9、GaI
nAsP/GaInAsP多重量子井戸層6、n−In
P層4を選択成長する。この時、第1の光閉じ込め層9
の組成波長は1.25μm、層厚は0.1μmである。
また、多重量子井戸層6(GaInAsP量子井戸組成
波長1.6μm、層厚7nm/GaInAsPバリア組
成波長1.3μm、層厚10nm)の利得ピーク波長は
1.55μmに設定することができた。
Referring to FIG. 7, growth region 2 on substrate 31
In addition, the first i-GaInAsP optical confinement layer 9, GaI
nAsP / GaInAsP multiple quantum well layer 6, n-In
The P layer 4 is selectively grown. At this time, the first optical confinement layer 9
Has a composition wavelength of 1.25 μm and a layer thickness of 0.1 μm.
Further, the gain peak wavelength of the multiple quantum well layer 6 (GaInAsP quantum well composition wavelength 1.6 μm, layer thickness 7 nm / GaInAsP barrier composition wavelength 1.3 μm, layer thickness 10 nm) could be set to 1.55 μm.

【0048】一回目の選択成長後、第1のSiO2膜5
を残したまま、厚さ約50nmの第2のSiO2膜55
を基板全面に形成する。そして、第2のSiO2膜55
のみ一部分ウエットエッチングで除去し、DFB1〜D
FB8において、一組あたりのマスクパターンとして、
図8に示すようなアレイ状の誘電体ストライプパターン
55を形成する。
After the first selective growth, the first SiO 2 film 5 is formed.
The second SiO 2 film 55 with a thickness of about 50 nm
Is formed on the entire surface of the substrate. Then, the second SiO 2 film 55
Partly removed by wet etching, DFB1 ~ D
In FB8, as a mask pattern per set,
An array-shaped dielectric stripe pattern 55 as shown in FIG. 8 is formed.

【0049】この時、第1のSiO2膜5がある部分
は、第1のSiO2膜5の上に第2のSiO2膜55が形
成されている。
At this time, the second SiO 2 film 55 is formed on the first SiO 2 film 5 in the portion where the first SiO 2 film 5 is present.

【0050】また、図8に示すパターンは、DFB1〜
DFB8までの各組で、第2のSiO2膜55の幅が異
なっており、DFB1では幅3μm、DFB2では幅4
μm、…、DFB8では幅10μmと、各組毎1μmず
つ相違している。
Further, the pattern shown in FIG.
The width of the second SiO 2 film 55 is different in each set up to DFB8. The width is 3 μm in DFB1 and the width is 4 in DFB2.
.., DFB8 has a width of 10 .mu.m, which is different by 1 .mu.m for each set.

【0051】この第2のSiO2マスク55を用いて、
図9に示すように、成長領域2に、n−GaInAsP
層3、n−InP層30を二回目の選択成長で形成す
る。
Using this second SiO 2 mask 55,
As shown in FIG. 9, n-GaInAsP is formed in the growth region 2.
The layer 3 and the n-InP layer 30 are formed by the second selective growth.

【0052】この時、DFB1〜DFB8のn−GaI
nAsP層3の組成波長は、1.25μm〜1.26μ
mとなり、層厚は、0.25μm〜0.05μmとする
ことができた。この時、n−GaInAsP層3の組成
歪量の変化は、0.05%以下にすることができた。す
なわち、DFB1〜DFB8でn−GaInAsP層3
の層厚差を大きくとりつつ、組成歪量の変化を抑制する
ことができた。
At this time, n-GaI of DFB1 to DFB8
The composition wavelength of the nAsP layer 3 is 1.25 μm to 1.26 μm.
m, and the layer thickness could be 0.25 μm to 0.05 μm. At this time, the change in the composition strain amount of the n-GaInAsP layer 3 could be set to 0.05% or less. That is, in the DFB1 to DFB8, the n-GaInAsP layer 3
It was possible to suppress the change in the composition strain amount while increasing the layer thickness difference.

【0053】このようにして、各半導体層を形成した
後、成長領域2の両側一対のSiO2マスク5及び55
のマスク開口幅を6μmにし、その他のアレイ状に形成
されているSiO2ストライプマスク55については成
長領域2の両側一対のみ残るようにエッチング除去す
る。
After each semiconductor layer is formed in this manner, a pair of SiO 2 masks 5 and 55 on both sides of the growth region 2 are formed.
The mask opening width is set to 6 μm, and the other SiO 2 stripe masks 55 formed in an array are removed by etching so that only one pair on both sides of the growth region 2 remains.

【0054】このマスクを用いて、n−InP埋め込み
層40(層厚1.5μm)を成長領域2に結晶成長し、
その後、SiO2膜11を形成し、p側電極12、n側
電極13を通常のスパッタ法等により形成して、多波長
光源としてのDFBレーザアレイを得ることができた。
Using this mask, an n-InP buried layer 40 (layer thickness: 1.5 μm) is crystal-grown in the growth region 2,
After that, the SiO 2 film 11 was formed, and the p-side electrode 12 and the n-side electrode 13 were formed by an ordinary sputtering method or the like, whereby a DFB laser array as a multi-wavelength light source could be obtained.

【0055】このDFBレーザアレイは、n−GaIn
AsP層3の層厚がそれぞれ異なるため、各レーザ(D
FB1からDFB8まで)の等価屈折率が3.24から
3.20まで変化しており、発振波長を1.555μm
から1.535μmまで約20nmの範囲に分布させる
ことができた。
This DFB laser array is composed of n-GaIn
Since each AsP layer 3 has a different layer thickness, each laser (D
The equivalent refractive index (FB1 to DFB8) is changed from 3.24 to 3.20, and the oscillation wavelength is 1.555 μm.
To 1.535 μm could be distributed in the range of about 20 nm.

【0056】素子長500μmの8本のDFBレーザア
レイを作製したところ、DFB1〜DFB8までの発振
波長は、1.535μmから1.555μmであり、各
DFBレーザの平均発振しきい値電流6mA、平均光出
力15mWという、良好な特性が得られた。
When eight DFB laser arrays each having a device length of 500 μm were produced, the oscillation wavelengths from DFB1 to DFB8 were 1.535 μm to 1.555 μm, and the average oscillation threshold current of each DFB laser was 6 mA, and the average. Good characteristics of optical output of 15 mW were obtained.

【0057】以上、本発明の実施の形態を説明したが、
本発明は、GaInAsP/InP系以外の材料を用い
た選択成長においても有効である。
The embodiment of the present invention has been described above.
The present invention is also effective in selective growth using a material other than GaInAsP / InP.

【0058】また、本発明では、SiO2マスクの開口
幅を1.5μmとして光導波路を選択成長で形成する方
法について説明したが、選択成長用のSiO2マスクの
開口幅をもっと広くした選択成長法に対しても有効であ
る。
Further, in the present invention, the method of forming the optical waveguide by selective growth with the opening width of the SiO 2 mask being 1.5 μm has been described. However, the selective growth in which the opening width of the SiO 2 mask for selective growth is made wider is explained. It is also valid for the law.

【0059】[0059]

【発明の効果】以上説明したように、本発明による半導
体光素子の製造方法は、選択成長において、マスク幅の
異なる領域で、結晶歪量をほとんど変化させることな
く、結晶の層厚を大きく変化させることができるため、
多波長DFBレーザ、多波長DBRレーザ、TSG−D
BRレーザ等を作製する上で非常に有望である。すなわ
ち、本発明によれば、光導波路の等価屈折率を導波路方
向に大幅に可変させることが可能となり、広い波長範囲
をカバーした多波長DFBレーザアレイ、DBRレーザ
アレイを一括形成できるという利点がある。そして、従
来の選択成長では、結晶層厚を変化させた場合、結晶歪
量も変化するため、結晶層厚をあまり厚くできないとい
う問題があったが、本発明によれば、結晶層厚を自由に
設定できるという利点がある。
As described above, in the method for manufacturing a semiconductor optical device according to the present invention, in the selective growth, the crystal layer thickness is largely changed in the regions having different mask widths while the crystal strain amount is hardly changed. Because it can be
Multi-wavelength DFB laser, multi-wavelength DBR laser, TSG-D
It is very promising for producing BR lasers and the like. That is, according to the present invention, the equivalent refractive index of the optical waveguide can be greatly changed in the waveguide direction, and there is an advantage that a multi-wavelength DFB laser array and a DBR laser array covering a wide wavelength range can be collectively formed. is there. In the conventional selective growth, when the crystal layer thickness is changed, the crystal strain amount is also changed, so that there is a problem that the crystal layer thickness cannot be made too thick. However, according to the present invention, the crystal layer thickness can be freely set. There is an advantage that it can be set to.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の作用を説明するための図である。FIG. 1 is a diagram for explaining the operation of the present invention.

【図2】本発明の作用を説明するための図である。FIG. 2 is a diagram for explaining the operation of the present invention.

【図3】本発明の一実施形態を製造工程順に説明するた
めの図である。
FIG. 3 is a diagram for explaining one embodiment of the present invention in the order of manufacturing steps.

【図4】本発明の一実施形態を製造工程順に説明するた
めの図である。
FIG. 4 is a diagram for explaining one embodiment of the present invention in the order of manufacturing steps.

【図5】本発明の一実施形態を製造工程順に説明するた
めの図である。
FIG. 5 is a diagram for explaining an embodiment of the present invention in the order of manufacturing steps.

【図6】本発明の第2の実施形態を製造工程順に説明す
るための図である。
FIG. 6 is a view for explaining the second embodiment of the present invention in the order of manufacturing steps.

【図7】本発明の第2の実施形態を製造工程順に説明す
るための図である。
FIG. 7 is a diagram for explaining the second embodiment of the present invention in the order of manufacturing steps.

【図8】本発明の第2の実施形態を製造工程順に説明す
るための図である。
FIG. 8 is a diagram for explaining the second embodiment of the present invention in the order of manufacturing steps.

【図9】本発明の第2の実施形態を製造工程順に説明す
るための図である。
FIG. 9 is a view for explaining the second embodiment of the present invention in the order of manufacturing steps.

【図10】従来の技術を説明するための図である。FIG. 10 is a diagram for explaining a conventional technique.

【符号の説明】[Explanation of symbols]

1 n−InP半導体基板 2 成長領域 3 n−GaInAsP層 4 n−InP層 5 誘電体(SiO2)薄膜 6 GaInAsP/GaInAsP多重量子井戸層 7 i−GaInAsP半導体層 8 p−InP層 9 i−GaInAsP層 10 p−InPクラッド層 11 SiO2薄膜 12 p側電極 13 n側電極 20 回折格子 30 n−InP層 31 p−InP基板 40 n−InP埋め込み層 55 第2のSiO2薄膜1 n-InP semiconductor substrate 2 growth region 3 n-GaInAsP layer 4 n-InP layer 5 dielectric (SiO 2 ) thin film 6 GaInAsP / GaInAsP multiple quantum well layer 7 i-GaInAsP semiconductor layer 8 p-InP layer 9 i-GaInAsP Layer 10 p-InP clad layer 11 SiO 2 thin film 12 p-side electrode 13 n-side electrode 20 diffraction grating 30 n-InP layer 31 p-InP substrate 40 n-InP buried layer 55 second SiO 2 thin film

Claims (7)

【特許請求の範囲】[Claims] 【請求項1】量子井戸層または、バルク層からなる半導
体多層構造を、ストライプ状誘電体薄膜に挟まれた光導
波路領域へ選択的に結晶成長する工程を含む半導体光素
子の製造方法において、 前記ストライプ状誘電体薄膜が複数本並列して形成され
ていることを特徴とする半導体光素子の製造方法。
1. A method of manufacturing a semiconductor optical device, comprising the step of selectively crystallizing a semiconductor multilayer structure composed of a quantum well layer or a bulk layer in an optical waveguide region sandwiched between striped dielectric thin films, A method for manufacturing a semiconductor optical device, characterized in that a plurality of striped dielectric thin films are formed in parallel.
【請求項2】前記ストライプ状誘電体薄膜は、周期Λで
複数本並列して形成されており、前記周期Λは、結晶成
長時の反応管内における原料種の拡散長よりも短いこと
を特徴とする請求項1記載の半導体光素子の製造方法。
2. A plurality of the striped dielectric thin films are formed in parallel at a period Λ, and the period Λ is shorter than a diffusion length of a raw material species in a reaction tube during crystal growth. The method for manufacturing a semiconductor optical device according to claim 1.
【請求項3】請求項1又は2記載の半導体光素子の製造
方法において、結晶成長時に用いるIII族原料種が、G
a、In、及びAlから成る群から選択された少なくと
も一を含む有機金属であることを特徴とする半導体光素
子の製造方法。
3. The method for producing a semiconductor optical device according to claim 1, wherein the group III source species used during crystal growth is G
A method for manufacturing a semiconductor optical device, which is an organic metal containing at least one selected from the group consisting of a, In, and Al.
【請求項4】請求項1ないし3のいずれか一に記載の半
導体光素子の製造方法において、結晶成長時の反応管圧
力が150torr以下であることを特徴とする半導体
光素子の製造方法。
4. The method for manufacturing a semiconductor optical device according to claim 1, wherein the reaction tube pressure during crystal growth is 150 torr or less.
【請求項5】前記ストライプ状誘電体薄膜の前記周期Λ
を長手方向において可変させたことを特徴とする請求項
2記載の半導体光素子の製造方法。
5. The period Λ of the striped dielectric thin film.
3. The method for manufacturing a semiconductor optical device according to claim 2, wherein the length is varied in the longitudinal direction.
【請求項6】前記複数本のストライプ状誘電体薄膜から
なる群を複数組並列に配置し、前記複数の組間で前記周
期Λが可変されたことを特徴とする請求項2記載の半導
体光素子の製造方法。
6. The semiconductor light according to claim 2, wherein a plurality of groups of the plurality of striped dielectric thin films are arranged in parallel, and the period Λ is varied between the plurality of groups. Device manufacturing method.
【請求項7】基板上に形成されたストライプ状誘電体薄
膜に挟まれた成長領域へ選択的に結晶成長してなる光導
波層を備えた半導体光素子において、 前記ストライプ状誘電体薄膜が所定の周期にて複数本並
列に配設され、選択成長された結晶層厚を可変させ、こ
れに伴い前記光導波路の等価屈折率を光導波方向に可変
させたことを特徴とする光半導体素子。
7. A semiconductor optical device comprising an optical waveguide layer formed by selective crystal growth in a growth region sandwiched between striped dielectric thin films formed on a substrate, wherein the striped dielectric thin films are predetermined. The optical semiconductor element is characterized in that a plurality of crystal layers are arranged in parallel at a period of, and the thickness of the selectively grown crystal layer is varied, and accordingly, the equivalent refractive index of the optical waveguide is varied in the optical waveguide direction.
JP21264995A 1995-07-28 1995-07-28 Semiconductor optical device and method of manufacturing the same Expired - Fee Related JP2914235B2 (en)

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Application Number Priority Date Filing Date Title
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JPH0946002A true JPH0946002A (en) 1997-02-14
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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04105383A (en) * 1990-08-24 1992-04-07 Nec Corp Manufacture of optical semiconductor element
JPH05327112A (en) * 1992-05-20 1993-12-10 Sanyo Electric Co Ltd Manufacture of semiconductor laser
JPH0715092A (en) * 1993-06-25 1995-01-17 Nec Corp Semiconductor laser array and fabrication there

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04105383A (en) * 1990-08-24 1992-04-07 Nec Corp Manufacture of optical semiconductor element
JPH05327112A (en) * 1992-05-20 1993-12-10 Sanyo Electric Co Ltd Manufacture of semiconductor laser
JPH0715092A (en) * 1993-06-25 1995-01-17 Nec Corp Semiconductor laser array and fabrication there

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