JPH0945573A - Multilayer ceramic capacitor - Google Patents
Multilayer ceramic capacitorInfo
- Publication number
- JPH0945573A JPH0945573A JP19305195A JP19305195A JPH0945573A JP H0945573 A JPH0945573 A JP H0945573A JP 19305195 A JP19305195 A JP 19305195A JP 19305195 A JP19305195 A JP 19305195A JP H0945573 A JPH0945573 A JP H0945573A
- Authority
- JP
- Japan
- Prior art keywords
- electrodes
- ceramic capacitor
- internal
- internal electrode
- multilayer ceramic
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Ceramic Capacitors (AREA)
- Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は積層セラミックコンデン
サに関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a laminated ceramic capacitor.
【0002】[0002]
【従来の技術】一般に積層セラミックコンデンサはセラ
ミックグリーンシートならびにセラミックグリーンシー
ト上に内部電極ペーストを印刷したシートを積み重ねた
後、加圧させて積層体とし、次に焼成し焼結体の両端部
に内部電極と接続される外部電極を設けた構造である。2. Description of the Related Art Generally, a laminated ceramic capacitor is formed by stacking a ceramic green sheet and a sheet on which an internal electrode paste is printed on the ceramic green sheet, pressurizing the laminated body, and then firing the laminated body to both ends of the sintered body. This is a structure in which an external electrode connected to the internal electrode is provided.
【0003】中高圧積層セラミックコンデンサ(1KV
級以上)では、直列式の電極構造を形成し、有効層1層
あたりにかかる電圧を半減させ絶縁破壊を発生しにくく
していた。Medium and high voltage monolithic ceramic capacitors (1 KV
In the above grades), a series-type electrode structure was formed, and the voltage applied to each effective layer was halved to prevent dielectric breakdown.
【0004】[0004]
【発明が解決しようとする課題】しかしながら、上記の
従来の構成では、高電圧で使用する場合、沿面放電開始
電圧が低いという問題点を有していた。本発明は、上記
従来の問題点を解決するもので沿面放電開始電圧を向上
させた積層セラミックコンデンサを作成することを目的
とする。However, the above-mentioned conventional structure has a problem that the creeping discharge starting voltage is low when used at a high voltage. SUMMARY OF THE INVENTION It is an object of the present invention to solve the above-mentioned conventional problems and to produce a monolithic ceramic capacitor having an improved creeping discharge starting voltage.
【0005】[0005]
【課題を解決するための手段】この目的を達成するため
に本発明の積層セラミックコンデンサは、表面に二つの
第1の内部電極を相対向する端部に至るように設けた第
1の誘電体層と、表面に一つの第2の内部電極を端部に
非接触の状態で設けた第2の誘電体層とをそれぞれ複数
枚交互に積層した積層体と、この積層体の前記第1の内
部電極の露出した端面に設けた外部電極とを備え、少な
くとも一層の前記第1の内部電極のどちらか1つの電極
は、前記外部電極と接続する側の端部の幅よりも、他端
の幅を短くしたものである。In order to achieve this object, a monolithic ceramic capacitor according to the present invention is provided with a first dielectric material having two first internal electrodes provided on the surface so as to reach opposite ends. A layered body in which a plurality of layers and a second dielectric layer having a surface on which one second internal electrode is provided in an end portion in a non-contact state are alternately laminated, and the first layered body of the laminated body. An external electrode provided on an exposed end surface of the internal electrode, and at least one electrode of the first internal electrodes of at least one layer has a width of an end portion on a side connected to the external electrode, The width is shortened.
【0006】[0006]
【作用】この構成によると積層セラミックコンデンサの
外部電極間の側面において電位の傾度が従来よりも緩や
かになるので、沿面放電開始電圧が向上する。With this structure, the gradient of the electric potential on the side surface between the external electrodes of the monolithic ceramic capacitor becomes gentler than in the conventional case, and the creeping discharge starting voltage is improved.
【0007】[0007]
(実施例1)以下本発明の一実施例について図面を参照
しながら説明する。(Embodiment 1) An embodiment of the present invention will be described below with reference to the drawings.
【0008】図1,2,3,4は本実施例における積層
セラミックコンデンサの断面図であり、セラミックグリ
ーンシート1を介して第1の内部電極2a,2bと第2
の内部電極3とを交互に積層し、第1の内部電極2a,
2bの露出した端面に外部電極4a,4bを形成してい
る。1, 2, 3 and 4 are cross-sectional views of a monolithic ceramic capacitor according to the present embodiment, in which a first internal electrode 2a, 2b and a second internal electrode 2a,
Of the first internal electrodes 2a,
External electrodes 4a and 4b are formed on the exposed end faces of 2b.
【0009】図1に示すように、第1の内部電極2a,
2bにおいて外部電極4a,4bに接続する側の幅より
も、中央部の幅の方が短くなっており、また、二つの第
1の内部電極2a,2bの電極間距離は中央部よりも側
面側の方が長くなっている。ここで側面側の電極間距離
は左右同じにすることが望ましい。As shown in FIG. 1, the first internal electrodes 2a,
In 2b, the width of the central portion is shorter than the width on the side connected to the external electrodes 4a and 4b, and the distance between the two first internal electrodes 2a and 2b is smaller than the central portion. The side is longer. Here, it is desirable that the distance between the electrodes on the side surface is the same on the left and right.
【0010】また第1の内部電極2a,2b、第2の内
部電極3のコーナーは湾曲させておくことが絶縁破壊を
防ぐ上で望ましい。Further, it is desirable that the corners of the first internal electrodes 2a, 2b and the second internal electrode 3 are curved in order to prevent dielectric breakdown.
【0011】この積層セラミックコンデンサの製造方法
について以下に説明する。まず、キャリアフィルム上に
誘電体セラミックスラリーをリバースロールコータによ
り成形、乾燥し、セラミックグリーンシート1を構成し
た。次に、このセラミックグリーンシート1をキャリア
フィルムから剥離し、セラミックグリーンシート1上に
内部電極ペーストをスクリーン印刷により、図5に示す
パターンYを用いて印刷乾燥して第1の内部電極2a,
2bを形成した。次いでこの上にセラミックグリーンシ
ート1を積層し、この上に図6のパターンWを長さ方向
にずらして内部電極ペーストを印刷乾燥し、第2の内部
電極3を形成した。このようにセラミックグリーンシー
ト1を間に挟んで、図5に示すパターンYと図6に示す
パターンWを交互に用いながら、この工程を繰り返し所
望の積層数になるまで積層した。A method of manufacturing this laminated ceramic capacitor will be described below. First, a dielectric ceramic slurry was formed on a carrier film by a reverse roll coater and dried to form a ceramic green sheet 1. Next, the ceramic green sheet 1 is peeled from the carrier film, and the internal electrode paste is screen-printed on the ceramic green sheet 1 by printing and drying using the pattern Y shown in FIG.
Formed 2b. Next, the ceramic green sheet 1 was laminated on this, the pattern W of FIG. 6 was shifted in the length direction on this, and the internal electrode paste was printed and dried to form the second internal electrode 3. In this way, with the ceramic green sheets 1 sandwiched therebetween, the pattern Y shown in FIG. 5 and the pattern W shown in FIG. 6 were alternately used, and this step was repeated until the desired number of layers were stacked.
【0012】次いで、このように積層したものの上側と
下側に必要に応じて内部電極が印刷されていないセラミ
ックグリーンシート1を所定枚数積層して無効層を形成
し、プレスしてお互いに圧着して積層体を得た。Next, a predetermined number of ceramic green sheets 1 on which internal electrodes are not printed are laminated on the upper side and the lower side of the laminated body as described above to form an ineffective layer, which is pressed and pressure-bonded to each other. To obtain a laminate.
【0013】次に、この積層体を切断、バインダアウ
ト、焼成し、その後外部電極4a,4bを塗布、焼き付
けし、Niメッキ、Sn−Pbメッキを行い、積層セラ
ミックコンデンサを得た。この積層セラミックコンデン
サは静電容量100pF,Q1200,IR 1*10
13Ωであった。Next, this laminated body was cut, binder-out and fired, after which the external electrodes 4a and 4b were applied and baked, and Ni plating and Sn-Pb plating were carried out to obtain a laminated ceramic capacitor. This monolithic ceramic capacitor has a capacitance of 100 pF, Q1200, IR 1 * 10.
13 Ω.
【0014】この積層セラミックコンデンサを用いて沿
面放電開始電圧を測定した結果を(表1)に示す。The results of measuring the creeping discharge inception voltage using this monolithic ceramic capacitor are shown in (Table 1).
【0015】[0015]
【表1】 [Table 1]
【0016】また、本実施例においては全ての第1の内
部電極2a,2bを外部電極4a,4bに接続する側の
幅よりも、中央部の幅の方を短くし、また、二つの第1
の内部電極2a,2bの電極間距離は中央部よりも側面
側の方が長くしているが、いずれか一層の第1の内部電
極2a,2bをこの構成とすれば従来よりも沿面放電開
始電圧を向上させることができると思われる。Further, in this embodiment, the width of the central portion is made shorter than the width on the side where all the first internal electrodes 2a, 2b are connected to the external electrodes 4a, 4b, and the two first internal electrodes 2a, 2b are connected. 1
The inter-electrode distance between the internal electrodes 2a and 2b is longer on the side surface side than on the central portion. However, if one of the first internal electrodes 2a and 2b has this structure, creeping discharge starts more than in the conventional case. It seems that the voltage can be improved.
【0017】(比較例1)まず、キャリアフィルム上に
誘電体セラミックスラリーをリバースロールコータによ
り成形、乾燥し、セラミックグリーンシートを構成し
た。次にセラミックグリーンシートをキャリアフィルム
から剥離し、セラミックグリーンシート上に内部電極ペ
ーストをスクリーン印刷により図6のパターンWで印刷
乾燥し、その上にセラミックグリーンシートを積層し、
そのグリーンシート上に図6のパターンWを長さ方向に
ずらし内部電極ペーストを印刷乾燥した。この工程を繰
り返すことにより積層を行った。積層したセラミックグ
リーンシートはプレスしてお互いに圧着し、積層体を構
成した。以降は実施例1と同様である。Comparative Example 1 First, a dielectric ceramic slurry was formed on a carrier film by a reverse roll coater and dried to form a ceramic green sheet. Next, the ceramic green sheet is peeled off from the carrier film, the internal electrode paste is printed and dried on the ceramic green sheet by screen printing in the pattern W of FIG. 6, and the ceramic green sheet is laminated on it.
The pattern W of FIG. 6 was shifted in the length direction on the green sheet, and the internal electrode paste was printed and dried. By repeating this process, lamination was performed. The laminated ceramic green sheets were pressed and pressed together to form a laminate. The subsequent steps are the same as in the first embodiment.
【0018】得られた積層セラミックコンデンサを用い
て実施例1と同様に沿面放電開始電圧を測定した結果を
(表1)に示す。The results of measuring the creeping discharge inception voltage using the obtained monolithic ceramic capacitor in the same manner as in Example 1 are shown in Table 1.
【0019】この(表1)から明らかなように、本発明
の積層セラミックコンデンサは絶縁破壊電圧を向上する
ことができた。As is clear from this (Table 1), the monolithic ceramic capacitor of the present invention was able to improve the dielectric breakdown voltage.
【0020】[0020]
【発明の効果】以上本発明によると、この構成によると
積層セラミックコンデンサの外部電極間の側面において
電位の傾度が従来よりも緩やかになるので、沿面放電開
始電圧が向上する。As described above, according to the present invention, since the gradient of the electric potential on the side surface between the external electrodes of the monolithic ceramic capacitor becomes gentler than in the conventional case, the creeping discharge starting voltage is improved.
【図1】本発明の一実施例における積層セラミックコン
デンサの横断面図FIG. 1 is a cross-sectional view of a monolithic ceramic capacitor according to an embodiment of the present invention.
【図2】本発明の一実施例における積層セラミックコン
デンサの横断面図FIG. 2 is a cross-sectional view of a monolithic ceramic capacitor according to an embodiment of the present invention.
【図3】図1における積層セラミックコンデンサのA−
A断面図3 is an A- of the monolithic ceramic capacitor in FIG.
Section A
【図4】図1における積層セラミックコンデンサのB−
B断面図4 is a B- of the monolithic ceramic capacitor in FIG.
B sectional view
【図5】本発明の一実施例における内部電極印刷用パタ
ーン図FIG. 5 is a pattern diagram for printing internal electrodes in an embodiment of the present invention.
【図6】本発明の一実施例における内部電極印刷用パタ
ーン図FIG. 6 is a pattern diagram for printing internal electrodes according to an embodiment of the present invention.
1 セラミックグリーンシート 2a 第1の内部電極 2b 第1の内部電極 3 第2の内部電極 4a 外部電極 4b 外部電極 1 Ceramic Green Sheet 2a First Internal Electrode 2b First Internal Electrode 3 Second Internal Electrode 4a External Electrode 4b External Electrode
Claims (2)
を相対向する端部に至るように設けた第1の誘電体層
と、表面に少なくとも一つの第2の内部電極を端部に非
接触の状態で設けた第2の誘電体層とをそれぞれ複数枚
交互に積層した積層体と、この積層体の前記第1の内部
電極の露出した端面に設けた外部電極とを備え、少なく
とも一層の前記第1の内部電極のどちらか一つの電極
は、前記外部電極と接続する側の端部の幅よりも、他端
の幅を短くした積層セラミックコンデンサ。1. A first dielectric layer provided with at least two first internal electrodes on the surface so as to reach opposite ends, and at least one second internal electrode on the surface with a non-end. At least one layer is provided, including a laminated body in which a plurality of second dielectric layers provided in contact with each other are alternately laminated, and an external electrode provided on the exposed end surface of the first internal electrode of the laminated body. One of the first internal electrodes is a multilayer ceramic capacitor in which the width of the other end is shorter than the width of the end on the side connected to the external electrode.
おいて、向い合う二つの電極間距離は中央部よりも側面
部の方が長い請求項1記載の積層セラミックコンデン
サ。2. The multilayer ceramic capacitor according to claim 1, wherein in at least one layer of the first internal electrode, a distance between two facing electrodes is longer in a side surface portion than in a central portion.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19305195A JPH0945573A (en) | 1995-07-28 | 1995-07-28 | Multilayer ceramic capacitor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19305195A JPH0945573A (en) | 1995-07-28 | 1995-07-28 | Multilayer ceramic capacitor |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0945573A true JPH0945573A (en) | 1997-02-14 |
Family
ID=16301369
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP19305195A Pending JPH0945573A (en) | 1995-07-28 | 1995-07-28 | Multilayer ceramic capacitor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0945573A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2010019156A1 (en) * | 2008-08-11 | 2010-02-18 | Vishay Sprague, Inc. | High voltage capacitors |
-
1995
- 1995-07-28 JP JP19305195A patent/JPH0945573A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2010019156A1 (en) * | 2008-08-11 | 2010-02-18 | Vishay Sprague, Inc. | High voltage capacitors |
US8125762B2 (en) | 2008-08-11 | 2012-02-28 | Vishay Sprague, Inc. | High voltage capacitors |
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