JPH09330998A - Integrated circuit device and method for packaging it - Google Patents

Abstract

PROBLEM TO BE SOLVED: To easily and inexpensively package an integrated circuit. SOLUTION: A method for packaging integrated circuit device includes a sealing process in which a resin 5 is formed in the other area than pads 2 on the surface of a chip 1 and a paste sticking process in which conductive paste is formed on the pads 2 by bringing the paste 7 into contact with the pads 2. The exposed areas of the paste 7 can be made larger than the surface areas of the pads 2 or can be formed in prescribed patterns. The paste 7 is composed of a thermoplastic or thermosetting conductive material. In addition, silver and/or copper can be used as the conductive material contained in the paste 7. Therefore, inexpensive chip connecting terminals can be obtained easily in place of expensive bumps which are hard to be formed. Since it is not required to use solder as the paste 7, a solder-free condition which is desirable under the present lead regulating condition can be accomplished on a package and board assembly.

Description

Detailed Description of the Invention

[0001]

The present invention relates to a semiconductor device and / or a semiconductor device.
Or, it relates to an integrated circuit formed by other elements. The present invention also encapsulates a chip mounting an integrated circuit,
Packaging method for packaging or packaging.

[0002]

2. Description of the Related Art Conventionally, a wire bonding method or a bump method has been known as an internal connection method in an IC (integrated circuit) chip package. The wire bonding method achieves electrical connection with an external circuit of the chip by individually wire-connecting a pad, which is a circuit electrode terminal formed on the chip, and a lead end for leading out to the outside of the package. However, this method is difficult to reduce the size and pitch of each pad,
In addition, since there is a restriction on the formation of external leads, there is already a limit to high integration of chips and reduction of mounting area.

On the other hand, the bump method allows electrical connection to the outside of the chip via the bumps formed on the pads. According to this, it is relatively easy to reduce the size and pitch of the pad, and it is not necessary to form an external lead unlike the wire bonding method, which is advantageous for high integration of the chip and reduction of the mounting area. is there. But,
To form bumps, metal such as gold or solder must be used as the bump material. In addition, a precious metal may be required as the base of the bump. Therefore, the formation of the bumps and the external connection via the bumps have the drawbacks of being technically difficult and of being economically expensive.

[0004]

SUMMARY OF THE INVENTION The present invention has been made in view of the above points, and an object thereof is to provide a simple and inexpensive integrated circuit device and a packaging method thereof. is there.

[0005]

SUMMARY OF THE INVENTION An integrated circuit device according to the present invention is an IC having an integrated circuit formed thereon and having pads on its surface.
An integrated circuit device including a chip, comprising: a resin for sealing a region of the surface of the chip excluding the pad; and a thermoplastic or thermosetting conductive paste layer provided in contact with the pad. It is characterized by having.

A packaging method according to the present invention is a packaging method of an integrated circuit device including an IC chip on which an integrated circuit is formed and which has pads on the surface thereof, wherein a region of the surface of the chip excluding the pads is used. And a paste attaching step of forming a conductive paste layer by bringing a thermoplastic or thermosetting conductive paste into contact with the pad.

[0007]

Embodiments of the present invention will be described below in detail with reference to the drawings. 1 and 2 show a packaging process of an integrated circuit chip according to an embodiment of the present invention. In FIG. 1, an integrated circuit chip 1 obtained after the wafer process is completed has a plurality of pads 2 which are input / output electrode terminals of the integrated circuit, as shown in the plan view and the sectional view of FIG. The pad 2 is made of a material such as aluminum or copper and is exposed on the surface of the chip 1 and shaped into a predetermined shape, for example, a square or a rectangle. Note that the pad 2 does not have to be formed in a protruding shape as shown in the figure, but in reality, it is often formed in the bottom surface of a recess or in a plane. In the following, for the sake of clarity of explanation, the pad 2 is shown as a protrusion on the drawing.

The chip 1 is first placed in the mold container 3 as shown in step (B), and then, as shown in mask step (C), covers each main exposed surface of the pad 2 as a mask. Further, a stainless pin (standing member) 4 having a shape suitable for abutting is set up. Stainless steel is suitable for the standing member because it has sufficient strength (hardness), is easy to process, and has low adhesiveness to the resin 5.

[0009] Then, as shown in the laminating step (D), with the stainless pin 4 held upright,
The insulating resin 5 is poured into the mold container 3, laminated on the surface of the chip 1 and sealed. The formation of the resin 5 does not depend on such potting, but the so-called transfer molding method, casting method, pellet forming method (a resin body (pellet) having a predetermined shape is placed at a predetermined position on the chip 1, and heat treatment is performed. Etc., various methods are conceivable such as melting the resin body with the above and spreading it on the surface of the chip 1.

When the laminated resin 5 is solidified and the resin sealing of the chip 1 is completed, the resin-sealed chip 1 and the stainless steel pin 4 are removed from the mold container 5 as shown in step (E) of FIG. Are integrally taken out, and as shown in the mask removing step (F), the stainless pin 4 is removed from the chip 1 by moving it in the axial direction. When the stainless steel pin 4 is removed, the pad 2 is exposed and the other surface is covered with the resin 5. In appearance, the exposed portion of the pad 2 has a concave shape.

In this state, a process using the squeegee 6 is performed as shown in step (G). The squeegee 6 is preferably a plate-shaped member made of an elastic material such as rubber, and is coated with a conductive paste 7 capable of sliding its side end on the surface of the resin 5 while maintaining high airtightness. It is a tool for doing. The appearance and usage form are shown in, for example, FIGS. 3 and 4.

In FIG. 3, the squeegee 6 is inclined at one end of the resin 5 with respect to the surface of the resin 5, and its side end is applied so as to apply a predetermined pressure to the surface of the resin 5 on the chip 1. Contact. From this position, the resin 5 is slid to the other end of the resin 5 in the direction of arrow a opposite to the inclined side while maintaining the inclined and abutted state. At the start of this sliding, the conductive paste 7 is placed on the contact surface between the resin 5 and the squeegee 6 in advance. The squeegee 6 is slid and shown in FIG.
When the sliding over the entire surface of the resin 5 is completed as shown in FIG. 3, the surface of the resin 5 is coated with the conductive paste 7, but since the contact surface between the resin 5 and the squeegee 6 is highly airtight, the conductive paste 7 Will be spread or embedded only on the concave exposed portion of the pad 2 without slipping and adhering on the surface of the resin 5. Therefore, the step (G) is responsible for a paste attaching, forming or embedding step or a coating step.

As can be seen from FIGS. 3 and 4, it is preferable that the contact end of the squeegee 6 with the resin 5 has a width equal to or slightly wider than the width of the tip 1. This is because the coating and printing process of the conductive paste 7 is completed by sliding the squeegee 6 from one end to the other on the surface of the resin 5. The resin 5 here serves as a metal mask for applying and printing the conductive paste 7.

The conductive paste 7 is made of a thermoplastic or thermosetting conductive material. As an example, a thermoplastic conductive material composed of polyester as a base resin (main agent) and silver (Ag) particles and copper (Cu) particles as a filler (filler), and a cresol novolac type epoxy resin as a base resin and cured A thermosetting conductive material in which the agent is phenol novolac resin and the filler is silver (Ag) particles and copper (Cu) particles is applicable. When the conductive paste 7 is made of a thermoplastic material, the step (G) is performed while the conductive paste 7 is heated, that is, in the melted state.

Thus, as shown in FIG. 2H, even though the chip 1 is resin-sealed with the resin 5, the pad 2 is led out to the surface of the resin 5 through the conductive paste 7. Become. The conductive paste 7 serves as an external connection terminal in this state. In addition, when the integrated circuit device 1A shown in FIG. 2H is not a finished product and the external exposed area of the conductive paste 7 is desired to be further widened, the sealing step (B) to
The processes such as (F) and the paste forming process (G) may be repeated by making the cross-sectional area of the stainless steel pin 4 larger than in the previous process. For example, if the next step is made larger than the cross-sectional area of the stainless steel pin 4 for the first time and the steps (B) to (G) are repeated only twice, a finished product as shown in FIG. 5 is completed.

That is, as a mask, a stainless steel pin 4'having a cross-sectional area larger than the exposed area of the conductive paste 7 is exposed.
Is erected on the externally exposed surface of each conductive paste 7, and the above (D) to (2) are performed as the second sealing step and the second paste attaching step.
If the same process treatment as in (F) is applied, it is possible to
The resin 5'of the first layer is laminated, but the conductive paste 7 of the first layer
In the externally exposed portion, a concave portion having a bottom surface that is one size larger than the paste exposed surface and surrounded by the second layer resin 5'as a wall surface is formed. And this time,
The conductive paste 7'of the second layer is filled in the large recesses in the step (G). Therefore, in the finished product 1B as shown in FIG. 5, the second-layer conductive paste 7'having a large exposed area serves as an external connection terminal.

Further, the externally exposed portion of the conductive paste 7 or 7'does not have to have the same shape as the pad 2 (see FIG. 2H) or an enlarged shape thereof (see FIG. 5), which will be described later. It may be deformed so as to match the connection pattern of the mounting board. Alternatively, the external exposed portion itself may be formed so as to bear a connection pattern on mounting, or may have a shape for fixing the chip 1 to a mounting substrate,
Various shapes can be adopted.

As an example, FIG. 6 is a plan view and a sectional view of an integrated circuit device 1C as a finished product including the chip 1, and the second layer conductive paste 7'is the first layer conductive paste on the pad 2. 7 is formed in a pattern extending to the outer edge side of the integrated circuit with a relatively large width. That is, the stainless pin 4 ′ as a mask for excluding the sealing target region, which is provided upright in the above-described steps (B) to (G) of the second round.
Each has a pattern-shaped cross section to be carried by the conductive paste 7'as shown in the plan view of FIG. As a result, the region other than the sealing target region (conduction target region) presents the pattern, so that the externally exposed portion of the conductive paste 7 ′ can be formed in a desired pattern shape, and thus the chip 1 is formed. Will form the desired external exposed electrodes or mounting terminals.

However, since the conductive paste is formed on a minute chip, it is unavoidable that there is a limit to the degree of freedom in pattern routing, and a relatively simple pattern is inevitable. However, the mounting effect is considerably greater than when there is no room for pattern formation. Note that the present invention is not limited to such a two-layer structure, and by repeating the above steps (B) to (G), an integrated circuit device having a larger number of layer structures can be formed.

The integrated circuit devices 1A, 1B and 1C configured as described above are printed circuit board (PC) as follows.
B: Printed Circuit Board or printed wiring board). FIG. 7 is a sectional view when the integrated circuit is mounted on the PCB 100. In FIG. 7, the PCB 10
0 has a two-layer wiring structure, and the front side first layer wiring pattern 1
Integrated circuit devices 1A to 1C are mounted on 01.

More specifically, the integrated circuit 1B is mounted by aligning the externally exposed portions of the conductive paste layer 7'of the integrated circuits 1B and 1C so as to contact the corresponding positions of the front surface side first layer wiring pattern 101 of the PCB. Placed. Then, in this mounted state, the heater 200 heats the integrated circuit devices 1B and 1C from the back surface of the chip 1. An example of the heating temperature is about 180 ° to 280 ° C, but a low temperature is preferable.

By such heating, the thermoplastic conductive paste layers 7 and 7'are melted, the conductive paste is adapted to the wiring pattern 101 and the metallic connection is achieved, and then the heating from the heater 200 is stopped. After that, when the conductive paste layers 7 and 7 ′ are cooled, they solidify to form the wiring pattern 1
A complete electrical connection with 01 is achieved. Even when the conductive paste layers 7 and 7'are thermosetting, the integrated circuit 1B is heated by the heater 200 after the mounting step in the same manner as described above, but the conductive paste layers 7 and 7'are hardened in a heated state. The connection with the wiring pattern 101 is achieved.

The case where the integrated circuit device 1A is mounted is basically the same as the case of the integrated circuit devices 1B and 1C. However, in this example, the conductive paste layer 107 made of the same material as the conductive paste layer 7 is applied or formed in advance as a base on the placement position of the integrated circuit device 1A in the wiring pattern 101. By doing so, the conductive paste layer 7 on the integrated circuit device 1A side and the conductive paste layer 107 on the wiring pattern 101 fuse well with each other during heating, and the connectivity between the pad 2 and the wiring pattern 101 is improved. Becomes Note that different materials may be used for the conductive paste layer 7 and the conductive paste layer 107 on the wiring pattern 101.

Thus, in the embodiments described so far, the inexpensive chip connection terminals can be easily obtained by using the conductive paste instead of the bumps which are expensive and difficult to form. Further, since it is not necessary to use solder as the conductive paste, solder-free can be achieved on the package and board assembly, which is convenient under the lead regulation.

Although the conductive paste containing silver and copper particles was used in the above embodiment, a conductive paste containing solder particles can be used as the filler if the lead regulation is not satisfied. Of course. Further, in the above embodiment, the conductive paste layer is formed so as to completely fill the concave portion in which the pad or the lower paste layer is arranged on the bottom surface with the conductive paste layer. It suffices that the conductive paste is provided so as to be brought into contact with the conductive paste and led out to the outside.

In addition, although various means and steps have been described in a limited manner in the above-described embodiment, it is possible to appropriately modify them within a range that can be designed by those skilled in the art.

[0027]

As described in detail above, according to the present invention,
It is possible to provide a simple and inexpensive integrated circuit device and its packaging method.

[Brief description of drawings]

FIG. 1 is a schematic flow chart showing respective steps of a first half of a packaging process of an integrated circuit according to an embodiment of the present invention.

FIG. 2 is a schematic flow chart showing each step of the latter half of the packaging process of the integrated circuit as one embodiment according to the present invention.

FIG. 3 is an external view of an integrated circuit showing an initial state of a conductive paste application process in FIG.

FIG. 4 is an external view of the integrated circuit showing a state where the conductive paste applying step in FIG. 2G is completed.

FIG. 5 is a cross-sectional view of an integrated circuit formed in another embodiment according to the present invention.

6A and 6B are a plan view and a sectional view of an integrated circuit formed in still another embodiment according to the present invention.

FIG. 7 is a cross-sectional view showing a mounting mode of the integrated circuit device according to the present invention on a PCB.

[Explanation of symbols]

 1 IC Chip 2 Pad 3 Type Container 4, 4'Stainless Pin 5, 5 'Resin 6 Squeegee 7, 7' Conductive Paste 1A, 1B, 1C Integrated Circuit Device 100 PCB 101, 102 Wiring Pattern 103 Insulating Layer 107 Base Conductive Paste 200 heater

Claims (11)

[Claims] 1. An integrated circuit device including an IC chip on which an integrated circuit is formed and having a pad on the surface, wherein a resin for sealing a region of the surface of the chip excluding the pad and the pad are provided. An integrated circuit device having a thermoplastic or thermosetting conductive paste layer provided in contact with the conductive paste layer. 2. The integrated circuit device according to claim 1, wherein the exposed surface of the conductive paste layer is larger than the surface area of the pad. 3. The integrated circuit device according to claim 1, wherein the externally exposed surface of the conductive paste layer forms a predetermined pattern. 4. The conductive material contained in the conductive paste layer is silver and / or copper.
2. The integrated circuit device according to 2 or 3. 5. A packaging method for an integrated circuit device including an IC chip having an integrated circuit formed thereon and having a pad on the surface, wherein a resin is formed on a region of the surface of the chip excluding the pad. A packaging method comprising: a stopping step; and a paste attaching step of forming a conductive paste layer by bringing a thermoplastic or thermosetting conductive paste into contact with the pad. 6. The encapsulating step includes a mask step of masking the pad, a laminating step of laminating the resin over the surface of the chip with the pad masked, and a laminating step of the resin. And a mask removing step of removing the mask of the pad later, the paste attaching step, the conductive paste is deposited on the surface of the resin after removal of the mask, the conductive paste is the resin 6. The packaging step according to claim 5, further comprising an embedding step of spreading the pad on the pad by sliding a squeegee on the surface of the pad. 7. A second sealing step of further forming a resin in a sealing target region of the surface of the resin except at least an externally exposed surface of the conductive paste after the conductive paste layer is formed, 7. The packaging method according to claim 6, further comprising a second paste attaching step of further forming a layer of the conductive paste in a conductive target area other than the sealing target area on the surface of the resin. 8. The packaging method according to claim 7, wherein the second sealing step and the second paste attaching step are repeated. 9. The packaging method according to claim 5, wherein the final exposed surface of the conductive paste layer is larger than the surface area of the pad. 10. The packaging method according to claim 5, wherein the final external exposed surface of the conductive paste layer forms a predetermined pattern. 11. The packaging method according to claim 5, wherein the conductive material included in the conductive paste layer is silver and / or copper.