JPH09330941A - High heat-conduction paste solder and semiconductor device - Google Patents
High heat-conduction paste solder and semiconductor deviceInfo
- Publication number
- JPH09330941A JPH09330941A JP8152359A JP15235996A JPH09330941A JP H09330941 A JPH09330941 A JP H09330941A JP 8152359 A JP8152359 A JP 8152359A JP 15235996 A JP15235996 A JP 15235996A JP H09330941 A JPH09330941 A JP H09330941A
- Authority
- JP
- Japan
- Prior art keywords
- solder
- paste solder
- conductive paste
- high thermal
- thermal conductive
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
- H01L2924/13055—Insulated gate bipolar transistor [IGBT]
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3457—Solder materials or compositions; Methods of application thereof
- H05K3/3485—Applying solder paste, slurry or powder
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Die Bonding (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、各種の電子部品、
電子機器などで金属接合材料として使用されるペースト
半田およびそれを用いた半導体デバイスに係り、特にペ
ースト半田の組成に関する。TECHNICAL FIELD The present invention relates to various electronic parts,
The present invention relates to a paste solder used as a metal bonding material in electronic equipment and the like and a semiconductor device using the same, and particularly to a composition of the paste solder.
【０００２】[0002]
【従来の技術】従来、半導体デバイス、電子部品などの
製造に際して使用されるペースト半田は、２種類以上の
金属（例えばＰｂ、Ｓｎ）をフラックスなどと混合した
金属合金であり、比較的低い温度で金属を接合すること
ができる。2. Description of the Related Art Conventionally, paste solder used in the manufacture of semiconductor devices, electronic parts, etc. is a metal alloy in which two or more kinds of metals (for example, Pb, Sn) are mixed with a flux, etc. Metals can be joined.
【０００３】図３は、従来の半田が半導体デバイスに使
用されている様子の一例を示す断面図である。図３にお
いて、３１は銅フレーム、３２は前記銅フレーム上にマ
ウントされたシリコンチップ（半導体素子チップ）、３
３は前記銅フレームの上面とシリコンチップの裏面電極
を接合する半田層である。FIG. 3 is a sectional view showing an example of a conventional solder being used in a semiconductor device. In FIG. 3, 31 is a copper frame, 32 is a silicon chip (semiconductor element chip) mounted on the copper frame, 3
3 is a solder layer for joining the upper surface of the copper frame and the back surface electrode of the silicon chip.
【０００４】しかし、従来の半田層に使用されているペ
ースト半田は、一般に、熱伝導が悪く、電気抵抗も大き
く、特に、使用される半田の厚さが約１５０μｍ以上に
なる場合において、熱伝導および電気抵抗の改善が求め
られているのが現状であり、また、半田の機械的強度の
向上も求められている。However, the paste solder used in the conventional solder layer generally has poor heat conduction and high electric resistance, and particularly when the thickness of the solder used is about 150 μm or more, heat conduction is reduced. At present, there is a demand for improvement in electrical resistance, and further improvement in mechanical strength of solder is also required.
【０００５】[0005]
【発明が解決しようとする課題】上記したように従来の
ペースト半田は、熱伝導が悪く、電気抵抗も大きく、機
械的強度も低いという問題があった。本発明は上記の問
題点を解決すべくなされたもので、熱伝導および電気抵
抗を改善するとともに機械的強度の向上を図り得る高熱
伝導ペースト半田およびそれを用いた半導体デバイスを
提供することを目的とする。As described above, the conventional paste solder has problems that heat conduction is poor, electric resistance is large, and mechanical strength is low. The present invention has been made to solve the above problems, and an object of the present invention is to provide a high thermal conductive paste solder capable of improving thermal conductivity and electric resistance and mechanical strength, and a semiconductor device using the same. And
【０００６】[0006]
【課題を解決するための手段】本発明の高熱伝導ペース
ト半田は、熱伝導度および電気抵抗が比較的低い半田材
料が用いられたペースト半田に、熱伝導度および電気抵
抗が比較的高い粒状の金属を練り込んでなることを特徴
とする。The high thermal conductive paste solder of the present invention is a paste solder using a solder material having a relatively low thermal conductivity and electrical resistance, and is a granular solder having a relatively high thermal conductivity and electrical resistance. It is characterized by kneading metal.
【０００７】また、本発明の半導体デバイスは、銅フレ
ームと、ペースト半田に粒状の金属を練り込んでなる高
熱伝導ペースト半田が前記銅フレーム上に印刷され、加
熱固定された半田層と、前記半田層上に固着された半導
体チップとを具備することを特徴とする。Further, in the semiconductor device of the present invention, a copper frame, a high thermal conductive paste solder obtained by kneading a granular metal into paste solder is printed on the copper frame and fixed by heating, and the solder. And a semiconductor chip fixed on the layer.
【０００８】[0008]
【発明の実施の形態】以下、図面を参照して本発明の実
施の形態を詳細に説明する。図１は、本発明の第１の実
施の形態に係る高熱伝導ペースト半田の一使用例に係る
半導体デバイスを示している。BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. FIG. 1 shows a semiconductor device according to a usage example of the high thermal conductive paste solder according to the first embodiment of the present invention.
【０００９】本発明の高熱伝導ペースト半田は、熱伝導
度および電気抵抗が比較的低い半田材料が用いられた従
来のペースト半田１１に粒状の金属１２を練り込んで高
熱伝導ペースト半田として仕上げたものであり、例えば
ＰｂＳｎ系の半田材料がフラックスなどと混合された従
来のペースト半田に２０〜５０μｍの粒径を有する粒状
の銅を練り込んだものである。The high thermal conductive paste solder of the present invention is obtained by kneading a granular metal 12 into a conventional paste solder 11 using a solder material having a relatively low thermal conductivity and electric resistance and finished as a high thermal conductive paste solder. That is, for example, a conventional paste solder in which a PbSn-based solder material is mixed with a flux or the like is kneaded with granular copper having a particle diameter of 20 to 50 μm.
【００１０】なお、前記ペースト半田１１の材料として
は、ＰｂＳｎなどのＰｂＳｎ系に限らず、ＳｎＳｂなど
でもよい。また、前記粒状金属１２としては、前記ペー
スト半田１１との濡れ性が良いことが条件であり、例え
ばＣｕ（銅）、Ａｇ（銀）、Ｆｅ（鉄）、Ｎｉ（ニッケ
ル）、Ｃｕ系合金、Ｆｅ系合金、Ｎｉ系合金を、単品
で、あるいは、複数種類混合して使用することが可能で
ある。The material of the paste solder 11 is not limited to the PbSn system such as PbSn, but SnSb or the like may be used. Further, the granular metal 12 is required to have good wettability with the paste solder 11, and for example, Cu (copper), Ag (silver), Fe (iron), Ni (nickel), Cu-based alloy, The Fe-based alloy and the Ni-based alloy can be used individually or as a mixture of a plurality of types.
【００１１】また、前記粒状金属１２の直径（粒径）と
しては、高熱伝導ペースト半田を半田層として仕上げる
厚さに合わせて決められるが、換言すれば、粒状金属１
１の粒径を変えることにより半田層の厚さを変えること
が可能である。Further, the diameter (particle diameter) of the granular metal 12 is determined according to the thickness of the high heat conductive paste solder to be finished as a solder layer. In other words, the granular metal 1
It is possible to change the thickness of the solder layer by changing the particle size of 1.
【００１２】また、前記粒状金属１２として、複数種類
の粒径の金属を混合することにより、ペースト半田１１
に一層多量の粒状金属１２を混合することが可能にな
る。図１に示す半導体デバイスは、銅フレーム３１と、
前記高熱伝導ペースト半田が前記銅フレーム上に印刷さ
れ、加熱固定されてなる半田層１０と、前記半田層１０
上に固着された半導体チップ３２とを具備する。Further, as the granular metal 12, a paste solder 11 is prepared by mixing metals having a plurality of particle sizes.
It becomes possible to mix a larger amount of the granular metal 12. The semiconductor device shown in FIG. 1 includes a copper frame 31 and
The solder layer 10 in which the high thermal conductive paste solder is printed on the copper frame and fixed by heating, and the solder layer 10
And a semiconductor chip 32 fixed on the top.
【００１３】次に、図１の半導体デバイスのアセンブリ
工程の一例について説明する。銅フレーム３１上にメタ
ルマスクを使用して高熱伝導ペースト半田を印刷し、こ
のペースト半田上に例えば５ｍｍ□のシリコンチップ３
２を載置することによって銅フレーム上にシリコンチッ
プをマウントする。Next, an example of an assembly process of the semiconductor device of FIG. 1 will be described. A high thermal conductive paste solder is printed on the copper frame 31 using a metal mask, and a silicon chip 3 of, for example, 5 mm □ is printed on the paste solder.
Mount a silicon chip on a copper frame by mounting 2.
【００１４】この後、前記ペースト半田を溶かすように
加熱すると、高温でペースト半田１１は液状になるが、
粒状の銅１２は溶けないで固形状態で残る。この後、温
度が下がり、ペースト半田１１が固まることにより、高
熱伝導ペースト半田の半田層１０となり、マウントが完
了する。Thereafter, when the paste solder is heated so as to be melted, the paste solder 11 becomes liquid at a high temperature,
The granular copper 12 does not melt and remains in a solid state. After that, the temperature is lowered and the paste solder 11 is solidified to become the solder layer 10 of the high thermal conductive paste solder, and the mounting is completed.
【００１５】マウントが完了した状態において、半田層
１０の厚さを粒状の銅１２の直径（粒径）以上のほぼ一
定値に均一に保つことが可能になり、半導体デバイスの
シリコンチップ上面の平坦度が従来よりも改善された。When the mounting is completed, the thickness of the solder layer 10 can be maintained at a substantially constant value equal to or larger than the diameter (particle diameter) of the granular copper 12, and the upper surface of the silicon chip of the semiconductor device is flat. The degree is improved than before.
【００１６】因みに、マウント完了状態において、前記
半田層１０の厚さの面内ばらつきは、従来は±１０μｍ
であったが、上記実施例では面内ばらつきが１０μｍ以
下になり、非常に良好な結果を得た。Incidentally, in the mounted state, the in-plane variation in the thickness of the solder layer 10 is conventionally ± 10 μm.
However, in the above example, the in-plane variation was 10 μm or less, and a very good result was obtained.
【００１７】しかも、マウント完了状態において、前記
半田層１０は、内部で接触している粒状の銅１２の性質
（高熱伝導度、低電気抵抗）により、放熱性は高く、電
気抵抗は低い。Moreover, in the mounted state, the solder layer 10 has high heat dissipation and low electric resistance due to the properties of the granular copper 12 (high thermal conductivity, low electric resistance) that is in contact with the inside.
【００１８】因みに、前記実施例の高熱伝導ペースト半
田に粒状の銅を例えば重量比３％で混合した場合に得ら
れる半田層１０の熱伝導は、Ａｇを１とすると、約０．
３程度であり、従来のペースト半田は約０．１程度であ
るのに対して３倍になり、大幅に改善された。なお、粒
状の銅を重量比０．５〜２０％の範囲で混合した結果、
良好な結果が得られた。Incidentally, the heat conduction of the solder layer 10 obtained when granular copper is mixed, for example, in a weight ratio of 3% with the high heat conduction paste solder of the above-mentioned embodiment, is about 0.
This is about 3, which is three times as large as that of the conventional paste solder, which is about 0.1, which is a significant improvement. In addition, as a result of mixing granular copper in the range of 0.5 to 20% by weight,
Good results have been obtained.
【００１９】また、上記半田層１０の電気抵抗は、約５
Ω・ｃｍ程度であり、従来のペースト半田は約１９Ω・
ｃｍ程度であるのに対して半分になり、やはり大幅に改
善された。The electrical resistance of the solder layer 10 is about 5
Ω · cm, the conventional paste solder is about 19Ω ・
Although it was about cm, it was halved, which was a great improvement.
【００２０】なお、前記ペースト半田１１に混合される
フラックスとしては、粒状金属の腐蝕を防ぐ効果の点で
脱ハロゲン性のフラックスを使用することが望ましい。
なお、本発明の高熱伝導ペースト半田は、シリコンチッ
プをマウントする場合に限らず、放熱板上と金属絶縁基
板との間にヒートスプレッダー（放熱板）をマウントす
る場合にも使用できる。As the flux mixed with the paste solder 11, it is desirable to use a dehalogenating flux from the viewpoint of the effect of preventing corrosion of the granular metal.
The high thermal conductive paste solder of the present invention can be used not only for mounting a silicon chip, but also for mounting a heat spreader (radiating plate) between a radiator plate and a metal insulating substrate.
【００２１】図２は、図１中の高熱伝導ペースト半田の
他の使用例に係る大電力半導体デバイスの一例としてＩ
ＧＢＴ（絶縁ゲート型バイポートランジスタ）の一部を
示している。FIG. 2 shows an example of a high power semiconductor device according to another example of using the high thermal conductive paste solder shown in FIG.
A part of GBT (insulated gate type bipolar transistor) is shown.
【００２２】この大電力半導体デバイスは、金属（例え
ばＣｕ）製の放熱板２１と、前記放熱板２１上に形成さ
れた高熱伝導ペースト半田からなる約５００μｍ以上の
厚さを有する半田層（第１の半田層）２０と、絶縁基板
（例えばセラミック基板）２２の両面に金属パターン
（例えば銅パターン）２３が形成され、裏面が前記半田
層３０上に固着された金属パターン付き絶縁基板２４
と、前記金属パターン付き絶縁基板２４の表面側の複数
箇所で前記高熱伝導ペースト半田が印刷され、加熱固定
されてなる複数個の半田層（第２の半田層）１０と、前
記半田層１０上に固着された大電力半導体チップである
ＩＧＢＴチップ２５と、前記ＩＧＢＴチップ２５の相互
間を接続するＡｌ配線２６とを具備する。This high-power semiconductor device includes a heat dissipation plate 21 made of metal (for example, Cu) and a solder layer (first solder) having a thickness of about 500 μm or more and made of a high heat conductive paste solder formed on the heat dissipation plate 21. Of the solder layer) 20 and an insulating substrate (for example, a ceramic substrate) 22 on both sides of which a metal pattern (for example, a copper pattern) 23 is formed, and the back surface is fixed onto the solder layer 30.
A plurality of solder layers (second solder layers) 10 in which the high thermal conductive paste solder is printed and fixed by heating at a plurality of positions on the front surface side of the insulating substrate with a metal pattern 24; An IGBT chip 25, which is a high-power semiconductor chip fixed to the above, and an Al wiring 26 that connects the IGBT chips 25 to each other.
【００２３】このように半田層２０の仕上げ厚さを５０
０μｍ以上にすることにより、熱伝導および電気抵抗の
良好な半田層２０を放熱板として使用することが可能で
ある。Thus, the final thickness of the solder layer 20 is 50
By setting the thickness to 0 μm or more, it is possible to use the solder layer 20 having good heat conduction and electric resistance as a heat dissipation plate.
【００２４】[0024]
【発明の効果】上述したように本発明によれば、熱伝導
および電気抵抗を改善するとともに機械的強度の向上を
図り得る高熱伝導ペースト半田およびそれを用いた半導
体デバイスを提供することができる。As described above, according to the present invention, it is possible to provide a highly heat-conductive paste solder capable of improving heat conduction and electric resistance and improving mechanical strength, and a semiconductor device using the same.
【図１】本発明の第１の実施の形態に係る高熱伝導ペー
スト半田の一使用例に係る半導体デバイスを示す断面
図。FIG. 1 is a cross-sectional view showing a semiconductor device according to one usage example of the high thermal conductive paste solder according to the first embodiment of the present invention.
【図２】図１中の高熱伝導ペースト半田の他の使用例に
係る大電力半導体デバイスを示す断面図。FIG. 2 is a cross-sectional view showing a high-power semiconductor device according to another usage example of the high thermal conductive paste solder in FIG.
【図３】従来のペースト半田の使用例に係る半導体デバ
イスを示す断面図。FIG. 3 is a cross-sectional view showing a semiconductor device according to a conventional use example of paste solder.
１０、２０…高熱伝導ペースト半田の半田層、 １１…ペースト半田、 １２…粒状金属、 ２１…Ｃｕ製の放熱板、 ２２…絶縁基板（セラミック基板）、 ２３…金属パターン（銅パターン）、 ２４…銅パターン付きセラミック基板、 ２５…大電力半導体チップ、 ２６…Ａｌ配線 ３１…銅フレーム。 10, 20 ... Solder layer of high thermal conductive paste solder, 11 ... Paste solder, 12 ... Granular metal, 21 ... Cu heat dissipation plate, 22 ... Insulating substrate (ceramic substrate), 23 ... Metal pattern (copper pattern), 24 ... Ceramic substrate with copper pattern, 25 ... High-power semiconductor chip, 26 ... Al wiring 31 ... Copper frame.
Claims (7)
田材料が用いられたペースト半田と、前記ペースト半田
に練り込まれた熱伝導度および電気抵抗が比較的高い粒
状の金属とを具備することを特徴とする高熱伝導ペース
ト半田。1. A paste solder using a solder material having relatively low thermal conductivity and electric resistance, and a granular metal kneaded into the paste solder and having relatively high thermal conductivity and electric resistance. A high thermal conductive paste solder characterized by the above.
いはＳｎＳｂ系の半田材料が用いられており、 前記粒状の金属は、Ｃｕ、Ａｇ、Ｆｅ、Ｎｉ、Ｃｕ系合
金、Ｆｅ系合金、Ｎｉ系合金が、単品で、あるいは、複
数種類混合して使用されることを特徴とする請求項１記
載の高熱伝導ペースト半田。2. The paste solder is made of PbSn-based or SnSb-based solder material, and the granular metal is Cu, Ag, Fe, Ni, Cu-based alloy, Fe-based alloy, Ni-based alloy. 2. The high thermal conductive paste solder according to claim 1, wherein the high thermal conductive paste solder is used alone or as a mixture of plural kinds.
属が混合されていることを特徴とする請求項１または２
記載の高熱伝導ペースト半田。3. The granular metal is a mixture of metals having a plurality of particle sizes.
The high thermal conductive paste solder described.
材料が用いられており、 前記粒状の金属は２０〜５０μｍの粒径を有する粒状の
銅であり、 前記粒状の銅は前記ペースト半田に重量比が０．５〜２
０％で混合されていることを特徴とする請求項１記載の
高熱伝導ペースト半田。4. The paste solder is made of a PbSn-based solder material, the granular metal is granular copper having a grain size of 20 to 50 μm, and the granular copper is added to the paste solder by weight. Ratio is 0.5-2
The high thermal conductive paste solder according to claim 1, wherein the high thermal conductive paste solder is mixed at 0%.
ックスが混入されていることを特徴とする請求項１記載
の高熱伝導ペースト半田。5. The high thermal conductive paste solder according to claim 1, wherein the paste solder is mixed with a dehalogenating flux.
ースト半田が前記銅フレーム上に印刷され、加熱固定さ
れてなる半田層と、 前記半田層上に固着された半導体チップとを具備するこ
とを特徴とする半導体デバイス。6. A copper frame, a solder layer in which the high thermal conductive paste solder according to any one of claims 1 to 5 is printed and fixed on the copper frame by heating, and a solder layer on the solder layer. A semiconductor device comprising: a fixed semiconductor chip.
ずれか１項に記載の高熱伝導ペースト半田からなる５０
０μｍ以上の厚さを有する第１の半田層と、 絶縁基板の表面に金属パターンが形成され、裏面が前記
第１の半田層上に固着された金属パターン付き絶縁基板
と、 前記金属パターン付き絶縁基板の表面側の複数箇所で前
記請求項１乃至５のいずれか１項に記載の高熱伝導ペー
スト半田が印刷され、加熱固定されてなる複数個の第２
の半田層と、 前記第２の半田層上に固着された半導体チップと、 前記半導体チップの相互間を接続する配線とを具備する
ことを特徴とする半導体デバイス。7. A high heat conductive paste solder 50 according to claim 1, which is formed on the metal heat dissipation plate and the metal heat dissipation plate.
A first solder layer having a thickness of 0 μm or more; a metal pattern formed on a surface of an insulating substrate; and a back surface fixed on the first solder layer; A plurality of second thermal conductive paste solders according to any one of claims 1 to 5, which are printed and fixed by heating at a plurality of positions on the front surface side of the substrate.
2. A semiconductor device, comprising: the solder layer, a semiconductor chip fixed on the second solder layer, and a wiring connecting the semiconductor chips to each other.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8152359A JPH09330941A (en) | 1996-06-13 | 1996-06-13 | High heat-conduction paste solder and semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8152359A JPH09330941A (en) | 1996-06-13 | 1996-06-13 | High heat-conduction paste solder and semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH09330941A true JPH09330941A (en) | 1997-12-22 |
Family
ID=15538827
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8152359A Pending JPH09330941A (en) | 1996-06-13 | 1996-06-13 | High heat-conduction paste solder and semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH09330941A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006320955A (en) * | 2005-05-20 | 2006-11-30 | Fuji Electric Device Technology Co Ltd | Solder alloy, and semiconductor device using the same |
| JP2010050381A (en) * | 2008-08-25 | 2010-03-04 | Fuji Electric Systems Co Ltd | Method of manufacturing semiconductor device |
| US7816249B2 (en) | 2005-05-20 | 2010-10-19 | Fuji Electric Systems Co., Ltd. | Method for producing a semiconductor device using a solder alloy |
| JP2014027314A (en) * | 2013-11-05 | 2014-02-06 | Rohm Co Ltd | Semiconductor device and method for manufacturing semiconductor device |
-
1996
- 1996-06-13 JP JP8152359A patent/JPH09330941A/en active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006320955A (en) * | 2005-05-20 | 2006-11-30 | Fuji Electric Device Technology Co Ltd | Solder alloy, and semiconductor device using the same |
| US7816249B2 (en) | 2005-05-20 | 2010-10-19 | Fuji Electric Systems Co., Ltd. | Method for producing a semiconductor device using a solder alloy |
| JP4635715B2 (en) * | 2005-05-20 | 2011-02-23 | 富士電機システムズ株式会社 | Solder alloy and semiconductor device using the same |
| JP2010050381A (en) * | 2008-08-25 | 2010-03-04 | Fuji Electric Systems Co Ltd | Method of manufacturing semiconductor device |
| JP2014027314A (en) * | 2013-11-05 | 2014-02-06 | Rohm Co Ltd | Semiconductor device and method for manufacturing semiconductor device |
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