JPH09330817A - Flat coil device and manufacture thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a flat coil device which can have a high Q value and can be manufactured with a less number of steps, and also to provide a method for manufacturing the flat coil device. SOLUTION: A flat coil device 1 has big features in two points, i.e., structure of a spiral coil 2 and method for manufacturing the coil. In a conductor part of the coil 2, a electrically-isolating side layer 13 made of photosensitive polyimide is subjected to a photolithographic process to form a groove 13a therein, a plating underlying layer 12 is formed on a surface of a lower electrically- isolating film 11 by a sputtering process so that electrically conductive particles are discretely formed, an electroless-plated conductive layer 21 is formed by an electroless-plating process on the underlying layer 12 as a plating pattern of the groove 13a, and an electroplated semiconductor layer 22 is formed by an electroplating process with the electroless-plated conductor layer 21 used as a conductive layer.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a coil portion, etc.
The quality factor Q [2πf (f; frequency value at which the reactor device operates), which is formed in a planar shape by utilizing C manufacturing technology and is related to the planar coil device used in the reactor device, etc. L (L: value of inductance of a reactor device or the like) / R (R: coefficient of electric resistance of a reactor device or the like) defined by the above] structure and manufacturing method improved so as to improve .

[0002]

2. Description of the Related Art For power supply devices, high frequency filter devices, etc.
In the kind of reactor device and transformer device that can be used,
In recent years, in order to realize miniaturization and flattening,
The coil part, which is the main part of the
It is becoming more and more common to manufacture in the shape of a sheet.
[JP-A 61-136363, JP-A 2-123
706, PESC '91 Record, p20
(1991), Institute of Electrical Engineers of Japan Material-Magnetics
See Study Group MAG-93-112, etc.] Reactor equipment using these IC manufacturing technologies
Various manufacturing methods are used to manufacture equipment and transformer devices.
Is used for example, and SiO is sequentially formed by a sputtering method.
₂A film, a Cu film, and a Ta film are formed, and the Ta film in these is mass-produced.
Used as ku N ₂Cu by ion beam etching
Film patterning process, formation of interlayer insulating film, magnetic film
A transformer whose main part is manufactured by repeating the formation of
Cases such as devices are known. Also, the conductor part of the coil
Is replaced by the method of forming by sputtering or vacuum evaporation
Recently, the method of forming by selective plating has attracted attention.
It is becoming more and more.

Hereinafter, a conventional planar coil device in which a coil is manufactured by using a plating method will be described with reference to the drawings. First, FIG. 9 shows a conventional planar coil device disclosed in the literature. Here, (a) to (g) of FIG. 9 are cross-sectional views schematically showing a manufacturing process of a conventional planar coil device using a plating method. In each of FIGS. 9B to 9G, some of the reference numerals already described in the drawings related to the previous process are omitted.

In FIG. 9, reference numeral 9 is a planar coil device mainly composed of a spiral coil 7, which is formed on a flat silicon substrate 8. In the manufacturing process of the planar coil device 9, first, SiO _{2 is formed} on the substrate 8.
To form a lower electric insulating film 81 having a film thickness of about 1 [μm] by vapor deposition (FIG. 9A). Next, the conductive layer 78 for electrolytic plating is formed on the lower electrical insulating film 81 by depositing a conductive material such as Cu to a film thickness of about 0.1 [μm] by vapor deposition. 9 (b)]. Next, a photoresist is applied on the conductive layer 78, and this photoresist is processed by using a well-known photolithography method and a well-known etching method to form a resist pattern 91 having a spiral pattern. [Fig. 9
(C)].

Next, using the resist pattern 91 as a mold, Cu is deposited by electroplating to form a conductive layer 72.
Are formed [FIG. 9 (d)]. After that, the resist pattern 91 is removed by using an organic solvent, and then the conductive layer 78 in the portion where the resist pattern 91 was formed is removed by an etching method to obtain a spiral conductive layer 71 [FIG. )]. The spiral conductive layers 71 and 72 thus obtained are the coils 7 of the planar coil device 9. Subsequently, an outer electrical insulating layer 82 is formed on the side and upper portions of the coil 7 using photosensitive polyimide or polyamide, and a portion of the outer electrical insulating layer 82 corresponding to the end of the coil 7 is penetrated. The hole 82a is formed by using the photolithography method [FIG. 9 (f)].

When the number of layers of the coil 7 included in the planar coil device 9 is plural, by repeating the above steps, 1
The coils 7 in the second and subsequent layers are formed on the coil 7 in the first layer. For the uppermost coil 7 of the planar coil device 9, the coil 7 exposed from the through hole 82a may be used as necessary.
The contact portion 7a (for example, a wire bonding pad) is formed by electroplating [FIG. 9].
(G)]. In addition, in FIG. 9, the number of turns of each coil 7 included in the planar coil device 9 is illustrated as 3 turns.

Next, as shown in FIG.
This is a conventional planar coil device disclosed in Japanese Patent No. 6610. Here, (a) to (g) of FIG. 10 are cross-sectional views schematically showing the manufacturing process of the conventional planar coil device using the thin film technique and the selective plating method. In each of FIGS. 9B to 9G, some of the reference numerals already described in the drawings related to the previous process are omitted.

In FIG. 10, reference numeral 9A denotes a planar coil device mainly composed of a spiral coil 7A, and a silicon substrate 8 having semiconductor elements incorporated therein.
This is a so-called on-chip planar coil device formed above. In the manufacturing process of the planar coil device 9A, first, the lower electrical insulating film 81 is formed on the substrate 8 in the same manner as in the planar coil device 9 [FIG. 10 (a)], and then the lower electrical insulating film 81 is formed. On the insulating film 81, Ti, Cr, Pd, etc., Ni, C
A multilayer metal film 79 of u, Ag, etc. is formed by the sputtering method [FIG. 10 (b)]. Next, the multi-layer metal film 79 is processed into a spiral shape by using a well-known photolithography method and etching method to form the lower conductor layer 73 [FIG.
(C)]. Next, an electrically insulating film is formed on the exposed portion of the lower electrically insulating film 81 and the lower conductor layer 73 using a non-photosensitive synthetic resin material, and faces the lower conductor layer 73 of the electrically insulating film. The side electrical insulating layer 83 is formed by removing the portion to be used by the well-known photolithography method and etching method [FIG. 10 (d)].

Next, Ag, by electroplating or electroless plating is applied to the exposed portion of the lower conductor layer 73.
The upper conductor layer 74 is formed by depositing Cu, Au, etc. [FIG. 10 (e)]. The spiral lower conductor layer 73 and the spiral upper conductor layer 74 thus obtained are
It is the coil 7A in the case of the planar coil device 9A. Subsequently, an upper electrical insulating layer 84 is formed on the upper side of the coil 7A and the side electrical insulating layer 83 using photosensitive polyimide or polyamide, and a through hole 84a is formed in a portion corresponding to the end of the coil 7A by photo. It is perforated by using the lithography method [FIG. 10 (f)]. Coil 7 of planar coil device 9A
When the number of layers of A is plural, the above steps are repeated to form the coils 7A of the second and subsequent layers on the coil 7A of the first layer.

In the uppermost coil 7A of the planar coil device 9A, a contact portion 7a is formed on the coil 7A exposed from the through hole 84a as required, as in the planar coil device 9. [FIG. 10 (g)]. FIG.
In 0, the number of turns of each coil 7A of the planar coil device 9A is drawn as 3 turns. Regarding the planar coil device 9, it is also known that the outer electrical insulating layer 82 is formed by using a non-photosensitive synthetic resin material, and regarding the planar coil device 9A, the side electrical insulating layer 83 is formed. A case of using a photosensitive synthetic resin material is also known. Further, as the lower electrical insulating film 81, there are known cases in which a thermally oxidized silicon film, a resin film or the like is used.

By forming magnetic films above and below the coils 7, 7A, etc., the value of the inductance L of the planar coil devices 9, 9A, and thus the quality factor Q value (hereinafter simply referred to as Q value), can be reduced. An example of a planar coil device that is increased (Japanese Patent Laid-Open No. 5-6832, etc.), and by forming a slit in this magnetic film, the eddy current loss value generated in the magnetic film under a changing magnetic field such as an alternating magnetic field A case of a planar coil device in which the noise is reduced (Japanese Patent Laid-Open No. 6-77055, etc.), the value of the electric resistance R of the coil during AC operation by dividing each turn of the coils 7, 7A, etc. Example of a planar coil device in which the degree of increase in
No. 41320, etc.) are also known.

[0012]

In the above-described conventional planar coil device, for example, the planar coil devices 9 and 9A, a coil having a certain thickness direction dimension (for example, the coils 7 and 7A). In addition to being able to obtain, it has succeeded in downsizing and flattening reactor devices and transformer devices. However, in general, the Q value can be increased as the dimension in the thickness direction is increased from the well-known fact. Therefore, in a reactor device or the like, the dimension in the thickness direction of the coil is increased in order to increase the Q value. It needs to be bigger. However, (1) in the method of forming a coil on a substrate using a sputtering method or a vacuum evaporation method, a conductor layer having a thick film thickness corresponding to the dimension of the coil in the thickness direction is formed by the sputtering method or the vacuum evaporation method. Need to be formed by. However, forming a thick film (hereinafter, also referred to as a thick film) by the sputtering method causes a large internal stress in the conductor layer mainly because of the following. The thicker the film becomes, the more the value increases. As a result, the substrate is warped, which causes inconvenience in performing a post process such as a photo process. Also, for example, taking the case of forming a thick conductor layer having a film thickness of 30 [μm] using Al as an example, the film forming rate of Al in the sputtering method is 6 to 12 [μm / h]. Therefore, the film formation time requires about 2.5 to 5 [h], and the adoption of the sputtering method for forming the thick conductor layer is practical in terms of film formation time. It is not a thing.
Further, the above problems exist to the same degree or different even when the vacuum vapor deposition method is used.

The main causes of the internal stress generated in the conductor layer when the conductor layer is formed by the sputtering method are as follows. Thermal stress: The temperature of the conductor layer and the substrate both rises during the sputtering and drops to room temperature when the sputtering ends, but internal stress occurs due to the difference in the thermal expansion coefficient between the two.

Heat shrinkage: The conductor layer itself, which was in a high temperature state during the sputtering, irrespective of the substrate,
By cooling to room temperature after shrinking and shrinking,
Internal stress occurs. Phase transition: In the process of forming the conductor layer by the sputtering method, the conductor undergoes a phase transition from a liquid to a solid, so that an internal stress is generated due to the volume change at that time. Further, (2) the planar coil device 9 has the following problems.

Cu is often used for the conductive layers 71 and 72 constituting the coil 7 because it has a small specific electric resistivity value which is convenient for obtaining a high Q value. However, when Cu is used, it is inevitable that a part of the conductive layer 72 is etched when the conductive layer 78 is obtained by etching a part of the conductive layer 78. For this reason, the conductor cross-sectional area of the coil 7 is reduced (also referred to as reduction of conductor space factor), which hinders efforts to reduce the electric resistance value of the coil 7. That is, it is an obstacle to improving the Q value of the planar coil device 9. In addition, the conductive layer 78
Obtaining the conductive layer 71 by etching a part of is also increasing the number of steps required to manufacture the planar coil device 9.

In the process of forming the outer electrical insulating layer 82 using a photosensitive synthetic resin material, all of the photosensitive synthetic resin materials currently on the market have the property of exhibiting a large heat shrinkability when heat-cured. There is. For this reason, the upper surface of the outer electrical insulation layer 82 becomes more concavo-convex with a large dent at a portion having a large thickness dimension, as is remarkable when the coil 7 has a thick film conductor dimension. Therefore, in the case where the coil 7 has a plurality of layers, in order to form the coil 7 of the upper layer, a flattening step of flattening the upper surface of the outer electrical insulating layer 82 with respect to the coil 7 of the lower layer may be required. There is. This is also a factor that increases the number of steps required to manufacture the planar coil device 9. Further, although not shown in FIG. 9, in the planar coil device 9, as described above, there are cases where a magnetic film having slits is formed and cases where each turn has a coil divided into a plurality of turns. . The formation of slits in these magnetic films,
The division of each turn of the coil is generally performed using a photolithography method and an etching method. However, the presence of the unevenness on the upper surface of the outer electrical insulating layer 82 described in the above section is also inconvenient for the step of forming the slit in the magnetic film and the step of dividing each turn of the coil. In these cases as well, a flattening step of flattening the upper surface of the outer electrical insulating layer 82 may be necessary. Furthermore, (3) the planar coil device 9A has the following problems.

In order to form the lower conductor layer 73, which also serves as the base of the upper conductor layer 74, from the multi-layer metal film 79, a step of processing the multi-layer metal film 79 using the photolithography method and the etching method is indispensable. Therefore, the number of steps required to manufacture the planar coil device 9A is to be increased. In addition, the steps that require a photomask include the step of forming the lower conductor layer 73 from the multilayer metal film 79, and the side electrical insulating layer 8
3), the photomask cost is increased, and the number of steps required for manufacturing the planar coil device 9A is increased in addition to the above item.

The present invention has been made in view of the above-mentioned problems of the prior art, and an object of the invention is to improve the planar coil device which can have a high Q value and can be manufactured by a small number of steps. It is to provide the manufacturing method.

[0019]

SUMMARY OF THE INVENTION In the present invention, the above-mentioned objects are as follows: 1) A lower electrical insulating layer formed in a planar shape, and conductive particles discretely attached on the surface of the lower electrical insulating layer. And a side electrical insulating layer formed by using a resin material on the plating base layer to form a groove portion for a coil conductor, and the groove part on the plating base layer. At least on the plating underlayer side, the coil conductor formed by the electroless plating method and the resin on the upper surface of the side electric insulating layer excluding the groove and the upper surface of the coil conductor are formed in the area where Or a resin material used for the side electric insulation layer is a photosensitive synthetic resin. 2) In the means described in the above item 1, the resin material used for the side electric insulation layer is a photosensitive synthetic resin. Be made of wood, or 3) no electricity Process to form the lower electrical insulating layer in a planar shape using a material, and to form the plating underlayer by discretely attaching conductive particles to the surface of the lower electrical insulating layer using a physical method. A step of applying a resin material on the plating underlayer to form a side electrical insulating layer so as to have a groove for a coil conductor, and a portion where the above groove is formed on the plating underlayer At least on the plating underlayer side, a step of forming a coil conductor by an electroless plating method, and applying a resin material to cover the upper surface of the side electric insulation layer excluding the groove and the upper surface of the coil conductor. And 4) the resin material used in the step of forming the side electrical insulation layer is photosensitive. This is a synthetic resin material The manufacturing method in which the step of forming the coil conductor is performed after the firing treatment step performed by heating the synthetic resin material of 5), or 5) in the means described in 4 above, the side electrical insulating layer is provided. The step of forming is achieved by a manufacturing method in which a photosensitive synthetic resin material is used and the coating is performed a plurality of times.

[0020]

Embodiments of the present invention will be described below with reference to the drawings. In the following description of this section, the same parts as those of the conventional planar coil device 9A shown in FIG. 10 are designated by the same reference numerals, and the description thereof will be omitted. FIG.
1A and 1B are views showing an embodiment of a planar coil device according to the present invention, FIG. 1A is a schematic sectional view, and FIG. 1B is a top view of a main part of FIG. 1A. 2A to 2J are cross-sectional views schematically showing the manufacturing process of the planar coil device shown in FIG. In addition, in FIG. 1, about the code | symbol attached | subjected in FIG. 2, only the typical code | symbol was described. In addition, in each of FIGS. 2B to 2J, some of the reference numerals already described in the drawings related to the previous step are omitted. Further, FIG. 2 (j) has the same contents as FIG. 1 (a). 1 and 2, reference numeral 1 denotes a planar coil device mainly composed of a coil 2, a lower magnetic film 4 and an upper magnetic film 5 formed in a spiral shape, which is formed on a flat substrate 8. There is.

In the manufacturing process of the planar coil device 1, first, an electric insulating film 41 which is an electric insulating film having a thin film thickness is formed on a substrate 8 such as a flat silicon substrate by an electric insulating material [Fig. 2 (a)], and subsequently, the lower magnetic film 4 having a desired film thickness is formed on the electric insulating film 41 [FIG.
(B)]. The lower magnetic film 4 is a film made of a soft magnetic material having a desired film thickness, which is formed by using, for example, a sputtering method.
It is obtained by first forming the film on No. 1 and processing the film made of the soft magnetic material using, for example, a well-known photolithography method and a well-known etching method. On the lower magnetic film 4 and the like, the lower electric insulating film 11 is formed of an electric insulating material [FIG. 2 (c)].

Next, the plating underlayer 12, which is one of the features relating to the formation of the coil conductor for the planar coil device according to the present invention, is formed on the lower electrical insulating film 11 [FIG.
(D)]. The plating base layer 12 is formed by discretely attaching conductive particles such as metal particles to the surface of the lower electrical insulating film 11, and in this step, a physical method such as a sputtering method or a vapor deposition method is used. Application of the method is preferred. When using a conductive material to form a film (sputtered film) of the same quality as this conductive material on the surface of an object by the sputtering method,
The growth of crystals in the sputtered film is promoted by the adsorption of conductive material atoms centering on the part of the atoms that make up the object that has a large adsorption energy (generally called the nucleus). It has been known.

Thus, the adsorption of atoms of the electroconductive substance centering on the nucleus progresses, and the crystal of the electroconductive substance spreads in an island shape. However, many of these nuclei exist on the surface of the object. As a result, a large number of islands of this crystal will be formed on the surface of the object at the same time. If the sputtering is continued, the islands of individual crystals will gradually increase, and eventually the islands of crystals will overlap with each other, forming a film of conductive material on the surface of the object. is there.

The inventors paid attention to the state in which the crystals of the conductive material existed in the form of islands before the film was formed. Even when the object is the electrically insulating layer, the electrically conductive particles, which are island-shaped crystals of the electrically conductive substance, are discretely attached on the surface of the electrically insulating layer in this state, so The surface of the insulating layer is maintained in an electrically insulated state. Therefore, even if there is a layer formed by discretely attaching conductive particles, this layer (plating underlayer 12) is used for the purpose of obtaining the surface of the electrically insulating layer in an electrically insulating state. It need not be removed. Regarding the formation of the plating base layer 12, conductive particles are discretely attached on the surface of the electric insulating layer for the same reason as in the case of the sputtering method even if another physical method such as a vapor deposition method is used. It is possible to form different layers.

When forming the electroless plated conductor layer 21, which will be described later, the conductive particles discretely attached to the plating underlayer 12 play the same role as the nucleus in the sputtering method and the like. Growth progresses. Therefore, by combining the plating underlayer 12 and the electroless plating method, it is possible to maintain the surface of the electrically insulating layer in an electrically insulated state and locally form a conductive layer at a desired portion thereof. This is another feature regarding the formation of the coil conductor in the planar coil device according to the present invention.

On the lower electric insulation film 11 on which the plating underlayer 12 is formed, next, the side electric insulation layer 13 is formed by using an appropriate resin material. As the resin material, for example, a photosensitive synthetic resin material or a non-photosensitive synthetic resin material can be adopted. However, when the photosensitive synthetic resin material is adopted, it has a thick film and has the groove portion 13a. It is possible to form the side electrical insulation layer 13 for the coil conductor in a relatively small number of steps. When the coil conductor needs to have a large film thickness, the number of times the synthetic resin material is applied when the side electrical insulating layer 13 is formed using a photosensitive synthetic resin material can be an important factor. When forming a coating film using a photosensitive synthetic resin material using a spin coater, it is conceivable to adopt a method of reducing the rotation speed of the spin coater, as in the case of using other resin materials. However, in order to maintain the uniformity of the film thickness of the coating film, there is a restriction on the lower limit of the rotation speed of the spin coater. Therefore, in addition to reducing the rotation speed of the spin coater, use a photosensitive synthetic resin material with high viscosity. Method is taken.

However, if it is attempted to obtain a thick film thickness of more than about 30 [μm] by one-time coating, the light transmittance of the photosensitive synthetic resin material currently on the market decreases, Since it has a property that it is difficult to exhibit photosensitivity as a photosensitive synthetic resin material, it is difficult to adopt it. That is, when the number of times of application is plural, the advantages of the photosensitive synthetic resin material over the non-photosensitive synthetic resin material can be exhibited. FIG. 3 shows an example of experimental data obtained by the inventors regarding the film thickness of the electric insulating film obtained by applying the photosensitive polyimide twice. The experimental data shown in FIG. 3 shows that the viscosity at room temperature is about 4000 [mPa.
.S], which is obtained by performing a coating process including a coating process using a spin coater and a pre-baking process on the photosensitive polyimide having good translucency twice, and performing heating / baking processes after the coating process. .

In FIG. 3, the horizontal axis represents the spin coater rotation speed [rpm] value, and the vertical axis represents the film thickness [μm] of the obtained coating film.
The values are shown, and the graph in the figure shows the film thickness data before the baking treatment by the dotted line and the film thickness data after the baking treatment by the solid line. From the data shown in FIG. 3, it can be confirmed that a polyimide film having good photosensitivity and a film thickness of about 30 [μm] or more can be obtained by setting the number of coating times to two. Of course, when a thicker film is required, the number of times of application may be set to three or more. Also, from FIG. 3, it is known that the film thickness value is significantly reduced by performing the baking treatment, which shows that the photosensitive polyimide used in the experiment undergoes a large thermal contraction during the baking treatment. ing.

Thus, the well-known photolithography method is applied to the photosensitive synthetic resin material, or the coating film made of the non-photosensitive resin material is processed by the well-known photolithography method and the well-known etching method. As a result, the side electrical insulating layer 13 having the groove 13a is obtained [FIG. 2 (e)].
The groove portion 13 a is a pattern pattern of the coil conductor 2 described later and has a depth reaching the plating foundation layer 12. Further, when the side electrical insulating layer 13 is formed, the plating underlayer 12 is left as it is, and thus the plating underlayer 12 is exposed at the bottom of the groove 13a.
The electroless plated conductor layer 21 is formed on the exposed plating underlayer 12 by electroless plating in the same shape as the pattern of the groove 13a [FIG. 2 (f)].

When the electroless plated conductor layer 21 is to be formed into a thick film, the stress generated by the electroless plating may be undesirably excessive. Further, comparing the electroless plating method and the electrolytic plating method, the processing time required to obtain the same plating film thickness is longer in the electroless plating method. When it is necessary to suppress the stress and shorten the processing time, the film thickness of the electroless plated conductor layer 21 may be limited to the film thickness necessary for the conductive layer for the electrolytic plating method. Therefore, if necessary, the electroplating conductor layer 22 is formed by an electroplating method using the electroless plating conductor layer 21 as a conductive layer, and the electroless plating conductor layer 21 and the electroplating conductor layer 22 are used for the coil 2. Is formed. As a matter of course, the conductor for the coil 2 is formed in the same shape as the pattern of the groove 13a [FIG. 2 (g)]. In forming the coil 2 having this pattern, the etching process for the plating base layer 12, the electroless plating conductor layer 21 and the electrolytic plating conductor layer 22 is not necessary at all.
Is a feature of.

An upper electric insulating layer 14 is formed on the conductor for the coil 2 and on the side electric insulating layer 13 excluding the groove 13a by using an appropriate resin material.
Through holes 14a are formed in a portion of the coil 4 corresponding to the end of the coil 2 by an appropriate method [FIG. 2 (h)]. The resin material used for the upper electric insulating layer 14 and the processing method used for forming the through hole 14a are the same as those for the side electric insulating layer 13, and therefore the description thereof will be omitted to avoid duplication.

When the number of layers of the coil 2 included in the planar coil device 1 is plural, by repeating the above steps, 1
The coil 2 of the second and subsequent layers is formed on the coil 2 of the layer. An upper magnetic film 5 having a desired film thickness is formed on the upper electric insulating layer 14 of the uppermost coil 2 constituting the planar coil device 1 with a protective film such as a SiO ₂ film interposed therebetween. Then, a hole-shaped portion 5a is formed in a portion of the upper magnetic film 5 facing the through hole 14a. [FIG. 2 (i)]. The method of forming the upper magnetic film 5 and the hole-shaped portion 5a is the same as the method used for forming the lower magnetic film 4, and therefore the description thereof will be omitted to avoid duplication.

Finally, a protective film 51 having a through hole 51a at a portion opposed to the hole-shaped portion 5a and the through hole 14a is formed on the upper magnetic film 5 by an electrically insulating material. The coil 2 exposed from the shaped portion 5a and the through holes 14a and 51a is provided with a contact portion 7a and the like,
The planar coil device 1 is completed [FIG. 2 (j)]. 1 and 2, the number of turns of each coil 2 of the planar coil device 1 is drawn as 3 turns. As a matter of course, the number of turns of each coil 2 is not limited to 3 turns, it is possible to obtain an arbitrary number of turns, and the pattern shape of the coil 2 is also required depending on the design. It is possible to manufacture various kinds of things. It should be noted that there may be a planar coil device that does not require the lower magnetic film 4 and the upper magnetic film 5.

In the planar coil device 1 having the above-mentioned structure and using the above-described manufacturing method, the conductor for the coil 2 can be formed without using the sputtering method or the vacuum deposition method, so that the high Q value is obtained in the conventional example. In this case, the problems of stress and film formation time can be solved. In addition, the conductor for the coil 2 is formed after the groove portion 13a of the side electric insulation layer 13 is formed.
It is formed by a plating method. As a result, there is no process such as etching of the electrically insulating layer or the coil conductor during the process during the formation of the coil 2 conductor, and therefore a part of the coil conductor is lost during the etching process. The problem in the conventional example that the space factor of the conductor for use is lowered can be solved. Further, this makes it possible to reduce the number of steps required to form the coil conductor.

Forming the conductor for the coil 2 in the groove portion 13a of the side electric insulation layer 13 is not possible.
It means that the conductor for the coil 2 is formed after the resin material used for the heat shrinking. Therefore, even if the resin material used for the side electric insulation layer 13 is a resin material having a large heat shrinkability upon curing, such as a photosensitive synthetic resin material currently on the market, the heat of the resin material is The problem of shrinkage can be avoided. That is, in the planar coil device 1, even if a photosensitive synthetic resin material (see FIG. 3) is used for the side electrical insulation layer 13, its large heat shrinkability does not become a disadvantage, and the number of steps is reduced. Only the advantage of being able to be used can be utilized. Furthermore, the fact that the conductor for the coil 2 can be formed after the resin material used for the side electrical insulating layer 13 is thermally contracted means that the upper side of the conductor for the coil 2 is flat even if the conductor for the coil 2 is a thick film. Can be produced in. Therefore, it is possible to obtain an advantage that the flattening step required in the conventional example can be omitted or simplified.

[0036]

Embodiments of the present invention will be described in detail below with reference to the drawings. In the following description of this section, the planar coil device 1 according to the embodiment of the invention shown in FIGS. 1 and 2 and the conventional planar coil devices 9 and 9A shown in FIGS. The same reference numerals are given to the same portions as, and the description thereof will be omitted.

Embodiment 1; FIGS. 4A to 4J are sectional views schematically showing a manufacturing process of a planar coil device according to an embodiment of the present invention. 5 is a top view of the upper magnetic film shown in FIG. 4, and FIG. 6 is a top view of the coil shown in FIG. In addition, in each of FIGS. 4B to 4J, some of the reference numerals already described in the drawings relating to the previous steps are omitted. 4 to 6, 1A
Is a planar coil device mainly composed of a spiral coil 2A, a lower magnetic film 4A and an upper magnetic film 5A, and is formed on a flat substrate 8. First, FIG.
A manufacturing process of the planar coil device 1A will be described with reference to (a) to (j).

FIG. 4 (a): An electrical insulating film 41 having a thickness of 3 [μm] is formed by coating and baking polyimide on the silicon substrate 8.
Form A. FIG. 4B: Co, Hf, Ta is formed on the electric insulating film 41A.
A lower magnetic film 4A made of a soft magnetic material is formed by forming an amorphous film of a mixed substance of Pd and Pd to a thickness of 3 [μm] by a sputtering method and processing it by using a photolithography method and an etching method. .

FIG. 4C: Polyimide is applied and baked on the lower magnetic film 4A and the like to form the lower electric insulating film 11A. FIG. 4D: Plating base layer 1 on the lower electrical insulating film 11A
2A is formed. This plating base layer 12A is formed by P
It is performed by forming t to a very thin film thickness of about 4 [Å] by a sputtering method. The Pt sputtered film having this film thickness is a film in a state where the Pt crystal according to the embodiment of the invention described above exists in an island shape on the lower electrical insulating film 11A. When the surface electrical resistance of the lower electrical insulating film 11A on which the plating underlayer 12A was formed was measured in the prototype planar coil device 1A, it was 500.
A high value of [MΩ] or more was obtained. That is, even if the plating base layer 12A is present, the lower electrical insulating film 11
The leakage current flowing on the surface of A can be substantially ignored.

FIG. 4 (e): A side electrical insulation layer 13A having a thickness of 35 [μm] having a groove 13a is formed on the lower electrical insulation film 11A on which the plating underlayer 12A is formed.
In forming the side electrical insulating layer 13A, first, a photosensitive polyimide (manufactured by Asahi Kasei, product number G-7613N) was applied twice. In the first coating step, the photosensitive polyimide was coated using a spin coater rotating at 2300 [rpm], and was coated in a clean oven at 80
Prebaking was performed at [° C] and 30 [min]. In the second coating step, the photosensitive polyimide was coated under the same conditions as in the first coating, and a clean oven was used.
Prebaking was performed at [° C] and 40 [min]. Then, contact exposure and development were performed using a photomask, which is a well-known process of photolithography, and baking was performed at 350 [° C.] to obtain a side electrical insulating layer 13A having a groove 13a. The mutual interval width between the adjacent groove portions 13a is 10
[Μm].

FIG. 4 (f): The intermediate product obtained up to FIG. 4 (e) was immersed in an electroless plating solution (manufactured by Kojundo Chemical Co., Ltd., product number C-200LT) at 45 [° C.] for 2 [min. ] Immersion is performed to form the electroless plated conductor layer 21A on the plating base layer 12A exposed in the groove 13a. FIG. 4 (g): An electrolytic plating liquid (manufactured by Kojundo Chemical Co., Ltd., product number C-100EF) is used for the intermediate product obtained up to FIG.
With a current density of 5 [A / cm ² ] of 120 [mi
n] A plating process is performed to form an electroplating conductor layer 22A on the electroless plating conductor layer 21A. A combination of the electroless plated conductor layer 21A and the electrolytic plated conductor layer 22A is a conductor for the coil 2A of the planar coil device 1A.

FIG. 4 (h): A photosensitive polyimide is applied on the conductor for the coil 2A and on the side electric insulating layer 13A excluding the groove 13a, and a through hole is formed in a portion corresponding to the end of the coil 2A. 14a is processed by photolithography,
By firing, the upper electric insulation layer 14A is formed. FIG. 4 (i): a film thickness of 0.2 on the upper electrical insulation layer 14A.
The protective film of the SiO ₂ film of [μm] and the upper magnetic film 5A of the soft magnetic material film of 3 [μm] are formed and are unnecessary by processing using the photolithography method and the etching method. Parts are removed.

FIG. 4 (j): Finally, photosensitive polyimide is applied on the upper magnetic film 5 and the like, the through holes 51a are processed by the photolithography method, and firing is performed.
The protective film 51 is formed, and the contact portion 7a is formed at the end of the coil 2A. The coil 2A of the thus-obtained planar coil device 1A has the number of turns of 3 as shown in FIG.
It is formed as a spiral of turns. Also,
As shown in FIG. 5, the upper magnetic film 5A of the planar coil device 1A has hole-shaped portions 5a, 5a formed at respective portions facing both ends of the coil 2A.

Since the planar coil device 1A according to the first embodiment has the above-mentioned configuration, the planar coil devices 9 and 9A of the conventional example are described above in the description of the embodiment of the invention.
Compared with the above, the planar coil device can be obtained in a smaller number of steps, and the space factor of the coil 2A is improved, so that a high Q value can be obtained. Even if a photosensitive synthetic resin material (for example, see FIG. 3) having a large amount of heat shrinkage at the time of curing is used for the side electrical insulation layer 13A, the upper electrical conductivity can be obtained without performing any flattening process. There is also a great advantage that the upper surface of the insulating layer 14A can be manufactured in a flat state.

Embodiment 2; FIG. 7 is a diagram schematically showing a planar coil device according to another embodiment of the present invention, (a) is a sectional view, and (b) to (d) are FIG. FIG. 6 is a top view of each of three different examples of the upper magnetic film shown in (a). 7, the same parts as those of the planar coil device according to the embodiment of the present invention shown in FIGS. 4 to 6 are designated by the same reference numerals, and the description thereof will be omitted. Note that FIG.
Among the reference numerals given in FIG. 4, only representative reference numerals are shown.

In FIG. 7, reference numeral 1B denotes a lower magnetic film in place of the lower magnetic film 4A and the upper magnetic film 5A in the planar coil device 1A according to the present invention shown in FIGS. 4B and the upper magnetic film 5B are used. These magnetic films 4B and 5B are different from the magnetic films 4A and 5A of the planar coil device 1A in that
That is, the slit 6 is formed to reduce the eddy current loss value generated in the magnetic film under a changing magnetic field such as an alternating magnetic field. For an example of forming the slit 6, see the upper magnetic film 5
As represented by B, it is shown in FIGS. Of these, FIG. 7B shows four slits 6,
FIG. 7C is an example in which eight slits 6 are formed, and FIG. 7D is an example in which 16 slits 6 are formed. The magnetic film 4B,
5B, the action and effect of forming the slits 6 in the magnetic film are detailed in JP-A-6-77055 and the like, and thus the description thereof will be omitted to avoid duplication.

In the planar coil device according to the present invention such as the planar coil device 1B, the slit 6 is formed in the magnetic film (when the number of layers of the coil 2A is a single layer, only the upper magnetic film is targeted). The advantage of the formation is that, as described in the section of the first embodiment, the upper surface of the upper electrical insulating layer 14A can be manufactured in a flat state without any flattening treatment. It is due. In the case of the planar coil device of the conventional example, it is difficult to manufacture the upper surface of the upper electric insulating layer 14A in a flat state. Therefore, particularly when the slit 6 is formed in the upper magnetic film, the upper electric insulating layer 14A is formed. The flattening treatment of the upper surface of 14A was indispensable. Due to this, in the planar coil device of the conventional example, even when the formation of the slits 6 is preferable, the formation of the slits 6 is not performed, or the number of the slits 6 is set as small as possible. On the contrary,
In the planar coil device according to the present invention, even when the slit 6 is formed in the upper magnetic film, the upper electric insulating layer 14 is formed.
Since the flattening process of A is almost unnecessary, FIG.
As shown in (d) to (d), the number of slits 6 required for design can be appropriately selected and formed.

Embodiment 3; FIG. 8 is a diagram schematically showing a planar coil device according to still another embodiment of the present invention.
8A is a sectional view, and FIG. 8B is a top view of the coil shown in FIG. 8A. 8, the same parts as those of the planar coil device according to the embodiment of the present invention shown in FIGS. 4 to 6 are designated by the same reference numerals, and the description thereof will be omitted. In addition,
In FIG. 8, as for the reference numerals given in FIG. 4, only representative reference numerals are shown.

In FIG. 8, reference numeral 1C is a side electrical insulation layer in place of the side electrical insulation layer 13A and coil 2A of the planar coil device 1A according to the present invention shown in FIGS. 13B, a planar coil device using the coil 2B. The coil 2B is a planar coil device 1A.
The coil 2A is different from the coil 2A in that the coil turn is divided into two in order to suppress the increase in the value of the electric resistance R of the coil during the AC operation. The shape of this two-divided coil 2B is shown in FIG. 8 (b) with respect to the shape as viewed from above. The operation and effect of forming the coil by dividing it into a plurality of turns are detailed in Japanese Laid-Open Patent Publication No. 5-41320, and therefore the description thereof will be omitted to avoid duplication. The reason why the side electric insulation layer 13B is different from the side electric insulation layer 13A is that the coil 2B divided into two parts can be obtained.

The coil 2 and the like can be divided by etching the pattern shape such as the groove 13a of the side electric insulating layer 13A in advance according to the number of divisions of the coil. The advantage of the planar coil device according to the present invention such as the planar coil device 1C in the case of dividing the coil is that, as described in the section of the first embodiment, the flattening process is performed without any flattening process. This is due to the fact that the upper surface of the electrical insulating layer 14A can be manufactured in a flat state. That is, in the case of the planar coil device according to the present invention, it is possible to easily divide the coil even in the case of the second and subsequent layers of coils.

[0051]

According to the present invention, the following effects can be obtained by using the structure and the manufacturing method described in the section for solving the above problems. By adopting the structure according to the item (1) and / or the manufacturing method according to the item (3) of the means for solving the above problems, a planar coil device having a high Q value can be obtained by the conventional technique. It is possible to obtain the number of steps in comparison. Further, since the space factor of the coil is improved, the planar coil device having a high Q value can be manufactured in a small size. Further, even if a resin material having a large shrinkage amount upon curing is used for the side electrical insulation layer, it is possible to fabricate the upper surface of the upper electrical insulation layer in a flat state without performing any flattening treatment. There is also an advantage that it can be done. Moreover, the side electrical insulating layer, which is a main part of the planar coil device, is provided by the configuration according to item (2) and / or the manufacturing method according to item (4) of the means for solving the above problems. By omitting the etching step, it is possible to provide a planar coil device with low manufacturing cost while obtaining the effect of the above item. Furthermore, by adopting the manufacturing method according to the item (5) of the means for solving the above problems, it is possible to employ a photosensitive synthetic resin material even for a thick film planar coil device. So
Also in the case of a thick film planar coil device, the effect of the above item can be obtained.

[Brief description of drawings]

1A and 1B are views showing an embodiment of a planar coil device according to the present invention, wherein FIG. 1A is a schematic sectional view and FIG.
Top view of the main part of (a)

2A to 2J are cross-sectional views schematically showing a manufacturing process of the planar coil device shown in FIG.

FIG. 3 is an example of experimental data on the thickness of an electric insulating film obtained by applying photosensitive polyimide twice.

4 (a) to (j) are cross-sectional views schematically showing a manufacturing process of a planar coil device according to an embodiment of the present invention.

5 is a top view of the upper magnetic film shown in FIG.

6 is a top view of the coil shown in FIG.

FIG. 7 is a diagram schematically showing a planar coil device according to another embodiment of the present invention, in which (a) is a cross-sectional view and (b) to (d) are upper magnetic layers shown in FIG. 7 (a). Top view of each of the three different embodiments of the membrane

FIG. 8 is a diagram schematically showing a planar coil device according to still another embodiment of the present invention, in which (a) is a sectional view and (b) is a sectional view.
Is a top view of the coil shown in FIG.

9A to 9G are sectional views schematically showing a manufacturing process of a conventional planar coil device using a plating method.

10A to 10G are cross-sectional views schematically showing a manufacturing process of a conventional planar coil device using a thin film technique and a selective plating method.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Planar coil device 11 Lower electric insulation film 12 Plating base layer 13 Side electric insulation layer 13a Groove 2 Coil 21 Electroless plating conductor layer 22 Electroplating conductor layer

Claims (5)

[Claims] 1. A planar lower electrical insulating layer, a plating underlayer formed by discretely adhering conductive particles on the surface of the lower electrical insulating layer, and a plating underlayer. On the side electrical insulating layer formed by using a resin material with a groove portion for the coil conductor and on the portion where the groove portion is formed on the plating underlayer, at least for the plating underlayer side. A coil conductor formed by an electroless plating method; and an upper electric insulation layer formed of a resin material covering the upper surface of the side electric insulation layer excluding the groove and the upper surface of the coil conductor. A planar coil device characterized by the above. 2. The planar coil device according to claim 1, wherein the resin material used for the side electrical insulating layer is a photosensitive synthetic resin material. 3. A step of planarly forming a lower electrical insulating layer using an electrical insulating material, and a step of discretely depositing conductive particles on the surface of the lower electrical insulating layer by a physical method. A step of forming a plating underlayer on the plating underlayer, a step of applying a resin material on the plating underlayer and forming a side electric insulating layer so as to have a groove for a coil conductor, Forming a coil conductor by electroless plating on at least the plating underlayer side in the region where the groove is formed, and the upper surface of the side electric insulation layer excluding the groove and the upper surface of the coil conductor. And a step of coating a resin material to form an upper electric insulating layer, the method for manufacturing a planar coil device. 4. The method of manufacturing a planar coil device according to claim 3, wherein the resin material used in the step of forming the side electrical insulating layer is a photosensitive synthetic resin material. A method for manufacturing a planar coil device, comprising: performing a step of forming a coil conductor after a firing step performed by heating a material. 5. The method for manufacturing a planar coil device according to claim 4, wherein the step of forming the side electrical insulating layer is performed after a plurality of times of application using a photosensitive synthetic resin material. A method for manufacturing a planar coil device having a feature.