JPH09326534A - Iii-group nitride semiconductor device - Google Patents

Iii-group nitride semiconductor device

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Publication number
JPH09326534A
JPH09326534A JP16387296A JP16387296A JPH09326534A JP H09326534 A JPH09326534 A JP H09326534A JP 16387296 A JP16387296 A JP 16387296A JP 16387296 A JP16387296 A JP 16387296A JP H09326534 A JPH09326534 A JP H09326534A
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JP
Japan
Prior art keywords
layer
substrate
crystal
nitride semiconductor
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16387296A
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Japanese (ja)
Other versions
JP3756575B2 (en
Inventor
Toshiyuki Matsui
俊之 松井
Hideaki Matsuyama
秀昭 松山
Takeshi Suzuki
健 鈴木
Hiroshi Kamijo
洋 上條
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Fuji Electric Co Ltd
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Fuji Electric Co Ltd
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Application granted granted Critical
Publication of JP3756575B2 publication Critical patent/JP3756575B2/en
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Abstract

PROBLEM TO BE SOLVED: To provide a III-group nitride semiconductor device, consisting of Alx Gay In1-x-y N crystal, generating no cracks on an Si or 6H-SiC crystal substrate. SOLUTION: In the Alx Gay In1-x-y N layer Nt containing III-group nitride semiconductor device formed on a substrate 1 consisting of the crystal having a thermal expansion coefficient smaller than the thermal expansion coefficient of crystal of Alx Gay In1-x-y N (0<=x, y and 0<=x+y<=1), substrate material and a stress alleviation layer S, consisting of the material having the thermal expansion coefficient larger than the ALGay In1-x-y N crystal, are interposed between the substrate 1 and the above-mentioned Alx Gay In1-x-y N layer. Besides, it is desirable that an oxidation preventing layer T, consisting of Al, Ga, In1-x-y N, is interposed between the stress alleviation layer S and the substrate 1. Silicon crystal or carbonated silicon crystal may be used for the substrate material.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】III 族窒化物半導体(Al x Ga
y In1-x-y N (0 ≦x 、y かつは0 ≦x+y ≦1)を用いた
レーザダイオードまたは発光ダイオードなどのIII 族窒
化物半導体装置に関する。
TECHNICAL FIELD The present invention relates to group III nitride semiconductors (Al x Ga
The present invention relates to a group III nitride semiconductor device such as a laser diode or a light emitting diode using y In 1-xy N (0 ≤x, y and 0 ≤x + y ≤1).

【0002】[0002]

【従来の技術】直接遷移で、しかも、光学ギャップが1.
9 〜6.2 eVの範囲で制御可能なIII 族窒化物 (Alx Gay
In1-x-y N (0≦x 、y かつは0 ≦x+y ≦1)) を用いたレ
ーザダイオードや発光ダイオードなどのIII 族窒化物半
導体装置が試作されている。以下、III 族窒化物をAlx
Gay In1-x-y N またはAlGaInN と略記する。III 族窒化
物半導体装置は、結晶格子や熱膨張係数の整合性の良さ
から、主として、サファイア基板上に形成されてきた。
そして、Alx Gay In1-x-y N の組成( x 、y ) を変える
ことによる光学ギャップの制御、Siやマグネシウム (M
g) を添加することによるn型やp型への価電子制御に
より、ダブルヘテロ構造 (M.C.Yoo,K.H.Shim,et al.: P
roceedings of International Symposium on Blue Lase
r and LightEmitting Diodes, Chiba Univ.,Japan,Marc
h 5-7, 1996,p554-557 ) あるいは量子井戸構造 (S.Nak
amura,et al,J.Japanese Journal of Applied Physics,
vol35,part2,No 2B(1996),L217 〜L220) などのIII 族
窒化物半導体装置が報告されている。
2. Description of the Related Art Direct transition and an optical gap of 1.
Group III nitrides (Al x Ga y ) controllable in the range of 9 to 6.2 eV
III-nitride semiconductor devices such as laser diodes and light emitting diodes using In 1-xy N (0 ≦ x, y and 0 ≦ x + y ≦ 1)) have been prototyped. Below, the group III nitride is replaced with Al x
Abbreviated as Ga y In 1-xy N or AlGaInN. Group III nitride semiconductor devices have been mainly formed on sapphire substrates due to their good matching of crystal lattice and thermal expansion coefficient.
Then, Al x Ga y In 1- xy composition N (x, y) controlling the optical gap by varying the, Si and magnesium (M
Double heterostructure (MCYoo, KHShim, et al .: P by controlling valence electrons to n-type and p-type by adding g)
roceedings of International Symposium on Blue Lase
r and LightEmitting Diodes, Chiba Univ., Japan, Marc
h 5-7, 1996, p554-557) or quantum well structure (S.Nak
amura, et al, J. Japanese Journal of Applied Physics,
Group III nitride semiconductor devices such as vol35, part2, No 2B (1996), L217 to L220) have been reported.

【0003】図8は従来のIII 族窒化物半導体装置の1
例であるレーザダイオードの断面図である。サファイア
(c面) からなる基板1 上に、AlN のバッファ層2 、GaN
のコンタクト層3 が成膜されている。さらにn 型AlGaN
のクラッド層4 、GaN の活性層5 およびp 型のAlGaN の
クラッド層6 からなるダブルヘテロ構造が形成されてい
る。その上にはp 型のGaN のキャップ層7 が形成されて
おり、ダブルヘテロ構造とキャップ層7 は一括してフォ
トエッチされ側面は基板面に垂直にされている。サファ
イアの導電性が低いために、コンタクト層3 が基板側の
電気リードのためにダブルヘテロ構造の外側に延びてお
り、その表面にはAu/Cr からなる第1の電極層8 が形成
されている。キャップ層7 の上にはAl/Tiからなる第2
の電極層9 が形成されている。
FIG. 8 shows a conventional group III nitride semiconductor device 1
It is sectional drawing of an example laser diode. sapphire
On the substrate 1 consisting of (c-plane), AlN buffer layer 2, GaN
The contact layer 3 is deposited. Furthermore, n-type AlGaN
The double heterostructure is formed by the clad layer 4, the GaN active layer 5, and the p-type AlGaN clad layer 6. A p-type GaN cap layer 7 is formed thereon, and the double hetero structure and the cap layer 7 are collectively photoetched so that the side surfaces are perpendicular to the substrate surface. Due to the low conductivity of sapphire, the contact layer 3 extends to the outside of the double heterostructure for the electrical leads on the substrate side, on which the first electrode layer 8 of Au / Cr is formed. There is. A second layer of Al / Ti is formed on the cap layer 7.
The electrode layer 9 is formed.

【0004】Alx Gay In1-x-y N 膜の有機金属気相成長
(以下MOCVD と記す) においては、基板の温度を1000℃
程度まで上昇させるため、基板の選択には格子定数の整
合性の他に熱膨張係数の整合性も考慮する必要がある。
格子定数の整合が良い基板であっても、熱膨張係数がAl
x Gay In1-x-y N よりも小さな基板材料を用いると、成
膜後の冷却中に Al x Gay In1-x-y N 膜に引っ張り応力
が生じ、状況によっては膜に亀裂が入ることが知られて
いる (A. Kuramata,K.Horino,et al.; Proceedings of
International Symposium on Blue Laser and Light Em
itting Diodes,Chiba Univ., Japan,March 5-7, 1996,
p80-85)。
[0004] The organic metal vapor phase growth of Al x Ga y In 1-xy N film
(Hereinafter referred to as MOCVD), the substrate temperature is 1000 ℃
In order to raise the temperature to a certain degree, it is necessary to consider the matching of the thermal expansion coefficient in addition to the matching of the lattice constants when selecting the substrate.
Even if the substrate has a good lattice constant match, the coefficient of thermal expansion is Al
If a substrate material smaller than x Ga y In 1-xy N is used, tensile stress may occur in the Al x Gay y 1-xy N film during cooling after film formation, and the film may crack under some circumstances. Known (A. Kuramata, K. Horino, et al .; Proceedings of
International Symposium on Blue Laser and Light Em
itting Diodes, Chiba Univ., Japan, March 5-7, 1996,
p80-85).

【0005】Alx Gay In1-x-y N の成膜用基板材料とし
てはサファイアが用いられてきた。サファイア基板はAl
x Gay In1-x-y N 結晶と格子整合性も良く、しかも、サ
ファイアの熱膨張係数、α(サファイア)は7.5 ×10-6
/Kであり(以下、α( 物質名)はその物質の熱膨張係数
を表す)、Alx Gay In1-x-y N のα(Al x Gay In1-x-y
N)=5.6 ×10-6/Kよりも大きいため、亀裂は発生しな
い。
Sapphire has been used as a substrate material for depositing Al x Ga y In 1-xy N. Sapphire substrate is Al
Lattice matching with x Ga y In 1-xy N crystal is good, and the coefficient of thermal expansion of sapphire, α (sapphire) is 7.5 × 10 -6
A / K (hereinafter, alpha (substance name) represents a thermal expansion coefficient of the material), the Al x Ga y In 1-xy N α (Al x Ga y In 1-xy
N) = 5.6 × 10 −6 / K, so cracks do not occur.

【0006】しかし、サファイア基板には下に挙げる欠
点がある。1.へき開性がないため、レーザーダイオード
における光共振器を簡便な劈開により形成できない。2.
導電性が小さく、基板面から電極を取ることができな
い。
However, the sapphire substrate has the following drawbacks. 1. Since there is no cleavage, an optical resonator in a laser diode cannot be formed by simple cleavage. 2.
The conductivity is low and the electrode cannot be taken from the substrate surface.

【0007】[0007]

【発明が解決しようとする課題】一方、Si結晶または6H
-SiC結晶の基板を用いれば、上に挙げた2つの欠点は解
決されるが、熱膨張係数がα(Si)=3.59×10-6/K、α(6
H-SiC)=4.2 ×10-6/KとAlx Gay In1-x-y N 系の熱膨張
係数( 例えばα(GaN)=5.6 ×10-6/K) より小さいため、
成膜後の成膜温度 (約1000℃) から室温までの冷却時
に、基板より膜の方が多く収縮することになるが、基板
の方が膜より厚いため、膜側には引っ張り応力が生じ
る。その結果、膜に亀裂が生じることがある。そのた
め、半導体装置が製造できない。図9はSi結晶基板に直
接形成されたAlx Gay In1-x-y N 膜の表面の走査型電子
顕微鏡観察による結晶の状態を示す図である。亀裂が生
じていることが判る。
On the other hand, Si crystal or 6H
-Using a SiC crystal substrate solves the above two drawbacks, but the coefficient of thermal expansion is α (Si) = 3.59 × 10 -6 / K, α (6
Since H-SiC) = less than 4.2 × 10 -6 / K and Al x Ga y In 1-xy N -based coefficient of thermal expansion (e.g., α (GaN) = 5.6 × 10 -6 / K),
The film shrinks more than the substrate when it is cooled from the deposition temperature (about 1000 ° C) to room temperature after deposition, but since the substrate is thicker than the film, tensile stress occurs on the film side. . As a result, the film may crack. Therefore, a semiconductor device cannot be manufactured. FIG. 9 is a diagram showing a crystal state of a surface of an Al x Ga y In 1-xy N film formed directly on a Si crystal substrate, which is observed by a scanning electron microscope. It can be seen that there are cracks.

【0008】上記の問題点に鑑み、本発明の目的は、Si
結晶または6H-SiC結晶の基板上に亀裂の生じないAlx Ga
y In1-x-y N 結晶からなるIII 族窒化物半導体装置を提
供することにある。
In view of the above problems, the object of the present invention is to provide Si
Al x Ga without cracks on crystalline or 6H-SiC crystalline substrate
An object is to provide a group III nitride semiconductor device made of y In 1-xy N crystal.

【0009】[0009]

【課題を解決するための手段】上記の目的を達成するた
めに、Alx Gay In1-x-y N(0 ≦x 、y かつ 0≦x+y ≦1)
結晶の熱膨張係数より小さな熱膨張係数を持つ結晶から
なる基板上に形成されたAlx Gay In1-x-y N 層を含むII
I 族窒化物半導体装置において、前記基板と前記Alx Ga
y In1-x-y N 層との間に基板材料およびAlx Gay In
1-x-y N 結晶の熱膨張係数より大きな熱膨張係数を持つ
材料からなる応力緩和層を介在させて、AlxGay In
1-x-y N に生ずる応力を緩和することとする。
In order to achieve the above object, Al x Ga y In 1-xy N (0 ≤ x, y and 0 ≤ x + y ≤ 1)
Including an Al x Ga y In 1-xy N layer formed on a substrate consisting of a crystal with a thermal expansion coefficient smaller than that of the crystal II
In the group I nitride semiconductor device, the substrate and the Al x Ga
Substrate material and Al x Ga y In between y In 1-xy N layer
A stress relaxation layer made of a material having a coefficient of thermal expansion larger than that of the 1-xy N crystal is interposed, and Al x Ga y In
The stress generated in 1-xy N will be relaxed.

【0010】前記基板材料はシリコン (Si) 結晶または
炭素化シリコン (SiC)結晶であると良い。前記応力緩和
層は酸化亜鉛 (ZnO)、酸化マグネシウム (MgO)、サファ
イア (α−Al2O3)、スピネル (MgAl2O4)またはネオジウ
ムガレイト (NdGaO3) の内の少なくとも1 種類からなる
と良い。
The substrate material is preferably silicon (Si) crystal or carbonized silicon (SiC) crystal. The stress relaxation layer is made of at least one of zinc oxide (ZnO), magnesium oxide (MgO), sapphire (α-Al 2 O 3 ), spinel (MgAl 2 O 4 ), or neodymium gallate (NdGaO 3 ). good.

【0011】前記応力緩和層と基板との間に、Alx Gay
In1-x-y N (0≦x 、y かつ 0≦x+y≦1)からなる酸化防
止層を介在させ、応力緩和層およびその上に形成される
AlxGay In1-x-y N 膜の結晶性の悪化を防止すると良
い。前記III 族窒化物半導体装置は発光ダイオードまた
はレーザダイオードであると良い。
Al x Ga y is formed between the stress relaxation layer and the substrate.
In 1-xy N (0 ≤ x, y and 0 ≤ x + y ≤ 1) intervening the anti-oxidation layer and formed on the stress relaxation layer and on it
It is preferable to prevent deterioration of the crystallinity of the Al x Ga y In 1-xy N film. The group III nitride semiconductor device is preferably a light emitting diode or a laser diode.

【0012】[0012]

【発明の実施の形態】図1は本発明に係るIII 族窒化物
半導体装置の層構成の断面図である。基板 1上に酸化防
止層T 、応力緩和層S 、次いでAlx Gay In1-x-y N 層Nt
が積層されている。基板 1の表面はSi結晶の(1,1,1) 面
またはSiC 結晶の(0,0,0,1) 面である。Alx Gay In
1-x-y N 層Ntは組成(x、y)やドーピングの異なる複数の
層からなっている。例えばダブルヘテロ構造のダイオー
ドの場合は図 8のバッファ層2 〜キャップ層7 と同じで
ある。用途に応じて他の半導体層または電極層がさらに
積層される。
1 is a cross-sectional view of the layer structure of a group III nitride semiconductor device according to the present invention. Antioxidation layer T, stress relaxation layer S, and then Al x Ga y In 1-xy N layer Nt on substrate 1.
Are laminated. The surface of the substrate 1 is the (1,1,1) plane of Si crystal or the (0,0,0,1) plane of SiC crystal. Al x Ga y In
The 1-xy N layer Nt consists of multiple layers with different compositions (x, y) and doping. For example, in the case of a diode having a double hetero structure, it is the same as buffer layer 2 to cap layer 7 in FIG. Other semiconductor layers or electrode layers are further laminated depending on the application.

【0013】応力緩和層S について以下に説明する。基
板材料の熱膨張係数はAlGaInN 結晶の熱膨張係数よりも
小さいので、AlGaInN の成膜後の成膜温度 (約1000℃)
から室温までの冷却時に、基板よりAlGaInN膜の方が多
く収縮することになるが、基板の方がAlGaInN 膜より厚
いため、AlGaInN 膜側には引っ張り応力が生じる。その
結果、AlGaInN 膜に亀裂が生じることがある。しかし、
基板とAlGaInN 膜との間に、これら2種の材料の熱膨張
係数より大きな熱膨張係数を持つ材料の層を挿入した場
合、この挿入層は基板をより収縮させようとする、即ち
基板のみかけ上の熱膨張係数を大きくしAlGaInN 膜のそ
れに近づけるので、AlGaInN 膜に対する引っ張り力は緩
和され、AlGaInN 膜に亀裂が入ることが防止される。従
って、この挿入層を応力緩和層と呼称する。
The stress relaxation layer S will be described below. Since the thermal expansion coefficient of the substrate material is smaller than that of the AlGaInN crystal, the deposition temperature (approximately 1000 ° C) after the deposition of AlGaInN
When cooled from room temperature to room temperature, the AlGaInN film shrinks more than the substrate, but since the substrate is thicker than the AlGaInN film, tensile stress occurs on the AlGaInN film side. As a result, cracks may occur in the AlGaInN film. But,
If a layer of material with a coefficient of thermal expansion greater than those of these two materials is inserted between the substrate and the AlGaInN film, this insertion layer will try to shrink the substrate more, ie Since the coefficient of thermal expansion is increased to approach that of the AlGaInN film, the tensile force on the AlGaInN film is relaxed and cracks are prevented in the AlGaInN film. Therefore, this insertion layer is called a stress relaxation layer.

【0014】応力緩和層に適した材料には格子不整合率
の小さいことも必要である。表1 にこのような材料を挙
げる。表1 に応力緩和層に適した材料のの熱膨張係数と
GaN結晶に対する格子不整合率を示す。
A material suitable for the stress relaxation layer is also required to have a small lattice mismatch rate. Table 1 lists such materials. Table 1 shows the thermal expansion coefficient of materials suitable for the stress relaxation layer.
The lattice mismatch rate with respect to a GaN crystal is shown.

【0015】[0015]

【表1 】 しかし、これらの応力緩和層材料は全て酸化物であるた
め、成膜時におけるSiやSiC 表面の酸化が懸念される。
仮に、基板表面が酸化したときには、多くの場合、基板
と酸化物材料との界面に非晶質層が形成され、その上に
形成された膜の結晶性が悪化する。このため、基板上に
酸化抑制のための酸化防止層T として、Alx Gay In
1-x-y N を極薄く(10nm 程度) 形成し、その上に応力緩
和層S を形成する。そして最後に、Alx Gay In1-x-y N
からなるダブルヘテロ構造や量子井戸構造など、目的の
半導体装置用の多層AlGaInN 層Ntを形成する。成膜方法
として分子線エピタキシャル(MBE)または有機金属気相
成長法などが適用できる。 実施例1 先ず、Si単結晶の (1,1,1)面の基板上に直接、厚さ100n
m のZnO 層を形成した。スパッタ条件としては、基板温
度を250 ℃とし、スパッタガスはArとしその圧力を1Pa
とした。ターゲットにはAlを2wt%添加したZnO 焼結体を
用いた。Alの添加は応力緩和層に導電性を持たせるため
である。
【table 1 】 However, since all of these stress relaxation layer materials are oxides, there is concern about oxidation of the Si or SiC surface during film formation.
If the surface of the substrate is oxidized, an amorphous layer is often formed at the interface between the substrate and the oxide material, and the crystallinity of the film formed thereon deteriorates. Therefore, as an anti-oxidation layer T for suppressing oxidation on the substrate, Al x Ga y In
1-xy N is formed extremely thin (about 10 nm), and the stress relaxation layer S is formed on it. Finally, Al x Ga y In 1- xy N
A multilayer AlGaInN layer Nt for a target semiconductor device such as a double hetero structure or a quantum well structure is formed. Molecular beam epitaxy (MBE) or metalorganic vapor phase epitaxy can be applied as a film forming method. Example 1 First, a thickness of 100 n was directly formed on a (1,1,1) plane substrate of a Si single crystal.
A ZnO layer of m 2 was formed. As the sputtering conditions, the substrate temperature was 250 ° C., the sputtering gas was Ar, and the pressure was 1 Pa.
And A ZnO sintered body containing 2 wt% Al was used as the target. The addition of Al is to make the stress relaxation layer conductive.

【0016】得られたZnO 膜は、X線回折パターンから
c軸配向していることが確認できた。図2はSi基板上に
直接形成されたZnO 膜の反射高速電子線回折(RHEED) 像
を示し、(a)は電子線入射が (1,-1,1) 方向の場合の
パターンの図、(b)は電子線入射が(1,0,0) 方向の場
合であり(a)に対してc面内で30°回転させた場合の
パターンの図である。図2から、単結晶のパターン
((b)における高輝度(大きい白点)のみ) と低輝度
(淡い白点)のみのパターン)がずれて重なっているこ
とから、ZnO 膜のc面内でa軸の向きが回転した多結晶
膜であることが判った。
From the X-ray diffraction pattern, it was confirmed that the obtained ZnO film was c-axis oriented. Figure 2 shows a reflection high-energy electron diffraction (RHEED) image of a ZnO film directly formed on a Si substrate. (A) is a pattern diagram when the electron beam is incident in the (1, -1,1) direction, (B) is a diagram of a case in which the electron beam is incident in the (1,0,0) direction and is rotated by 30 ° in the c-plane with respect to (a). From Fig. 2, it can be seen that the single crystal pattern (only high brightness (large white spots) in (b)) and low brightness (light white spots) in the c-plane of the ZnO film are misaligned. It was found to be a polycrystalline film whose a-axis was rotated.

【0017】図3はSi基板上に直接形成されたZnO 膜の
オージェ電子分光による深さ方向の元素分析の結果を示
す図である。Si基板の領域にも大量の酸素が検出され、
Si基板表面が酸化されていることが判る。このため、Zn
O の多結晶化は、ZnO を形成するときにSi表面が酸化さ
れたことに起因していることが想定できる。このZnO 膜
上に、多層のAl x Ga y In1-x-y N 膜を窒素ラジカルを
使った分子線エピタキシャル(MBE)により形成した。層
構成はAlN の第 1のバッファ層、その上にGaN の第 2の
バッファ層、n 型AlGaN のクラッド層、GaN の活性層、
p 型AlGaN のクラッド層からなるダブルヘテロ構造とし
たが、亀裂は観測されず、ZnO の応力緩和層の効果が確
認できた。
FIG. 3 is a diagram showing the result of elemental analysis in the depth direction by Auger electron spectroscopy of a ZnO film directly formed on a Si substrate. A large amount of oxygen was detected in the Si substrate area,
It can be seen that the surface of the Si substrate is oxidized. Therefore, Zn
It can be assumed that the polycrystallization of O 2 is caused by the oxidation of the Si surface when forming ZnO. On this ZnO film, a multilayer Al x Ga y In 1-xy N film was formed by molecular beam epitaxy (MBE) using nitrogen radicals. The layer structure is the first buffer layer of AlN, the second buffer layer of GaN on it, the cladding layer of n-type AlGaN, the active layer of GaN,
A double heterostructure consisting of a p-type AlGaN cladding layer was used, but no cracks were observed and the effect of the ZnO stress relaxation layer was confirmed.

【0018】Si基板表面の酸化を抑制するため、酸化防
止層としてSi基板上にn 型GaN 膜を10nm形成した。その
上にZnO 応力緩和層を100nm 形成した。図4はSi基板に
GaN膜を形成されたZnO 膜のオージェ電子分光による深
さ方向の元素分析の結果を示す図である。図3と比較し
て、図4からGaN 膜がSiの酸化を防止していることが確
認できる。
In order to suppress the oxidation of the surface of the Si substrate, an n-type GaN film having a thickness of 10 nm was formed on the Si substrate as an antioxidant layer. A ZnO stress relaxation layer was formed on it to a thickness of 100 nm. Figure 4 shows the Si substrate
FIG. 6 is a diagram showing the results of elemental analysis in the depth direction by Auger electron spectroscopy of a ZnO 2 film on which a GaN film is formed. As compared with FIG. 3, it can be confirmed from FIG. 4 that the GaN film prevents the oxidation of Si.

【0019】図5はSi基板上のGaN 膜上に形成されたZn
O 膜のRHEED 像を示し、(a)は電子線入射が (1,-1,
1) 方向の場合のパターンの図、(b)は電子線入射が
(1,0,0) 方向の((a)に対してc面内で30°回転させ
た)場合のパターンの図である。酸化防止層の形成され
ない場合(図2)と異なり、パターンは二重構造になっ
ていず、ZnO のc面内のa軸の回転は観測されない。こ
のことから、酸化抑制のための GaN層を導入することに
より、Si基板の酸化が抑制され、ZnO はエピタキシャル
成長(単結晶成長)することが判った。
FIG. 5 shows Zn formed on the GaN film on the Si substrate.
The RHEED image of the O 2 film is shown, (a) shows (1, -1, -1,
1) Pattern diagram in the case of direction, (b) shows electron beam incidence
It is a figure of a pattern in the case of (1,0,0) direction (it rotated by 30 degrees in c surface with respect to (a)). Unlike the case where no antioxidant layer is formed (Fig. 2), the pattern does not have a double structure, and rotation of the a-axis in the c-plane of ZnO is not observed. From this, it was found that by introducing the GaN layer for suppressing the oxidation, the oxidation of the Si substrate was suppressed, and ZnO was epitaxially grown (single crystal growth).

【0020】このZnO 膜上に、上記と同じ層構成の多層
のAl x Ga y In1-x-y N のダブルヘテロ構造を形成し、
さらにキャップ層を形成した。図6はSi基板上のGaN
膜、ZnO 膜の二重層上の Al x Gay In1-x-y N 膜の電子
顕微鏡観察による結晶の状態を示す図である。図から、
その表面は平滑であり、亀裂は生じていないことが判
る。この状態の AlGaInN膜を用いて、特に精細な構造を
必要としないフォトダイオード等のIII 族窒化物半導体
装置は成立する。
On this ZnO film, a multi-layer Al x Ga y In 1-xy N double heterostructure having the same layer structure as described above is formed,
Further, a cap layer was formed. Figure 6 shows GaN on Si substrate
FIG. 3 is a diagram showing a crystal state of an Al x Ga y In 1-xy N film on a double layer of a film and a ZnO 2 film, observed by an electron microscope. From the figure,
It can be seen that the surface is smooth and no cracks are formed. By using the AlGaInN film in this state, a group III nitride semiconductor device such as a photodiode that does not require a particularly fine structure is established.

【0021】上記のダブルヘテロ構造を含む層構成のII
I 族窒化物半導体装置の1例としてレーザダイオードを
作製した。図7は本発明に係るレーザダイオードのへき
開面に垂直な面での断面図である。基板1 は(1,1,1) 面
Siであり、酸化防止層11、応力緩和層12が順次積層され
ている。厚さ50nmのAlN の第1 のバッファ層2を形成
し、その上に厚さ0.5 μm のGaN の第2のバッファ層、
厚さ150nm のn 型AlGaNのクラッド層4、厚さ50nmのGaN
の活性層5、厚さ150nm のp 型AlGaN のクラッド層6
からなるダブルヘテロ構造を形成し、さらに厚さ100nm
p 型GaN キャップ層7を形成してある。基板1 の電極8a
はAl、キャップ層7 の電極9 はAu/Cr である。
II of a layer structure including the above-mentioned double hetero structure
A laser diode was manufactured as an example of a group I nitride semiconductor device. FIG. 7 is a sectional view of a laser diode according to the present invention, taken along a plane perpendicular to the cleavage plane. Substrate 1 is the (1,1,1) plane
It is made of Si, and the antioxidant layer 11 and the stress relaxation layer 12 are sequentially laminated. A first buffer layer 2 of AlN having a thickness of 50 nm is formed, and a second buffer layer of GaN having a thickness of 0.5 μm is formed on the first buffer layer 2.
150 nm thick n-type AlGaN cladding layer 4, 50 nm thick GaN
Active layer 5 and p-type AlGaN cladding layer 6 with a thickness of 150 nm
A double heterostructure consisting of 100 nm thick
A p-type GaN cap layer 7 is formed. Substrate 1 electrode 8a
Is Al and the electrode 9 of the cap layer 7 is Au / Cr.

【0022】Si基板1 をへき開することによりIII 族窒
化物半導体層は(1,-1,0,0) 面がへき開面となり、光共
振器が形成できる。このレーザダイオードにパルス電流
を流し、電流密度約10kA/cm2以上でレーザ発振させるこ
とができた。また、酸化防止層として、Ga1-x Alx N
(0 <x ≦1)も実施したが、同様に酸化防止の効果があ
り、応力緩和層は単結晶であり、III 族窒化物半導体層
は良好に成膜できた。 実施例2 基板としてSi単結晶の (1,1,1)面を用い、応力緩和層に
マグネトロンスパッタにより形成したサファイア (α−
Al2O3)を用いた。なお、基板温度は500℃、ターゲッ
トにはAl2O3 の焼結体を用い、スパッタガスにはArを使
い、圧力は1Pa、膜厚は120nm とした。
By cleaving the Si substrate 1, the (1, -1,0,0) plane of the group III nitride semiconductor layer becomes a cleavage plane, and an optical resonator can be formed. A pulse current was passed through this laser diode, and laser oscillation was possible at a current density of about 10 kA / cm 2 or more. In addition, as an antioxidant layer, Ga 1-x Al x N
(0 <x ≤ 1) was also carried out, but similarly, there was an effect of preventing oxidation, the stress relaxation layer was a single crystal, and the Group III nitride semiconductor layer could be formed well. Example 2 A (1,1,1) plane of Si single crystal was used as a substrate, and sapphire (α−) formed by magnetron sputtering as a stress relaxation layer.
Al 2 O 3 ) was used. The substrate temperature was 500 ° C., the target was a sintered body of Al 2 O 3 , the sputtering gas was Ar, the pressure was 1 Pa, and the film thickness was 120 nm.

【0023】サファイア応力緩和層の場合も、ZnO 応力
緩和層の場合と同様、酸化防止層がない場合、Si(1,1,
1) 基板上でc軸配向に成長はするが、c面内でのa軸
方向の回転が見られた。ところが、酸化防止層を導入す
ることにより、サファイアおよびその上に形成したダブ
ルへテロ構造ともにエピタキシャル成長し、亀裂も観測
されなかった。 実施例3 基板としてSi単結晶の (1,1,1)面を用い、応力緩和層に
マグネトロンスパッタリングにより形成したマグネシア
(MgO)を用いた。なお、基板温度は400 ℃、ターゲット
にはMgO の焼結体を用い、スパッタガスはArを使い、圧
力は1Pa 、膜厚は100nm とした。MgO の場合も、酸化防
止層がない場合、Si(1,1,1) 基板上でc軸配向ではある
が、c面内でのa軸方向の回転が見られた。ところが、
酸化防止層を導入することにより、MgO およびその上に
形成したダブルへテロ構造ともにエピタキシャル成長
し、亀裂も観測されなかった。 実施例4 基板としてSi単結晶の (1,1,1)面を用い、応力緩和層に
マグネトロンスパッタリングにより形成したスピネル
(MgAl2 O4) を用いた。なお、基板温度は600 ℃、ター
ゲットにはMgAl2 O4焼結体を用い、スパッタガスにはAr
を使い、圧力は1Pa 、膜厚は120nm とした。スピネルの
場合も、酸化防止層がない場合、Si(1,1,1) 基板上でc
軸配向ではあるが、c面内でのa軸方向の回転が見られ
た。ところが、酸化防止層を導入することにより、スピ
ネルおよびその上に形成したダブルへテロ構造ともにエ
ピタキシャル成長し、亀裂も観測されなかった。 実施例5 基板としてSi単結晶の (1,1,1)面を用い、応力緩和層に
マグネトロンスパッタリングにより形成したネオジガレ
イト (NdGaO3) を用いた。なお、基板温度は700 ℃、タ
ーゲットにはNdGaO3焼結体を用い、スパッタガスにはAr
を使い、圧力は1Pa 、膜厚は120nm とした。ネオジガレ
イトの場合も、酸化防止層がない場合、Si(1,1,1) 基板
上でc軸配向ではあるが、c面内でのa軸方向の回転が
見られた。ところが、酸化防止層を導入することによ
り、ネオジガレイトおよびその上に形成したダブルへテ
ロ構造ともにエピタキシャル成長し、亀裂も観測されな
かった。 実施例6 また、6H-SiC基板を用いて、実施例1 と同様に、ZnO を
応力緩和層、GaN 酸化防止層とした実験を行ったが、実
施例1 と同様に応力緩和層、酸化防止層の効果が確認で
きた。
In the case of the sapphire stress relaxation layer, as in the case of the ZnO stress relaxation layer, Si (1,1,1,
1) Growth on the substrate was c-axis oriented, but rotation in the a-axis direction was observed within the c-plane. However, by introducing the antioxidant layer, both sapphire and the double heterostructure formed thereon were epitaxially grown and no crack was observed. Example 3 A (1,1,1) plane of Si single crystal was used as a substrate, and a stress relaxation layer was formed by magnetron sputtering.
(MgO) was used. The substrate temperature was 400 ° C., the target was a MgO 2 sintered body, the sputtering gas was Ar, the pressure was 1 Pa, and the film thickness was 100 nm. In the case of MgO as well, in the absence of the antioxidant layer, rotation in the a-axis direction within the c-plane was observed, although it was c-axis oriented on the Si (1,1,1) substrate. However,
By introducing the antioxidant layer, both MgO and the double heterostructure formed on it grew epitaxially and no crack was observed. Example 4 A (1,1,1) plane of Si single crystal was used as a substrate, and a spinel formed by magnetron sputtering as a stress relaxation layer.
(MgAl 2 O 4 ) was used. The substrate temperature was 600 ° C, the target was MgAl 2 O 4 sintered body, and the sputtering gas was Ar.
The pressure was 1 Pa and the film thickness was 120 nm. In the case of spinel, if there is no anti-oxidation layer, c on Si (1,1,1) substrate
Although it was axially oriented, rotation in the a-axis direction within the c-plane was observed. However, by introducing the antioxidant layer, both the spinel and the double hetero structure formed thereon were epitaxially grown, and no crack was observed. Example 5 A (1,1,1) plane of Si single crystal was used as a substrate, and neodigalate (NdGaO 3 ) formed by magnetron sputtering was used as a stress relaxation layer. The substrate temperature was 700 ° C, NdGaO 3 sintered body was used as the target, and Ar gas was used as the sputtering gas.
The pressure was 1 Pa and the film thickness was 120 nm. Also in the case of neo digallate, rotation in the a-axis direction within the c-plane was observed in the absence of the antioxidant layer, although it was c-axis oriented on the Si (1,1,1) substrate. However, by introducing the antioxidant layer, both neodigallate and the double hetero structure formed thereon were epitaxially grown, and no crack was observed. Example 6 Further, using a 6H-SiC substrate, an experiment was conducted in which ZnO was used as a stress relaxation layer and a GaN antioxidation layer as in the case of Example 1. The effect of layers was confirmed.

【0024】[0024]

【発明の効果】本発明によれば、Alx Gay In1-x-y N(0
≦x 、y かつ 0≦x+y ≦1)結晶の熱膨張係数より小さな
熱膨張係数を持つ結晶からなる基板上に形成されたAlx
Gay In1-x-y N 層を含むIII 族窒化物半導体装置におい
て、前記基板と前記Alx Gay In1-x-y N 層との間に基板
材料およびAlx Gay In1-x-y N 結晶の熱膨張係数より大
きな熱膨張係数を持つ材料からなる応力緩和層を介在さ
せて、Alx Gay In1-x-yN に生ずる応力を緩和したた
め、熱膨張係数がAlx Gay In1-x-y N 膜より小さい基板
上のAlx Gay In1-x-y N からなる多層膜を有するIII 族
窒化物半導体装置には亀裂がなく、またへき開性を利用
して個別化が簡単にできる。
According to the present invention, Al x Ga y In 1-xy N (0
≤ x, y and 0 ≤ x + y ≤ 1) Al x formed on a substrate made of a crystal having a coefficient of thermal expansion smaller than that of the crystal
In group III nitride semiconductor device including a Ga y In 1-xy N layer, the substrate material and Al x Ga y In 1-xy N crystal between the substrate and Al x Ga y In 1-xy N layer The stress generated in Al x Ga y In 1-xy N was relaxed by interposing a stress relaxation layer made of a material having a thermal expansion coefficient larger than that of Al x Ga y In 1-xy N. no cracks in the III-nitride semiconductor device having a multilayer film composed of Al x Ga y in 1-xy N on a substrate smaller than the film, also individualized by utilizing the cleavage property can be easy.

【0025】さらに、応力緩和層と基板との間に、Alx
Gay In1-x-y N (0≦x 、y かつ 0≦x+y ≦1)からなる酸
化防止層を介在させ、応力緩和層およびその上に形成さ
れるAlx Gay In1-x-y N 膜の結晶性の悪化を防止するよ
うにしたので、精細な層構成の発光ダイオードやレーザ
ダイオードを形成できる。
Further, between the stress relaxation layer and the substrate, Al x
Ga y In 1-xy N ( 0 ≦ x, y and 0 ≦ x + y ≦ 1) is interposed antioxidant layer made of, Al x Ga is formed stress relieving layer and thereon y In 1-xy N Since the deterioration of the crystallinity of the film is prevented, a light emitting diode or a laser diode having a fine layer structure can be formed.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明に係るIII 族窒化物半導体装置の層構成
の断面図
FIG. 1 is a cross-sectional view of a layer structure of a group III nitride semiconductor device according to the present invention.

【図2】Si基板上に直接形成されたZnO 膜の反射高速電
子線回折(RHEED) 像を示し、(a)は電子線入射が (1,
-1,1) 方向の場合のパターンの図、(b)は電子線入射
が(1,0,0) 方向の場合であり(a)に対してc面内で30
°回転させた場合のパターンの図
FIG. 2 shows a reflection high-energy electron diffraction (RHEED) image of a ZnO film directly formed on a Si substrate.
-1,1) direction pattern, (b) is the case where the electron beam is incident in (1,0,0) direction.
Illustration of pattern when rotated

【図3】Si基板上に直接形成されたZnO 膜のオージェ電
子分光による深さ方向の元素分析の結果を示す図
FIG. 3 is a diagram showing the results of elemental analysis in the depth direction of a ZnO film directly formed on a Si substrate by Auger electron spectroscopy.

【図4】Si基板にGaN 膜を形成されたZnO 膜のオージェ
電子分光による深さ方向の元素分析の結果を示す図
FIG. 4 is a diagram showing the results of elemental analysis in the depth direction of a ZnO film having a GaN film formed on a Si substrate by Auger electron spectroscopy.

【図5】Si基板上のGaN 膜上に形成されたZnO 膜のRHEE
D 像を示し、(a)は電子線入射が (1,-1,1) 方向の場
合のパターンの図、(b)は電子線入射が(1,0,0) 方向
の場合((a)に対してc面内で30°回転させた)のパ
ターンの図
FIG. 5: RHEE of ZnO film formed on GaN film on Si substrate
D image, (a) shows the pattern when the electron beam is incident in the (1, -1,1) direction, and (b) shows the pattern when the electron beam is incident in the (1,0,0) direction ((a () Rotated by 30 ° in the c-plane))

【図6】Si基板上のGaN 膜、ZnO 膜の二重層上の Al x
Gay In1-x-y N 膜の電子顕微鏡観察による結晶の状態を
示す図
FIG. 6 Al x on a double layer of GaN film and ZnO film on Si substrate
Diagram showing the crystal state of the Ga y In 1-xy N film observed by electron microscopy

【図7】本発明に係るレーザダイオードのへき開面に垂
直な面での断面図
FIG. 7 is a sectional view of a laser diode according to the present invention in a plane perpendicular to the cleavage plane.

【図8】従来のIII 族窒化物半導体装置の1例であるレ
ーザダイオードの断面図
FIG. 8 is a cross-sectional view of a laser diode which is an example of a conventional group III nitride semiconductor device.

【図9】Si結晶基板に直接形成されたAlx Gay In1-x-y
N 膜の表面の走査型電子顕微鏡観察による結晶の状態を
示す図
FIG. 9: Al x Ga y In 1-xy formed directly on a Si crystal substrate
Diagram showing the state of the crystal observed by scanning electron microscopy on the surface of the N film

【符号の説明】[Explanation of symbols]

1 基板 2 バッファ層 2a 第1のバッファ層 2b 第2のバッファ層 3 コンタクト層 4 クラッド層 5 活性層 6 クラッド層 7 キャップ層 8 第1の電極層 8a 第1の電極層 9 第2の電極層 S 応力緩和層 T 酸化防止層 Nt AlGaInN 層 1 substrate 2 buffer layer 2a first buffer layer 2b second buffer layer 3 contact layer 4 clad layer 5 active layer 6 clad layer 7 cap layer 8 first electrode layer 8a first electrode layer 9 second electrode layer S stress relaxation layer T oxidation prevention layer Nt AlGaInN layer

─────────────────────────────────────────────────────
─────────────────────────────────────────────────── ───

【手続補正書】[Procedure amendment]

【提出日】平成8年8月9日[Submission date] August 9, 1996

【手続補正1】[Procedure amendment 1]

【補正対象書類名】明細書[Document name to be amended] Statement

【補正対象項目名】図2[Correction target item name] Figure 2

【補正方法】変更[Correction method] Change

【補正内容】[Correction contents]

【図2】Si基板上に直接形成されたZnO 膜の反射高速電
子線回折(RHEED) 像を示し、(a)は電子線入射が(1,-
1,1)方向の場合の結晶構造の写真、(b)は電子線入射
が(1, 0, 0) 方向の場合であり(a) に対してc 面内で30
°回転させた場合の結晶構造の写真
FIG. 2 shows a reflection high-energy electron diffraction (RHEED) image of a ZnO film directly formed on a Si substrate.
A photograph of the crystal structure in the (1,1) direction, (b) is the case where the electron beam incidence is in the (1, 0, 0) direction, and is 30 in the c-plane with respect to (a).
Photograph of the crystal structure when rotated by °

【手続補正2】[Procedure amendment 2]

【補正対象書類名】明細書[Document name to be amended] Statement

【補正対象項目名】図5[Correction target item name] Fig. 5

【補正方法】変更[Correction method] Change

【補正内容】[Correction contents]

【図5】Si基板上のGaN 膜上に形成されたZnO 膜の反射
高速電子線回折(RHEED) 像を示し、(a)は電子線入射
が(1,-1,1)方向の場合の結晶構造の写真、(b)は電子
線入射が(1, 0, 0) 方向の((a) に対してc 面内で30°
回転させた)場合の結晶構造の写真
FIG. 5 shows a reflection high-energy electron diffraction (RHEED) image of a ZnO film formed on a GaN film on a Si substrate. (A) shows the case where the electron beam incidence is in the (1, -1,1) direction. Photograph of the crystal structure, (b) shows that the electron beam incident is in the (1, 0, 0) direction (30 ° in the c-plane with respect to ((a)).
Photograph of crystal structure when rotated)

【手続補正3】[Procedure 3]

【補正対象書類名】明細書[Document name to be amended] Statement

【補正対象項目名】図6[Correction target item name] Fig. 6

【補正方法】変更[Correction method] Change

【補正内容】[Correction contents]

【図6】Si基板上のGaN 膜、ZnO 膜の二重層上のAlx Ga
y In1-x-y N 膜の電子顕微鏡観察による結晶の状態を示
す顕微鏡写真
FIG. 6 Al x Ga on a double layer of GaN film and ZnO film on Si substrate
Micrograph showing the crystal state of the y In 1-xy N film observed by electron microscopy

【手続補正4】[Procedure amendment 4]

【補正対象書類名】明細書[Document name to be amended] Statement

【補正対象項目名】図9[Correction target item name] Figure 9

【補正方法】変更[Correction method] Change

【補正内容】[Correction contents]

【図9】Si結晶基板上に直接形成されたAlx Gay In
1-x-y N 膜の表面の走査型電子顕微鏡観察による結晶の
状態を示す顕微鏡写真
FIG. 9: Al x Ga y In formed directly on a Si crystal substrate
Micrograph showing the crystal state of the surface of the 1-xy N film observed by scanning electron microscopy.

フロントページの続き (72)発明者 上條 洋 神奈川県川崎市川崎区田辺新田1番1号 富士電機株式会社内Continued Front Page (72) Inventor Hiroshi Kamijo 1-1, Tanabe Nitta, Kawasaki-ku, Kawasaki-shi, Kanagawa Prefecture Fuji Electric Co., Ltd.

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】Alx Gay In1-x-y N (0≦x 、y かつ 0≦x+
y ≦1)結晶の熱膨張係数より小さな熱膨張係数を持つ結
晶からなる基板上に形成されたAlx Gay In1-x-y N 層を
含むIII 族窒化物半導体装置において、前記基板と前記
Alx Gay In1-x-y N 層との間に基板材料およびAlx Gay
In1-x-y N 結晶の熱膨張係数より大きな熱膨張係数を持
つ材料からなる応力緩和層を介在させて、Alx Gay In
1-x-y Nに生ずる応力を緩和することを特徴とするIII
族窒化物半導体装置。
1. Al x Ga y In 1-xy N (0≤x, y and 0≤x +
y ≤ 1) In the group III nitride semiconductor device including an Al x Ga y In 1-xy N layer formed on a substrate made of a crystal having a thermal expansion coefficient smaller than that of the crystal, the substrate and the
Al x Ga y In 1-xy N layer substrate material and Al x Ga y between the
A stress relaxation layer made of a material having a coefficient of thermal expansion larger than that of the In 1-xy N crystal is interposed to form an Al x Ga y In
Characterized by relaxing the stress generated in 1-xy N III
Group nitride semiconductor device.
【請求項2】前記基板材料はシリコン (Si) 結晶または
炭素化シリコン (SiC)結晶であることを特徴とする請求
項1に記載のIII 族窒化物半導体装置。
2. The group III nitride semiconductor device according to claim 1, wherein the substrate material is a silicon (Si) crystal or a carbonized silicon (SiC) crystal.
【請求項3】前記応力緩和層は酸化亜鉛 (ZnO)、酸化マ
グネシウム (MgO)、サファイア (α-Al2O3) 、スピネル
(MgAl2O4)またはネオジウムガレイト (NdGaO3) の内の
少なくとも1 種類からなることを特徴とする請求項1ま
たは2に記載のIII 族窒化物半導体装置。
3. The stress relaxation layer comprises zinc oxide (ZnO), magnesium oxide (MgO), sapphire (α-Al 2 O 3 ), spinel.
3. The group III nitride semiconductor device according to claim 1, comprising at least one of (MgAl 2 O 4 ) and neodymium gallate (NdGaO 3 ).
【請求項4】前記応力緩和層と基板との間に、Alx Gay
In1-x-y N (0≦x 、y かつ 0≦x+y ≦1)からなる酸化防
止層を介在させ、応力緩和層およびその上に形成される
Alx Gay In1-x-y N 膜の結晶性の悪化を防止することを
特徴とする請求項1ないし3に記載のIII 族窒化物半導
体装置。
4. An Al x Ga y layer between the stress relaxation layer and the substrate.
In 1-xy N (0 ≤ x, y and 0 ≤ x + y ≤ 1) intervening the antioxidant layer, and formed on the stress relaxation layer and above
Al x Ga y In III-nitride semiconductor device according to 3 claims 1, characterized in that to prevent deterioration of the crystalline 1-xy N film.
【請求項5】発光ダイオードまたはレーザダイオードで
あることを特徴とする請求項1ないし4に記載のIII 族
窒化物半導体装置。
5. The group III nitride semiconductor device according to claim 1, which is a light emitting diode or a laser diode.
JP16387296A 1996-06-04 1996-06-04 Group III nitride semiconductor device Expired - Fee Related JP3756575B2 (en)

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