JPH09326015A - Communication circuit of noncontact type memory card system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To eliminate the occurrence of an overrun error even when the input of data from a reader writer is delayed by suspending 1-byte data transmission on a card side once a transmission wait request signal is detected, and then connecting the card side to a microcomputer which has a slow operation speed. SOLUTION: If received data which is not passed yet is left in a register on the reader writer side, the transmission wait request signal is outputted to the card side. Consequently, a receive modulation signal RX2 outputted from a card-side communication circuit 30 becomes 0. A transmission wait request signal detecting circuit 55 detects the receive modulation signal RX2 being 0. According to a detection signal from the transmission wait request signal detecting circuit 55, 1st and 2nd shift registers 50 and 51 for data transmission are made to suspend the start of transmission of next 1-byte data.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a communication circuit of a contactless memory card system configured to send and receive data by electromagnetic coupling (also referred to as electromagnetic induction).

[0002]

2. Description of the Related Art In recent years, a so-called non-contact type memory card has been put into practical use as a storage medium having a small size and high reliability, and its memory capacity is further increased with the expansion of its application range. It tends to change.

As the memory capacity increases, the data transmission speed is naturally required to be increased. On the other hand, however, the speedup is so high that the card access reader may be used in some cases. / While the operating speed of the microcomputer that controls the writer (hereinafter referred to as "microcomputer") cannot keep up, or while the microcomputer is performing other emergency interrupt processing,
Problems such as overrun errors being generated by dropping the received data on the writer side have come to occur. That is, in the non-contact type memory card system, the number of communication transmission paths between the card side and the reader / writer side is limited to the minimum due to space and other problems. It is extremely unreasonable to have the other party wait for the transmission by providing a dedicated signal line only for the special handshake. As a result,
In the conventional non-contact type memory card system, once the card side starts transmitting the read data of the memory, the microcomputer of the host system overwrites the data successively sent via the reader / writer. It is required to take in it without errors.

[0004]

The card reader / writer is used in combination with various types of microcomputers according to the application system, but the operating speed is relatively slow depending on the type of microcomputer. There is also
Considering the fact that the microcomputer is used in combination with such a slow operating speed, it becomes impossible to increase the transmission speed of communication between the contactless memory card and the reader / writer. Also application
Depending on the system, interrupt processing with a higher degree of urgency may occur while receiving the transmission from the card, and even in such a case, before the microcomputer side captures the data received by the reader / writer, When the reception of the next data ends, an overrun error will occur.

An object of the present invention is to provide a non-contact type memory comprising a non-contact type memory card and a card reader / writer for exchanging data with each other via an electromagnetic coupling interface section including coils for both transmission and reception. In the card system, eliminating the drawbacks of the above-mentioned conventional technology,
Even if it is connected to a microcomputer with a slow operating speed, or if there is a possibility that the acquisition of data from the reader / writer will be delayed due to other interrupt processing on the microcomputer side, no overrun error will occur. Moreover, it is to realize a communication circuit capable of increasing the communication speed.

[0006]

In order to achieve the above object, according to the present invention, a reader / writer receives data from an asynchronous serial data sent from a card via an electromagnetic coupling interface. A circuit, and a received data buffer for receiving 1-byte-unit received parallel data delivered from the data receiving circuit,
When undelivered received data is stored in both the data receiving circuit and the received data buffer, the reception control circuit that outputs a transmission waiting request signal to the card side and the transmission waiting request signal are received. And a transmission modulation circuit for controlling the electromagnetic coupling interface section to a predetermined transmission modulation state, and the card side transmits data for transmitting start-stop synchronization serial data in 1-byte units via the electromagnetic coupling interface section. Detecting means for detecting the presence / absence of a transmission waiting request signal transmitted from the reader / writer side via the electromagnetic coupling interface section at intervals between the transmission circuit and the 1-byte unit asynchronous serial data transmission. Once the transmission waiting request signal is detected by the detecting means, at least the transmission waiting request is detected. Until the release is characterized by being configured to the data transmission circuit so as to have a transmission control circuit for waiting for data transmission of the next 1 byte.

[0007]

1 to 6 show a contactless memory card system according to an embodiment of the present invention, and FIGS. 1 and 2 show a contactless memory card and a reader / writer, respectively. Is a block diagram showing a schematic configuration of
FIG. 3 is a circuit diagram showing a communication circuit for an electromagnetic coupling interface between the reader / writer and the contactless memory card. 4 to 6 are waveform charts showing main communication waveforms. The reader / writer 2 shown in FIG. 2 is generally used by being incorporated in a microcomputer system, and in the present embodiment as well,
1 with a microcomputer (hereinafter, microcomputer) 1
It is configured to transfer received data and transmitted data in byte units.

As shown in FIG. 2, the reader / writer 2
In the above, the output of the oscillation circuit 3 is frequency-divided by the frequency dividing circuit 4 to the carrier frequency for power supply, and then input to the drive circuit 5 for push-pull power supply to drive the power-supply print coil antenna 6. It is configured to drive in series resonance. On the other hand, as shown in FIG. 1, a card side printed coil type antenna 40 for receiving power, which is configured to face the antenna 6 at the time of access, is connected to a rectifying circuit 41 and a clock signal forming circuit 43. Further, the rectified power source by the rectifier circuit 41 is regulated by the constant voltage circuit 42 and supplied as V _SS system power source to each part of the circuit in the card. Further, the clock signal CLK, which is restored by the clock signal forming circuit 43 to the signal of the carrier frequency for power supply, is also supplied to each unit in the card.

As shown in FIG. 3, the communication circuit of the non-contact type memory card system of the present embodiment has two sets of electromagnetic coupling interface sections for both data transmission and reception, and a reader / writer. In the communication circuit 20, a print coil type first communication antenna 21 and a second communication antenna 22 are provided. Further, the first LC parallel type resonance circuit 31 provided in the contactless type memory card communication circuit 30 is composed of a print coil type communication antenna 33 and a capacitor 34, and the antenna 33 is a reader at the time of execution of access. / The first of the writer communication circuit 20
It is configured to face the communication antenna 21 closely. The second resonance circuit 32 on the card side also has the same configuration as that of the first resonance circuit 31, and its antenna (not shown) and the second communication coil 22 in the reader / writer communication circuit 20 are connected. The relationship is exactly the same. The contactless memory card communication circuit 30
Although it constitutes the electromagnetically coupled interface section on the card side as it is, with respect to the reader / writer communication circuit 20,
In addition to the reader / writer-side electromagnetic coupling interface section, first and second transmission modulation circuits 25 and 26 are also included. (That is, in the reader / writer communication circuit 20, elements other than the first and second transmission modulation circuits 25 and 26 form an electromagnetic coupling interface section.)

Here, a basic communication operation between the reader / writer side and the card side will be described with reference to FIGS. The communication between the reader / writer side and the card side, regardless of the direction of communication, uses block data consisting of multiple bytes, odd vertical parity, 2-stop bits, and LSB-first type start / stop synchronization type. In FIG. 4, the last 1-byte data (“4”) of the block data is transferred from the reader / writer side to the card side.
ah ") is sent, this time the card side sends the first 1-byte data (" 5Bh ") of the returned block data to the reader / writer side. FIG. 4 includes a state in which transmission / reception is switched between the reader / writer side and the card side.

First, the transmission of data from the reader / writer 2 side to the card side will be described. 1 from microcomputer 1
The transmission data TB for each byte is first passed to the transmission data buffer register 7, and if the first and second transmission shift registers 8 and 9 are still continuing transmission of the previous transmission data, that transmission Is completed and the first and second transmission shift registers 8 and 9 are emptied, the process waits in the transmission data buffer register 7 as it is. When the first and second transmission shift registers 8 and 9 are empty, the 1-byte transmission data in the transmission data buffer register 7 is divided into the lower 4 bits and the upper 4 bits, respectively. , Are set in the second transmission shift registers 8 and 9, and are parallel / serial converted here, and are input to the first and second transmission modulation circuits 25 and 26 as serial transmission data TD1 and TD2. When the transmission data buffer register 7 finishes delivering the transmission data to the first and second transmission shift registers 8 and 9 as described above, the transmission control circuit 10 sends new transmission data to the microcomputer 1. The signal TXRDY indicating that the signal can be received is set. That is, the transmission data TB can be newly written in the transmission data buffer register 7 in response to the write enable signal WE from the microcomputer 1.

On the other hand, the serial transmission data TD1 and T
Although D2 is transmitted in an asynchronous manner, its start bit is the serial transmission data T as shown in FIG.
Since the vertical parity bit is added only to the head of D1 and the vertical parity bit is added only to the end of the serial transmission data TD2, when these are included, the configuration is such that the stop bit is added to the 5-bit serial data. Become. At the time of transmission from the reader / writer 2 side, since the transmission waiting request signal WS for the card side, which will be described later, is held in the “0” state, the serial transmission data TD1 and TD are transmitted.
Only when the bit data of 2 is “0”, the transmission carrier signal CS having a predetermined frequency is transmitted through the first and second transmission modulation circuits 25 and 26 to the first and second transmission drive circuits 27. , 28. That is, the first and second transmission modulation circuits 25 and 26 are configured to transmit the serial transmission data TD1,
The transmission carrier signal CS is so-called inverted ASK-modulated by TD2, and as a result, the serial transmission data T
While D1 and TD2 are "0", the first and second communication antennas 21 and 22 are in a transmission modulation state by series resonance drive, and are induced by this, and the first and second communication antennas on the card side. A resonance waveform also appears in the resonance circuits 31 and 32. That is, the first and second electromagnetic interface signals M1 and M2
FIG. 4 is a waveform diagram showing an AC magnetic field in an electromagnetic coupling interface between the card side and the reader / writer side, and if a current change occurs in the antenna on one side of the card side and the reader / writer side, it corresponds to that. A current change is induced in the antenna on the other side by the AC magnetic field generated as a result, so that a signal waveform that is substantially similar to the waveforms of the first and second electromagnetic interface signals M1 and M2 is eventually obtained on the card side. It also appears on both the reader / writer side. By the way, the first and second resonance circuits 3 on the card side
The resonance waveforms induced in 1 and 32 are input to and detected by the first and second detection circuits 37 and 38, respectively, so basically, the first and second resonance carrier signals CS are used. When the communication antennas 21 and 22 are driven, the reception demodulated signals RX1 and RX2 output from the detection circuits 37 and 38 are also in the "0" state. The reception demodulation signals RX1 and RX2 are based on the timing control function included in the reception control circuit 49.
In the first and second data reception shift registers 47 and 48, one bit is serially received as data at every predetermined sampling timing with the start bit detection point in step 1 as a relative reference point on the phase. To go.

Next, the data transmission from the card side to the reader / writer side will be described. The card of this embodiment includes
A non-volatile memory 44 composed of an EEP-ROM is built-in. For example, 1-byte data read from the non-volatile memory 44 in response to a control signal from the main control circuit 45 is transferred via the data bus 46 to the lower order thereof. The 4 bits and the upper 4 bits are divided and set in the first and second data transmission shift registers 50 and 51 for parallel / serial conversion provided as a data transmission circuit on the card side. As a result, according to the transmission timing signal or the like from the transmission control circuit 52, the first shift register 50
From, the lower 4 bits of the 1-byte data are output as the first serial transmission data BD1 in the asynchronous mode.
Similarly, the second shift register 51 outputs the second serial transmission data BD2 based on the upper 4 bits. Furthermore, the first and second transmission signal forming circuits 53 and 54
Is a transmission signal TX1, T consisting of a single shot signal in accordance with the first and second transmission data BD1, BD2.
Form X2. In this case, the transmission data BD1 and BD2
Corresponding to the case where each bit data of "1" is "0", the transmission signals TX1 and TX2 composed of the single shot signal are formed, and the first and second transmission drive transistors 35 and 35, respectively.
36 is driven. That is, the first and second resonance circuits 31,
32 is single-shot driven every time the transmission data BD1, BD2 becomes "0", and as a result, the first and second antennas 21, 2 of the reader / writer communication circuit 20 are driven.
In 2 as well, a current change due to electromagnetic induction occurs. In this case, the drive is single shot drive, but the resonance circuit 3
Due to the resonance phenomenon of 1 and 32, the waveforms of the electromagnetic interface signals M1 and M2 and the signal waveforms generated in the respective antennas become free decay waveforms that are substantially similar to each other.

The signal waveform induced by the first antenna 21 is input to the reception demodulation circuit 23 for reception demodulation. First, the capacitor C1 and the resistors R1 and R are used.
After being DC cut and biased by 2, it becomes the input signal (that is, the reception demodulation target signal) WP to the window comparator. Therefore, the waveform of the input signal WP is also similar in shape to the electromagnetic interface signal M1, but here, the input signal WP jumps out with respect to the window width defined by the resistors R3, R4, and R5. Then, the first reception demodulation signal RD1 which is the output of the window comparator is configured to be at "0" level. The second antenna 22, the reception demodulation circuit 24,
Also for the reception demodulated signal RD2, the first antenna 2
1, the reception demodulation circuit 23 and the reception signal RD1 are exactly the same.

On the other hand, the above received demodulated signals RD1 and RD2
Are respectively input to the first and second reception shift registers 11 and 12 for serial / parallel conversion provided as a data reception circuit on the reader / writer side, where the lower 4 bits of 1-byte reception data, Each time the reception of the upper 4 bits is completed, the received data buffer register 13 is stored as 1 byte of received parallel data in total.
Be delivered to. When one byte of received data is transferred to the reception buffer register 13 as described above, the reception control circuit 14 outputs a signal RXRD indicating that the reception data can be read.
Y is output, and in response to the output enable signal OE from the microcomputer 1, it becomes possible to read the 1-byte received data RB. Note that the data reception on the reader / writer side is also basically a single shot reception system, and therefore, the first and second reception demodulation signals RD
1, RD2, if within a predetermined sampling interval with the detection point of the start bit as a relative reference point on the phase, even if it has dropped to the "0" level for a moment, the first,
When it is taken into the second receiving shift registers 11 and 12, the received bit data in that section is treated as "0".

Next, FIG. 5 and FIG. 6 show two bytes of data ("4A") from the card side to the reader / writer side.
h ”and“ 35h ”) are subsequently transmitted. First, in FIG. 5, the transmission of the first byte data (“ 4Ah ”) from the card side is completed, When the respective 4-bit data received in the first and second shift registers 11 and 12 for receiving data on the side of the reader / writer are gathered, the register 13 for receiving buffer is still available.
The inside shows a state in which the 1-byte data received before that time is left without being read from the microcomputer 1. That is, in this state, reception control means that undelivered received data remains in both the first and second data reception shift registers 11 and 12 and the reception buffer register 13. In order to be detected by the circuit 14, the reception control circuit 14 outputs a transmission waiting request signal WS to the card side,
It is input to the second transmission modulation circuit 26. As a result, the transmission carrier signal CS having a predetermined frequency is transmitted to the second transmission modulation circuit 2
6 is input to the second transmission drive circuit 28, the second communication antenna 22 enters a transmission modulation state by series resonance drive, and the second electromagnetic interface signal M2 has the same frequency as the transmission carrier signal CS. AC waveform appears.
Further, induced by this, the second resonance circuit 3 on the card side.
Since the resonance waveform appearing at 2 is detected by the second detection circuit 38, the reception control circuit 14 on the reader / writer side is eventually detected.
While the transmission waiting request signal WS is being output,
The reception demodulation signal RX2 output from the second detection circuit 38 on the card side is in the state of "0".

On the other hand, on the card side, the reception control circuit 4
9 and the transmission control circuit 52 perform the functions of controlling the operation sequence and forming the operation timing signal at the time of reception and transmission, respectively. The main control circuit 45 controls the sequence of the entire communication and the memory / memory. It controls the address etc. at the time of access. Here, as in the above case, when the data to be continuously transmitted from the card side still remains, and the transmission of 1 byte of data is completed and the period of the first stop bit has passed, the second stop In the bit period, in response to a predetermined timing control signal from the transmission control circuit 52, the transmission waiting request signal detection circuit 55 checks the reception demodulation signal RX2 output from the second detection circuit 38. Therefore, if it is detected that the reception demodulation signal RX2 is in the "0" state as described above, the transmission waiting request signal detection circuit 55 sends this to the reader / writer side via the electromagnetic coupling interface section. It can be considered that the transmission waiting request signal transmitted from the device is detected.
As a result, the transmission control circuit 52 starts transmitting the next 1-byte data to the first and second data transmission shift registers 50 and 51 in accordance with the detection signal from the transmission waiting request signal detection circuit 55. To wait. That is, on the card side, the reader / writer is used via the electromagnetic coupling interface unit by utilizing a part of the period of the stop bit for every interval of 1-byte serial data transmission from the card side to the reader / writer side. The presence / absence of the transmission waiting request signal WS sent from the writer side is detected. If the transmission waiting request signal is detected, the state of waiting for the transmission of the next 1 byte is entered.

In this state, when the microcomputer 1 fetches the read data held in the receive data buffer register 13, the RXRDY signal for indicating readability from the receive control circuit 14 disappears, but immediately. First and second reception shift registers 11, 1
The received data in 2 is delivered to the reception data buffer register 13, and the RXRDY signal for indicating the readability from the reception control circuit 14 is also set,
It is indicated that the next received data can be read out to the microcomputer 1. On the other hand, as a result of the above, even if the next 1-byte data is transmitted from the card side, the overrun error does not occur on the reader / writer side, so the reception control circuit 14 on the reader / writer side is ,
The output of the transmission waiting request signal WS is stopped. As a result, the reception demodulation signal RX2 output from the second detection circuit 38 on the card side is in the state of "1". Therefore, when the transmission wait request signal detection circuit 55 detects the release of the transmission wait request signal WS, accordingly The transmission standby control by the transmission control circuit 52 is also released, and the transmission of the next 1-byte data from the card side is started. That is, on the card side, when the transmission waiting request signal is once detected, the card waits for transmission of the next 1 byte at least until the transmission waiting request is canceled.

Next, referring to FIG. 6, when the transmission of the first byte of data ("4Ah") from the card side is completed, the reception buffer register 13 on the reader / writer side has already been updated. It shows a state in which the microcomputer 1 has finished reading the previously received 1-byte data and has become empty. That is, in this state, the received data in the first and second data reception shift registers 11 and 12 are immediately delivered to the reception buffer register 13 and read from the reception control circuit 14. RXRDY for
The signal is set. Therefore, in this case, the first and second
In the data receiving shift registers 11 and 12, there is no undelivered received data, and even if the next 1-byte data is sent from the card side, an overrun error does not occur. The circuit 14 does not output the transmission waiting request signal WS to the card side, and the second communication antenna 22 does not enter the transmission modulation state. That is, in this case, since the reception demodulation signal RX2 is in the state of "1" at the timing when the transmission waiting request signal detection circuit 55 on the card side checks, the transmission control circuit 52 causes the first and second transmission control signals 52 to be in the "1" state. The second data transmission shift registers 50 and 51 are caused to start transmission immediately after the period of the second stop bit has passed without waiting for the transmission of the next 1-byte data.

[0020]

As described above, in the present invention,
When multiple bytes of data are continuously sent from the card side to the reader / writer side, even if the host microcomputer takes in the data received by the reader / writer side before the overrun error occurs At the time of, the next data transmission from the card side automatically enters the standby state. As a result, according to the present invention, it is possible to use a reader / writer in combination with a microcomputer having a relatively slow operating speed as a host or receive data from a card without adding an electromagnetic coupling interface dedicated to handshaking. On the assumption that the reader / writer may be used in an application in which an interrupt process may occur, the communication speed between the reader / writer and the card will be sufficiently increased. It becomes possible. That is, according to the present invention, when a microcomputer with a high operation speed is combined as a host, it is possible to utilize sufficiently high-speed communication, and it is combined with a microcomputer with a low operation speed, or used in an application in which interrupt processing occurs. In this case, it is possible to realize a contactless memory card system that does not cause an overrun error, and a contactless communication speed that differs depending on the type of microcomputer to be combined and the nature of the replication. It is not necessary to provide a type memory card system or to provide a large capacity buffer memory for temporarily storing a large amount of received data in the reader / writer.

In the above-described embodiment, the electromagnetic coupling interface section is composed of first and second electromagnetic coupling interface sections for dividing the data of 1-byte unit into two and delivering the data. The first electromagnetic coupling interface section includes a start bit transmission function when transmitting asynchronous serial data from the reader / writer side to the card side, and the second electromagnetic coupling interface section is the reader / writer. Is configured to include a function of transmitting a transmission waiting request signal from the side of the card to the side of the card. According to such a configuration, the transmission waiting from the reader / writer side in the second electromagnetic coupling interface unit is waited for. Presence of request signal is mistakenly received as start bit of serial data transmission from reader / writer on card side To be such is impossible, is avoided complicated configuration for controlling the sequential or the like on communication. On the other hand, in a configuration in which the transmission of the start bit in serial communication and the transmission of the transmission waiting request signal are performed on the same electromagnetically coupled interface unit, the both are confused and the operation sequence is confused. Reader / writer side,
It is necessary to provide a sequential control circuit with sufficiently sophisticated functions on both sides of the card.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a contactless memory card according to an embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of a reader / writer according to an embodiment of the present invention.

FIG. 3 is a circuit diagram showing a configuration of a communication circuit according to an embodiment of the present invention.

FIG. 4 is a waveform diagram showing a communication waveform of a main part in the embodiment of the present invention.

FIG. 5 is a waveform diagram showing communication waveforms of main parts in the embodiment of the present invention.

FIG. 6 is a waveform diagram showing communication waveforms of main parts in the embodiment of the present invention.

[Explanation of symbols]

 2 reader / writer 11 first reception shift register 12 second reception shift register 13 reception buffer register 14 reception control circuit 20 reader / writer communication circuit 21 first communication antenna 22 second communication antenna 25 first transmission modulation Circuit 26 Second transmission modulation circuit 30 Non-contact memory card communication circuit 31 First resonance circuit 32 Second resonance circuit 37 First detection circuit 38 Second detection circuit 50 First data transmission shift register 51 First data transmission shift register 52 transmission control circuit 53 first transmission signal forming circuit 54 second transmission signal forming circuit 55 transmission waiting request signal detecting circuit

Claims (2)

[Claims] 1. A non-contact type memory card system comprising a non-contact type memory card and a card reader / writer for exchanging data with each other via an electromagnetic coupling interface section including a coil for both transmission and reception. The reader / writer includes a data receiving circuit for receiving start-stop synchronous serial data sent from the card side via the electromagnetic coupling interface unit, and a 1-byte-unit received parallel data delivered from the data receiving circuit. A reception control circuit that outputs a transmission waiting request signal to the card side when undelivered received data is contained in both the reception data buffer for receiving data and the data reception circuit and the reception data buffer And the electromagnetic coupling interface upon receiving the transmission waiting request signal. And a data transmission circuit for transmitting start-stop synchronization serial data in 1-byte units via the electromagnetic coupling interface section. Detecting means for detecting the presence or absence of a transmission waiting request signal transmitted from the reader / writer side via the electromagnetic coupling interface section at intervals of the 1-byte unit asynchronous serial data transmission. Once the transmission waiting request signal is detected by the detecting means, a transmission control circuit that causes the data transmitting circuit to wait for the next 1-byte data transmission at least until the transmission waiting request is released. A communication circuit of a non-contact type memory card system characterized by having. 2. The electromagnetic coupling interface section comprises first and second electromagnetic coupling interface sections for dividing 1-byte data into two and delivering the divided data, and said first electromagnetic coupling interface section. Is the leader /
A function of transmitting a start bit at the time of transmitting asynchronous serial data from the writer side to the card side is included.
2. The communication circuit for a contactless memory card system according to claim 1, wherein the electromagnetic coupling interface unit includes a function of transmitting a transmission waiting request signal from the reader / writer side to the card side.