JPH09321218A - Semiconductor device and its manufacture - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a thin semiconductor device with high density, which can realize mounting, by semi-storing at least one of integrated circuit packages on upper/lower sides. SOLUTION: An IC package 17 is provided with a package main body 18 and straight leads 19 which linearly protrude sideways from the right/left sides of the main body 18. The package main body 18 is semi-stored in the opening part 12 of a substrate 11. Namely, almost half of the package main body 18 is stored in the opening part 12 and the remaining half is exposed to the outside. The straight leads 19 are fixed on corresponding lands for IC package mounting and are electrically connected. Thus, they are supported by the substrate 11 at the peripheral edges of the opening parts 12. The IC packages 17 are provided on both upper/lower faces of the substrate 11 for the respective opening parts 12. Since, the IC packages 17 are mounted on both faces in a form that they are semi-stored in the opening parts 12 of the substrate 11, the device can be thinned.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device which is thin and can be mounted at high density.

[0002]

2. Description of the Related Art FIG. 6 is a side view showing a conventional semiconductor device. As shown in FIG. 6, the conventional semiconductor device is configured by directly mounting a plurality of semiconductor integrated circuit packages (hereinafter referred to as IC packages) 2 on the upper and lower surfaces of a mother board 1. Reference numeral 3 is a land for mounting the IC package 2 provided on the upper and lower surfaces of the mother board 1.

[0003]

Since the conventional semiconductor device is constructed by directly mounting the IC package 2 on the upper and lower surfaces of the mother board 1 as described above, the mounting space is restricted by the upper and lower surface areas of the mother board 1. Therefore, there is a problem that high-density mounting is difficult. Further, since the IC package 2 is mounted on the mother board 1 in a floating manner, there is a problem that the mounting requires a large thickness despite its low density.

The present invention has been made to solve the above problems, and an object thereof is to obtain a thin semiconductor device capable of high-density mounting.

[0005]

According to a first aspect of the present invention, there is provided a semiconductor device comprising: a substrate having an opening; a package body facing the opening; and a substrate protruding from the package body at the periphery of the opening. An integrated circuit package having a lead supported on the upper surface side and the lower surface side of the substrate with respect to the opening, and at least one of the integrated circuit package on the upper surface side and the lower surface side. It is configured to be semi-enclosed in the opening.

A semiconductor device according to claim 2 of the present invention is
The lead is a straight lead.

A semiconductor device according to claim 3 of the present invention is
External connection terminals electrically connected to each other on the upper surface side and the lower surface side of the board, the terminals corresponding to each other being vertically connected, and one side of the board. And a solder bump disposed on the external connection terminal on the side.

A semiconductor device according to claim 4 of the present invention is
A plurality of semiconductor devices according to claim 3 are stacked on one surface of a motherboard, and they are connected and fixed by the solder bumps.

A semiconductor device according to claim 5 of the present invention is
A plurality of semiconductor devices according to claim 3 are stacked on the other surface of the mother board, and they are connected and fixed by the solder bumps.

A semiconductor device according to claim 6 of the present invention is
The external connection terminals include dummy terminals provided in excess of the number of leads.

In the semiconductor device according to the seventh aspect of the present invention, the dummy terminals are arranged in at least one row different from the external connection terminals other than the dummy terminals.

In the semiconductor device according to the eighth aspect of the present invention, the alignment arrangement is a plaid-like alignment arrangement.

In the semiconductor device according to claim 9 of the present invention, the substrate is deleted so as not to surround the opening on one side or two opposite sides of the opening.

A method of manufacturing a semiconductor device according to a tenth aspect of the present invention is the method of manufacturing a semiconductor device according to the fifth aspect, wherein a plurality of semiconductor devices according to the third aspect are stacked on one surface of a motherboard. Eutectic or high-temperature solder bumps are used for the solder bumps in the first step, and flux or solder paste is supplied to contact portions between the solder bumps and other parts.
A second step of connecting and fixing a plurality of semiconductor devices stacked in the first step on one side of the mother board by melting the solder bumps, and turning the motherboard over, and placing the semiconductor board on the other side of the mother board. Three
And a third step of stacking a plurality of the semiconductor devices described above, wherein a low-temperature solder bump is used as the solder bump in the third step, and a flux or a solder paste is used at a contact portion between the solder bump and another portion. And a fourth step of connecting and fixing the plurality of semiconductor devices stacked in the third step on the other surface of the motherboard by melting the solder bumps.

[0015]

BEST MODE FOR CARRYING OUT THE INVENTION

(Embodiment 1) FIG. 1 is a plan view showing a semiconductor device according to Embodiment 1 of the present invention, and FIG. 2 is a side view thereof. This semiconductor device includes a substrate 11. Board 11
Is provided with two openings 12 communicating with the upper and lower surfaces thereof. The lands 1 for mounting the IC package are formed on the upper surface and the lower surface of the substrate 11 at the periphery of each opening 12.
3 are provided. Further, outside the land 13, on the upper surface and the lower surface of the substrate 11, external connection lands 14 as external connection terminals are arranged in correspondence with the IC package mounting lands 13. The external connection land 14 and the IC package mounting land 13 are electrically connected to each other by a wiring 15 provided on the substrate 11. The external connection land 14 is
The upper and lower surfaces of the substrate 11 that are vertically corresponding to each other are electrically connected to each other by, for example, a conductor provided in a through hole. Solder bumps 16 for external connection are provided on the external connection lands 14 on one surface side (lower surface side in FIG. 2) of the substrate 11.

The IC package 17 is a package body 1
8 and straight leads 19 that project laterally straight from the left and right side surfaces of the main body 18. The package body 18 is half accommodated in the opening 12 of the substrate 11.
That is, about half of the package body 18 is housed in the opening 12, and the other half is exposed to the outside. The straight leads 19 are fixed on the corresponding IC package mounting lands 13 and electrically connected, so that the straight leads 19 are supported by the substrate 11 at the peripheral edge of the opening 12. Such an IC package 17 is provided on each of the upper surface side and the lower surface side of the substrate 11 for each opening 12.

The procedure of this arrangement is as follows. That is, first, the IC package 17 is positioned on the upper surface side of the substrate 11, and the straight lead 19 is attached to the IC by the reflow method.
Solder to the package mounting land 13. Next, the substrate 11 is turned upside down and the lower surface side of the substrate 11 is similarly subjected to IC
Solder the package 17.

According to the first embodiment, since the IC package 17 is mounted on both sides of the substrate 11 in such a manner as to be half-enclosed in the opening 12, the thickness can be reduced. Moreover, since approximately half of the package body 18 is exposed to the outside, the heat dissipation is hardly deteriorated even if approximately half of the package body 18 is housed in the opening 12. Further, since the straight lead 18 is used, the labor of lead processing can be saved. in addition,
Since the solder bumps 16 are provided on the external connection lands 14 on the one surface side of the substrate 11, it is possible to increase the packaging density by increasing the number of stages of the package as described in the following embodiments.

(Second Embodiment) FIG. 3 is a side view showing a semiconductor device according to a second embodiment of the present invention. This semiconductor device includes a mother board 20. A land 21 for mounting an IC package mounting board is provided on the upper surface of the mother board 20. On the land 21, the board 11 on which both sides of the IC package 17 of the first embodiment described above are mounted is fixed and electrically connected via the solder bump 16. Similarly, on the external connection land 14 on the upper surface of the substrate 11 of the first stage, via the solder bumps 16, I in the first embodiment.
The board 11 on which both sides of the C package 17 are mounted is fixed and electrically connected. In this way, a plurality of substrates 11 each having the IC package 17 according to the first embodiment mounted on both sides are stacked on one surface of the mother board 20, and are connected and fixed by the solder bumps 16.

The procedure for fixing this connection is as follows. That is, first, on the upper surface side of the motherboard 20, the substrate 11 on which the IC package 17 according to the first embodiment is mounted on both sides.
Position in multiple stages. At this time, flux or solder paste is supplied to the contact portions between the solder bumps 16 and the lands 14 and 21. Then, next, the solder bumps 16 are melted, and the multi-stage substrate 11 and the mother board 20 are connected and fixed.

According to the second embodiment, the mounting area can be reduced and high-density mounting can be realized by mounting the substrates 11 on both sides of which the IC packages 17 are mounted on the mother board 20 in multiple stages. Moreover, since the substrate 11 on which the IC packages 17 are mounted on both sides is made thin, the required thickness does not become so large even if the IC packages 17 are mounted in multiple stages.

(Third Embodiment) FIG. 4 is a side view showing a semiconductor device according to a third embodiment of the present invention. A mother board 20 of this semiconductor device has lands 21 for mounting IC package mounting boards on both upper and lower surfaces.
Is provided. In the above-described second embodiment, the substrates 11 each having the IC package 17 according to the first embodiment mounted on both sides are stacked and connected in multiple stages on one surface of the mother board 20, but in the third embodiment, the mother board 2 is connected.
On the other side of 0, the substrates 11 each having the IC package 17 according to the first embodiment mounted on both sides are stacked and connected and fixed in multiple stages.

The procedure for fixing this connection is as follows. That is, first, according to the procedure described in the second embodiment, the substrate 11 on which the IC package 17 of the first embodiment is mounted on both sides is connected and fixed in multiple stages on one surface of the mother board 20. At this time, eutectic solder or high temperature solder bumps are used as the solder bumps 16a. Next, the motherboard 20 is turned over. Then, also on the other surface of the mother board 20, the board 11 on which the IC package 17 of the first embodiment is mounted on both sides is connected and fixed in multiple stages according to the procedure described in the second embodiment. At this time, low-temperature solder bumps are used as the solder bumps 16b. As a result, the solder bumps 16a that were previously melted and fixed at the time of melting the solder bumps 16b do not re-melt, and even if the multi-level substrate 11 is heavy, it does not separate from the back surface of the motherboard 20, and reliable double-sided multi-level mounting is possible. Becomes

According to the third embodiment, by mounting the substrates 11 on which the IC packages 17 are mounted on both sides in multiple stages on both sides of the mother board 20, higher density mounting can be realized as compared with the second embodiment.

(Fourth Embodiment) FIG. 5 is a partial plan view showing a semiconductor device according to a fourth embodiment of the present invention. The fourth embodiment is effective when there is a lead that cannot be shared in each IC package 17 that is electrically connected in multiple stages in the vertical direction. FIG. 5 shows a case where the leads 19a of the upper surface side IC package 17 and the leads 19b of the lower surface side IC package 17 cannot be shared in the IC packages 17 mounted on the upper and lower surfaces of the substrate 11, respectively.

In the fourth embodiment, in order to separately wire the non-sharable leads 19, external connection lands, ie, dummy lands 14a, which are provided in excess of the number of leads 19, are provided on the upper and lower surfaces of the substrate 11. It is provided. The dummy lands 14a are also electrically connected to each other vertically corresponding to each other, similarly to the normal external connection lands 14. In the example of FIG. 5, the leads 19a of the upper side IC package 17 are electrically connected to the normal external connection lands 14 by the wiring 15, and the leads 19b of the lower side IC package 17 are electrically connected to the dummy lands 14a by the wiring 15. Connected.

According to the fourth embodiment, even if there is a read that cannot be shared, the IC as shown in FIGS.
It is possible to mount the packages in multiple stages.

(Fifth Embodiment) FIGS. 7 and 8 are plan views showing a semiconductor device according to a fifth embodiment of the present invention. In the semiconductor device of FIG. 7, unlike the first embodiment shown in FIG. 1, the substrate 11 has a shape in which one side (the lower side in FIG. 7) of the opening 12 is removed so as not to surround the opening 12. Has become. Also in the semiconductor device of FIG. 8, the substrate 11 is different from that of the first embodiment shown in FIG.
The opening 12 is formed so as not to surround the opening 12 on the two opposite sides (the upper side and the lower side in FIG. 8) of the opening 12. 7 and 8 is the same as that of the semiconductor device shown in FIGS. 1 and 2 in other respects. Therefore, the multi-stage mounting as shown in FIGS. 3 and 4 is possible. .

According to the fifth embodiment, the area of the substrate 11 can be reduced by the amount of the removed portion of the substrate 11. Therefore, the mounting space on the motherboard is small and the mounting efficiency can be improved.

(Sixth Embodiment) FIGS. 9 and 10 are partial plan views showing a semiconductor device according to a sixth embodiment of the present invention. Each of these semiconductor devices has a dummy land 14a similar to that of the fourth embodiment shown in FIG. However, while the dummy lands 14a of the semiconductor device of FIG. 5 are aligned with the normal external connection lands 14 in one row, the dummy lands 14a of the semiconductor device of FIGS. 9 and 10 are for normal external connection. It is separately arranged outside the arrangement of the lands 14. In FIG. 9, the dummy lands 14a are arranged right next to the normal external connection lands 14, and in FIG. 10, the normal external connection lands 14 and the dummy lands 14a are arranged alternately in a puddle shape. ing. Note that the other configurations of the semiconductor device shown in FIGS. 9 and 10 are the same as those of the semiconductor device shown in FIG.

The sixth embodiment has the following advantages in addition to the advantages of the fourth embodiment described above. That is, when there are a large number of unusable leads in the upper and lower directions, the number of dummy lands 14a in the one-row arrangement as shown in FIG. Even in such a case, the dummy lands 14a are arranged in two rows as shown in FIGS.
If the dummy lands 14a are separately arranged, a large number of dummy lands 14a can be provided, which is sufficient. If it is desired to further increase the number of dummy lands 14a, the number of dummy lands 14a may be increased by arranging three or more columns. Note that the wiring 15 can be straight because the wiring 15 can be linear by arranging in a puddle shape as shown in FIG.

(Modification) The shape of the lead 19 is not limited to the straight lead. What is essential is that the package body 18 has a lead shape in which the package body 18 is half accommodated in the opening 12 of the substrate 11 when the lead 19 is supported by the substrate 11. If so, thinning can be realized without sacrificing heat dissipation.

In addition, the half housing referred to in this specification includes not only the case where the package body 18 is housed in the opening 12 of the substrate 11 about half, but also the case where the package body 18 is housed in an arbitrary part rather than the whole. It is a broad concept. This is because if a part of the package body 18 is exposed to the outside of the opening 12, the heat radiation performance will not be reduced so much and the thickness will be reduced.

Further, the case where both the upper and lower package bodies 18 of the substrate 11 are half accommodated in the opening 12 has been described. However, as shown in FIG. 11, one of them (the lower surface in FIG. 11) is accommodated. Only the package body 18 of the above may be semi-housed in the opening 12. in this case,
Since it is sufficient for the substrate 11 to have a thickness that allows one of the package bodies 18 to be accommodated in half, the substrate 11 can be formed to be relatively thin. Generally, it is known that the margin distance from the edge of the substrate to the conductor pattern on the substrate is proportional to the thickness of the substrate in consideration of the reliability at the time of processing the outer shape of the substrate. Therefore, in the case of FIG. 11, since the substrate thickness can be made relatively thin, the margin distance can be shortened, and the device size can be reduced.

Further, the lead 19 is connected to the package body 18
Although the case of projecting from two opposite sides has been described, the present invention can be similarly applied to the case of projecting from four sides except for the fifth embodiment.

[0036]

According to the semiconductor device of the first aspect of the present invention, at least one of the integrated circuit packages on the upper surface side and the lower surface side of the substrate is mounted on both sides in such a manner as to be half-enclosed in the opening of the substrate. The advantage is that the mounting can be made thinner without degrading the heat dissipation.

According to the semiconductor device of the second aspect of the present invention, since the leads are straight leads, it is possible to easily realize half-accommodation in the substrate opening, that is, thin mounting, without the need for lead processing. effective.

According to the semiconductor device of the third aspect of the present invention, since the solder bumps are provided on the external connection terminals on one surface side of the substrate, it is possible to easily increase the packaging density by increasing the number of packages. The effect is that

According to the semiconductor device of the fourth aspect of the present invention, since the substrates on which the integrated circuit packages are mounted on both sides are mounted in multiple stages on the motherboard, the mounting area can be reduced and high density mounting can be realized. There is. Moreover, since the board on which the integrated circuit package is mounted on both sides is made thin, there is an effect that the thickness can be small even if the board is mounted in multiple stages.

According to the semiconductor device of the fifth aspect of the present invention, since the substrates on which the integrated circuit packages are mounted on both sides are mounted in multiple stages on both sides of the mother board, higher density mounting is possible as compared with the case of single-sided multi-stage mounting. There is an effect that can be realized.

According to the semiconductor device of the sixth aspect of the present invention, even if there is a non-sharable lead in an integrated circuit package that is vertically mounted in multiple stages, one of the non-sharable leads is a dummy lead. There is an effect that the integrated circuit packages can be easily mounted in multiple stages by wiring to.

According to the semiconductor device of the seventh aspect of the present invention, even when there are a large number of unshareable leads,
There is an effect that it is possible to deal with it with a margin.

According to the semiconductor device of the eighth aspect of the present invention, since the wiring may be linear because of the puddle-like arrangement, there is an effect that the wiring becomes easy.

According to the semiconductor device of the ninth aspect of the present invention, the board area can be reduced by the amount of the removed portion of the board, and therefore the mounting space on the mother board can be reduced, so that the mounting efficiency is improved. The effect is that it can be done.

According to the method of manufacturing a semiconductor device in accordance with a tenth aspect of the present invention, in the case where the boards on which the integrated circuit packages are mounted on both sides are mounted on both sides of the mother board in multiple stages, even if the multi-stage boards are heavy, There is an effect that double-sided mounting can be surely performed without separating from the back surface of the motherboard.

[Brief description of drawings]

FIG. 1 is a plan view showing a semiconductor device according to a first embodiment of the present invention.

2 is a side view of FIG. 1. FIG.

FIG. 3 is a side view showing a semiconductor device according to a second embodiment of the present invention.

FIG. 4 is a side view showing a semiconductor device according to a third embodiment of the present invention.

FIG. 5 is a partial plan view showing a semiconductor device according to a fourth embodiment of the present invention.

FIG. 6 is a side view showing a conventional semiconductor device.

FIG. 7 is a plan view showing a semiconductor device according to a fifth embodiment of the present invention.

FIG. 8 is a plan view showing a semiconductor device according to a fifth embodiment of the present invention.

FIG. 9 is a partial plan view showing a semiconductor device according to a sixth embodiment of the present invention.

FIG. 10 is a partial plan view showing a semiconductor device according to a sixth embodiment of the present invention.

FIG. 11 is a side view showing a semiconductor device according to a modification of the invention.

[Explanation of symbols]

11 substrates, 12 openings, 17 IC packages, 1
8 package body, 19 leads.

Claims (10)

[Claims] 1. A substrate having an opening, a package main body facing the opening, and a lead projecting from the package main body and supported by the substrate at a peripheral edge of the opening, the opening relative to the opening. A semiconductor device, comprising: an integrated circuit package arranged on an upper surface side and a lower surface side of a substrate; and at least one of the integrated circuit package on the upper surface side and the lower surface side is half accommodated in the opening. 2. The semiconductor device according to claim 1, wherein the lead is a straight lead. 3. An external connection terminal electrically connected to the upper and lower surfaces of the substrate so as to correspond to each other, and electrically connected to the leads on the same surface. 3. The semiconductor device according to claim 2, further comprising: a solder bump provided on the external connection terminal on one surface side of the substrate. 4. A semiconductor device in which a plurality of semiconductor devices according to claim 3 are stacked on one surface of a mother board and they are connected and fixed by the solder bumps. 5. The semiconductor device according to claim 4, wherein a plurality of the semiconductor devices according to claim 3 are stacked on the other surface of the motherboard, and the semiconductor devices are connected and fixed by the solder bumps. 6. The semiconductor device according to claim 3, wherein the external connection terminal includes a dummy terminal provided in excess of the number of the leads. 7. The semiconductor device according to claim 6, wherein the dummy terminals are arranged in at least one row different from the terminals for external connection other than the dummy terminals. 8. The semiconductor device according to claim 7, wherein the aligned arrangement is a plaid-shaped aligned arrangement. 9. The substrate according to claim 1, wherein the substrate is deleted so as not to surround the opening on one side or two opposite sides of the opening.
The semiconductor device according to the item. 10. The method for manufacturing a semiconductor device according to claim 5, further comprising a first step of stacking a plurality of semiconductor devices according to claim 3 on one surface of a mother board, wherein the solder bump is formed in the first step. A eutectic or high-temperature solder bump is used, and flux or solder paste is supplied to the contact portion between the solder bump and another portion, and a plurality of layers stacked in the first step by melting the solder bump are used. Further comprising a second step of connecting and fixing the semiconductor device on one side of the motherboard, and a third step of turning over the motherboard and stacking a plurality of the semiconductor devices according to claim 3 on the other side of the motherboard. In the third step, low-temperature solder bumps are used as the solder bumps, and the contact portion between the solder bumps and another part Flux or solder paste is supplied to the semiconductor substrate, and a fourth step of connecting and fixing a plurality of semiconductor devices stacked in the third step on the other surface of the motherboard by melting the solder bumps. Device manufacturing method.