JPH09319323A - Constant current driving circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To make the output current not fluctuate even when an external load to be connected to the output terminal of a constant current circuit is changed, and to obtain a constant current even in the low saturation area of voltage, and also to set the output voltage low by providing a variable resistor whose resistance value is varied by a prescribed signal linked with output signal. SOLUTION: The variable resistor R performing a prescribed operation by being linked with an output signal to be outputted from the output terminal of a constant current driving circuit 190 is connected to between the drain terminal and the gate terminal of the MIS transistor of an input side. Then, the resistance value of the variable resistor R is changed by the output of the constant current driving circuit 190 via a level shifting means. As a result, even though the external load connected to the output terminal of the circuit 19 is changed and the output voltage of the circuit 190 is fluctuated, the fluctuation can be compensated and the constant current 190 driving circuit 190 whose output current does not fluctuate is obtained.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a constant current circuit, and more particularly to a constant current drive circuit for driving a light emitting diode (LED) or the like.

[0002]

2. Description of the Related Art A conventional constant current circuit is shown in FIG. Figure 7
As shown in FIG. 1, the constant current circuit 1 is composed of a current mirror circuit 2 composed of two MOS transistors M1 and M2 of the same channel conductivity type, and a constant current source I for supplying a current to the current mirror circuit 2. ing.

The output current I2 output from the constant current circuit 1 is a current I1 flowing into the current mirror circuit 2 from the constant current source I and the channel width of two MOS transistors M1 and M2 forming the current mirror circuit 2. W1, W2
Is determined by the following formula. I2 = (W2 / W1) × I1 (Equation 1) As can be seen from the above equation, the MOS transistors M1 and M2
By adjusting the channel widths W1 and W2 of, it is possible to easily obtain an output current that is a real multiple of the input current.

The characteristic of the output voltage Vo to the output current Io of the constant current circuit 1 (hereinafter referred to as the output characteristic) is determined by the output characteristic of the MOS transistor M2. The output characteristic of the MOS transistor M2 is shown in FIG. As shown in FIG. 8, if the MOS transistor is designed to operate in the saturation region (see the figure), it is possible to obtain a stable output current Io that is unlikely to change in the output voltage Vo. However, in the saturation region, the slope dIo / d is actually caused by the channel length modulation effect.
Have Vo.

This indicates that when the external load (not shown) connected to the constant current circuit 1 changes and the output voltage Vo changes, the output current Io also changes. In order to solve this problem, a cascode constant current circuit in which current mirror circuits are stacked (see FIG. 9 (1)), a Wilson type constant current circuit in which a transistor is inserted on the output side (see FIG. 9 (2)), etc. are devised. Has been done.

Next, FIG. 10 shows the output characteristic of the cascode constant current circuit shown in FIG. 9 (1). As shown in FIG. 10, the slope of the characteristic in the saturation region is relaxed,
You can see that it is flat.

However, while the slope of the saturation region in the output characteristic becomes flat, the saturation region S1 that can be used as a constant current source becomes narrower than the saturation region S2 that has been conventionally used.

Further, since the transistors are connected in series on the output side, the dynamic range of the output voltage Vo is restricted, and the power consumption becomes large at a large current.

[0009]

In order to suppress the fluctuation of the output current of the current mirror circuit due to the fluctuation of the external load, the transistor is connected in series to the output side of the current mirror circuit. However, there are problems that the saturation region that can be used as a constant current source is narrowed or that the output voltage rises and power consumption increases.

In view of the above problems, the present invention provides a constant current drive circuit in which the output current does not fluctuate even when the external load connected to the output terminal of the constant current circuit changes, and the voltage It is an object of the present invention to provide a constant current drive circuit which can provide a stable constant current even in a low saturation region of low power consumption and can set an output voltage low.

[0011]

In order to solve the above-mentioned problems, according to the present invention, one of two one-channel MIS transistors forming a current mirror circuit, in which the drain terminal and the gate terminal are short-circuited ( In the MIS transistor on the input side), a variable resistor that interlocks with the output signal output from the output terminal of the constant current drive circuit and performs a predetermined operation is connected to the drain terminal and the gate terminal of the MIS transistor on the input side. Connect in between.

Here, the predetermined operation linked to the output signal means that when the output signal becomes lower than a predetermined potential, the resistance value of the variable resistor increases and when it becomes higher than the predetermined potential. This is an operation in which the resistance value of a variable resistor decreases.

As described above, according to the present invention, the constant current drive circuit of the present invention has the built-in variable resistor which is interlocked with the fluctuation of the output voltage, so that it is connected to the output terminal of the constant current drive circuit. Even if the external load changes and the output voltage of the constant current drive circuit changes, the change can be compensated.

Therefore, it is possible to provide a constant current drive circuit in which the output current does not fluctuate even if the external load connected to the output terminal of the constant current circuit changes. Further, unlike the conventional constant current circuit, since the transistor is not connected in series to the output side, the constant current drive circuit of the present invention can provide a stable constant current even in a low voltage saturation region. Further, it is possible to provide a constant current drive circuit in which an increase in power consumption of the constant current drive circuit due to an increase in output voltage due to the presence of a transistor connected in series on the output side is suppressed.

[0015]

Embodiments of the present invention will be described in detail with reference to the drawings. FIG. 1 shows a conceptual circuit diagram of the present invention, and FIG. 2 shows a detailed circuit diagram of FIG. As shown in FIG. 1, a constant current drive circuit 190 according to the present invention includes a current mirror circuit 100 including two N channel MIS transistors (particularly, NMOS transistors) NT1 and NT2, and a current mirror circuit 100. A constant current source I for supplying a constant current to the circuit 100, level shift means for converting the level of the signal output from the output terminal OUT, and a drain terminal N1 of the NMOS transistor NT2 and a contact N2, And a variable resistor R whose resistance value changes depending on the signal converted from the level shift means.

Next, a detailed circuit diagram of the circuit shown in FIG. 1 is shown in FIG. As shown in FIG. 2, the variable resistor is NM.
In the OS transistor NT3, the level shift means is composed of inverting amplifier circuits 110 and 120 connected in two stages.

Next, the operation of this circuit will be described. The NMOS transistor N connected to the output terminal OUT in FIG.
The output characteristic of T1 is shown in FIG.
The output characteristics of the are shown in FIG.

Now, the NMOS transistor NT1 included in the constant current drive circuit 190 operates at the operating point A (see FIG. 3), and the NMOS transistor NT2 operates at the operating point C.
(See FIG. 4).

At this time, when the load (not shown) connected to the output terminal OUT changes, the output voltage Vout of the constant current drive circuit 190 is ΔV1 and the output current Iout is ΔV1.
It is assumed that I1 is decreased (operating point B in FIG. 3).

Due to this decrease in the output voltage, the voltage VN3 at the contact N3 decreases by ΔVN3. Therefore, the ON resistance of the NMOS transistor NT3 is increased, and the potential VN1 of the contact N1 is decreased by ΔV2.

Since the current IN1 flowing through the contact N1 is determined by the constant current source I and is constant, the operating point of the NMOS transistor NT2 moves from point C to point D (see FIG. 4).

Therefore, the gate voltage is increased from VG1 to VG2 and the potential of the contact N4 is increased, so that the drain current and drain voltage of the NMOS transistor NT1, that is, the output current Iout is increased.

When the output voltage Vout increases,
Contrary to the above, the level shift means increases the potential of the contact N3 and decreases the ON resistance of the NMOS transistor NT1. Therefore, the potential of the contact N1 increases and the potential of the contact N4 decreases. As a result, the output current Iout is reduced.

In this constant voltage drive circuit 190, NM
The OS transistor NT1 acts as a variable resistor whose resistance value decreases when the output voltage Vout increases and whose resistance value increases when the output voltage Vout decreases.

Further, the level shift means has an output voltage Vo.
It has a function of shifting ut to a voltage level suitable for being applied to the gate terminal of the NMOS transistor NT1.

As described above, when the output voltage Vout increases or decreases, by connecting the variable resistor (NMOS transistor NT3) interlocking with the output voltage Vout between the contacts N1 and N2, the output voltage Vout ( The fluctuation of the output current Iout) can be compensated.

Next, FIG. 5 shows Vout vs. Iout characteristics when the output voltage Vout (output current Iout) is compensated. However, the constant voltage sources VD1 and VD2 are both set to 3.236V, and the resistors R10, R11, R12, and R are set.
13 is 13.39KΩ, 0.372KΩ, 1
It was set to 0 KΩ and 10 KΩ.

FIG. 6 compares the Vout-to-Iout characteristics of C1 when the fluctuation of the output voltage Vout is compensated and C2 when it is not compensated (that is, when the level shift means and the NMOS transistor NT1 are not used). is there.

As shown in FIG. 5 and FIG. 6, the constant current drive circuit according to the present invention uses the variable resistor and the level shift means to output a constant current even if the output voltage Vout changes. Can be done.

Therefore, unlike the prior art, it is not necessary to connect a transistor in series to the output side, so that the potential on the output side does not rise and power consumption does not rise. Further, as can be seen from FIG. 6, since the constant current is obtained over a wide range of the saturation region, it is possible to supply a stable constant current even in the saturation region where the potential is low.

Further, in this embodiment, the NMOS transistor is used as the MOS transistor forming the current mirror and the NMOS transistor is used as the variable resistor, but the reverse, that is, the MOS forming the current mirror is used.
A PMOS transistor may be used as the transistor and a PMOS transistor may be used as the variable resistor.

[0032]

According to the present invention, since the constant current drive circuit of the present invention has a built-in variable resistor that works in accordance with the fluctuation of the output voltage, the external load connected to the output terminal of the constant current drive circuit is Even if the output voltage of the constant current drive circuit changes and changes, the change can be compensated and a stable output current and output voltage can be supplied.

[Brief description of drawings]

FIG. 1 is a conceptual circuit diagram of a constant current drive circuit according to the present invention.

FIG. 2 is a detailed circuit diagram of a constant current drive circuit according to the present invention.

FIG. 3 shows output characteristics of a constant current drive circuit according to the present invention.

FIG. 4 shows voltage-current characteristics at a contact N1 of the constant current drive circuit according to the present invention.

FIG. 5 is a graph showing the output characteristics of the constant current drive circuit according to the present invention.

FIG. 6 is a diagram comparing the output characteristics of the constant current drive circuit according to the present invention with the output characteristics of the conventional constant current drive circuit.

FIG. 7 is a constant current drive circuit according to a conventional technique.

FIG. 8 shows output characteristics of a constant current drive circuit according to a conventional technique.

FIG. 9 is a circuit diagram for compensating the output characteristics of a constant current drive circuit according to a conventional technique.

FIG. 10 shows output characteristics of a circuit for compensating the output characteristics of the constant current drive circuit according to the related art.

[Explanation of symbols]

 NT1, NT2 NMOS transistor R Variable resistor I Constant current source 110, 120 Inversion amplifier circuit 190 Constant current drive circuit

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Internal reference number FI Technical indication H03F 3/343 H03F 3/343 A

Claims (5)

[Claims] 1. A first MIS transistor having a contact having a gate terminal and a drain terminal connected to each other, and the MI.
In a current mirror circuit composed of an S transistor and a second MIS transistor having the same channel conductivity type, a predetermined one that is connected between the contact and a drain terminal connected to the contact and is interlocked with an output signal. A constant current drive circuit having a variable resistor whose resistance value changes according to the signal of. 2. A first MIS transistor having a contact having a gate terminal and a drain terminal connected to each other, and the MI.
A semiconductor integrated circuit having a current mirror circuit composed of an S transistor and a second MIS transistor having the same channel conductivity type, and an output terminal connected to a drain terminal of the second MIS transistor, wherein It is connected between the contact and the drain terminal connected to the contact, and the resistance value decreases when the output signal output from the output terminal becomes a potential higher than a predetermined potential, and the output signal has a predetermined potential. A constant current drive circuit capable of compensating for fluctuations in the potential of the output terminal by including a variable resistor whose resistance value increases when the potential becomes lower than that. 3. A current mirror comprising a first MIS transistor having a contact having a gate terminal and a drain terminal connected to each other, and a second MIS transistor having the same channel conductivity type as the first MIS transistor. In the circuit, an output terminal connected to an output terminal connected to the drain terminal of the second MIS transistor, the contact, and a drain terminal connected to the contact, and an output signal output from the output terminal has a predetermined value. To decrease the potential of the gate terminal of the first MIS transistor when the output signal becomes lower than a predetermined value, and to increase the potential of the gate terminal of the first MIS transistor when the output signal becomes lower than a predetermined value. And a potential control means of the constant current drive circuit. 4. A first MIS transistor having a contact having a gate terminal and a drain terminal connected to each other, a second MIS transistor having the same channel conductivity type as that of the first MIS transistor, and connected to the contact. Constant current source, a power supply voltage terminal connected to the source terminals of the first and second MIS transistors, an output terminal connected to the drain terminal of the second MIS transistor, the contact, the first A third MIS transistor connected between the drain terminal of one MIS transistor and having the same channel conductivity type as the first and second MIS transistors, and between the third MIS transistor and the output terminal The third MIS transistor is connected when the output signal output from the output terminal is connected to a potential higher than a predetermined potential. And an ON resistance control means for decreasing the ON resistance of the transistor and increasing the ON resistance of the third MIS transistor when the output signal has a potential lower than a predetermined potential. Constant current drive circuit. 5. The constant current drive circuit according to claim 3, wherein the ON resistance control means is a non-inverting amplifier circuit.