JPH09306926A - Semiconductor device and manufacturing method thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To make it possible to form short gate length with high precision by forming an opening part on an upper layer insulating film of a spacer film formed on the major surface of a substrate, forming a recess which reaches an active layer by making a side wall formed on the side wall of the opening part as an etching mask and forming a gate electrode on the bottom of the recess. SOLUTION: A spacer film 10 laminated with a lower layer insulating film 5, a middle layer insulating film 6 and an upper layer insulating film 7 is formed on the major surface of a semi-insulating GaAs substrate 1 having an active layer 2 and an opening part 11 is formed by selectively etching the upper layer insulating film 7. The opening part 11 and the upper layer insulating film 7 are covered with a stopper insulating film 5, a side wall 17 is formed on the side surface of the opening part 11 via the stopper insulating film 15 and a recess 21 is formed by etching the active layer 2 into a predetermined depth by using the side wall 17 as an etching mask A gate electrode 22 is formed on the bottom of the recess 22 and ohmic electrodes 25 and 26 which are made to be source-drain electrodes are provided on the surface of the active layer 2 and which are exposed on each region putting the gate electrode 22 in between.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method of manufacturing the same, and particularly to a low noise and high gain Ga for communication.
The present invention relates to a technique effectively applied to a manufacturing technique of AsMMIC.

[0002]

2. Description of the Related Art In the manufacture of semiconductor devices such as semiconductor integrated circuit devices, microfabrication is progressing, and microfabrication beyond the resolution by lithography is required. In particular, miniaturization of the gate in the FET is indispensable for improving the device performance.

As a processing method for forming a fine pattern of resolution or more by lithography, there is a technique of anisotropically etching the insulating film on the side surface of the spacer insulating film (spacer film) to leave it as a side wall and making it smaller than the opening size by lithography. Are known.

Regarding the technique of determining the size of the opening by the side wall, for example, "Technical Research Report of The Institute of Electronics, Information and Communication Engineers" Vol.94 No.429 P13-P18 is published.
[ED94-130 0.3 μm-Si bipolar process technology for ultra high-speed LSI].

This document describes a technique for forming the width of the emitter opening of a bipolar transistor to 0.3 μm by utilizing a side wall. That is, a thin oxide film and a thick spacer film are formed on a two-layered polysilicon having a partial opening by a CVD method, and then the spacer film is etched by dry etching to form sidewalls on the side surfaces of the opening. . Then, the oxide film (thickness: 50 nm) is etched using the sidewalls as a mask, doped with phosphorus and heat-treated to form a shallow emitter layer.

On the other hand, as one of the communication MMICs, Ga
As-MESFET and HEMT (High Electron Mobili
ty Transistor) is known. For example, in Mitsubishi Electric Technical Report, Vol.63, No.11, 1989, P89-P92, Ga
Recesses are formed on the surface of the As layer (operating layer), and a gate electrode is formed on the recesses.
It describes an aAs-MESFET.

[0007]

[Problems to be Solved by the Invention] Recess gate structure G
In manufacturing an aAs-MESFET, when a recess is formed by etching using a sidewall formed on a side surface of an opening of a spacer insulating film and a gate electrode is formed on the recess bottom, the following problems occur. It has been clarified by the inventor to occur.

That is, the spacer insulating film is anisotropically etched on the side surface of the spacer insulating film and left as a side wall, and the opening size of the opening is made smaller by etching using the side wall and the like as a mask. The insulating film for forming the side wall and the side wall is formed of a SiO ₂ type or SiN type material which is etched by F radicals. Therefore, during the sidewall processing, both the spacer insulating film and the insulating film for forming the sidewall are F
Since it is etched by radicals, the etching selection ratio is insufficient. As a result, side wall film side etching may occur due to the reduction of the spacer insulating film, the remaining side wall insulating film may have a different thickness, and the gate length may not be formed accurately.

In addition, a stopper layer (etching stopper) may be formed as a protective film on the semiconductor layer in order to prevent damage to the underlying semiconductor layer when processing the sidewall forming insulating film. . However, since the stopper layer is also formed of a SiN-based insulating film, it is etched by F radicals similarly to the sidewall forming insulating film, so that the etching selection ratio is insufficient. Therefore, in order to prevent damage to the underlying semiconductor layer, it is necessary to make the stopper layer thick, but if the stopper layer becomes thick, it becomes difficult to perform fine processing.

An object of the present invention is to provide a semiconductor device capable of forming a short gate length with high accuracy and a manufacturing method thereof.

[0011] The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

[0012]

The following is a brief description of an outline of typical inventions disclosed in the present application.

(1) In a semiconductor device, a step of forming an insulating film on the main surface of a semi-insulating GaAs substrate having an operating layer on the main surface, and a step of selectively etching the insulating film to form an opening A step of forming an insulating film for forming a side wall on the main surface of the substrate and then forming a side wall only on the side surface of the opening by anisotropic etching; and etching the gate formation region using the side wall and the insulating film as an etching mask. A method of manufacturing a semiconductor device, comprising the steps of: forming a recess reaching the surface layer of the operating layer; and forming a gate electrode on the bottom of the recess. (subject to F radicals dry etching) etching means (such as SiO ₂ or SiN) etchable lower insulating film, etching non middle insulating film in the first etching unit ( lN like or Al ₂ O _3), etchable upper insulating film in the first etching means (S
iO ₂ etc.) to form a spacer film, a step of selectively etching the upper insulating film and forming an opening in a gate forming region using the intermediate insulating film as an etching stopper; A step of sequentially forming a stopper insulating film (AlN or Al ₂ O ₃ or the like) that cannot be dry-etched by F radicals and a sidewall forming insulating film (SiO ₂ or the like) that can be dry-etched by F radicals on the main surface of The sidewall insulating film is etched by anisotropic dry etching of F radicals by using the stopper insulating film as an etching stopper to form sidewalls on the side surfaces of the opening through the stopper insulating film to form the recess forming opening. Forming, a step of forming a recess reaching the operating layer of the substrate by using the sidewall as an etching mask, and the recess It is produced by forming a gate electrode on top.

According to the means (1), (a) the uppermost layer of the spacer film forming the opening is not etched by the first etching means (dry etching with F radical) for etching the side wall forming insulating film. Since it is formed of a possible insulating film (AlN or Al ₂ O ₃ etc.), a substantially perfect etching selection ratio can be obtained as compared with the case of using a SiN-based material as a stopper material. Therefore, when the side wall forming insulating film is etched to form the side wall on the side surface of the opening, side wall side etching due to the reduction of the spacer film does not occur, and the dimensional variation of the recess forming opening formed by the side wall is small. The length of the gate electrode formed on the bottom of the recess is constant and the gate length is constant.

(B) Ga on the main surface of the semi-insulating GaAs substrate
Since the As layer (base semiconductor layer) is covered with the SiO ₂ film or the SiN film, the base semiconductor layer is not damaged when forming the openings or forming the sidewalls. In addition, the S
Since the iO ₂ film or the SiN film has stable interface characteristics with respect to the GaAs layer (base semiconductor layer), a semiconductor device having stable characteristics can be manufactured.

(C) In the spacer film for forming the opening, a lower insulating film made of thin SiN and a thick Si film are used.
Since the thin middle layer insulating film made of AlN is arranged between the upper layer insulating film made of O ₂ and the middle layer insulating film below the upper layer insulating film when dry etching the upper layer insulating film with F radicals. Since it acts as an etching stopper, the lower insulating film is not dry-etched by F radicals and does not damage the underlying semiconductor layer.

(D) In the spacer film for forming the opening, a lower insulating film made of thin SiN and a thick Si film are used.
Since the thin middle layer insulating film made of AlN is arranged between the upper layer insulating film made of O ₂ and the middle layer insulating film below the upper layer insulating film when dry etching the upper layer insulating film with F radicals. Acts as an etching stopper, so that the depth of the opening can be always made constant.

(E) a lower insulating film, an upper insulating film and a side wall insulating film made of SiO ₂ or SiN,
Since the intermediate insulating film and the stopper insulating film made of AlN or Al ₂ O ₃ can obtain a nearly perfect etching selection ratio in the dry etching of F radicals, the lower insulating film, the intermediate insulating film and the stopper insulating film have a thickness of several nm. ~ Number 10n
m and a thin film, and miniaturization of the recess forming opening and the recess can be achieved. Therefore, GaAs-
The MESFET portion can be miniaturized, and the semiconductor device can be miniaturized and highly integrated.

[0019]

BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In all the drawings for describing the embodiments of the present invention, components having the same functions are denoted by the same reference numerals, and their repeated description will be omitted.

(Embodiment 1) FIG. 1 is a sectional view showing an outline of a semiconductor device according to an embodiment of the present invention, and FIGS. 2 to 7 are views showing a method for manufacturing a semiconductor device according to the present embodiment. 2 is a cross-sectional view showing a state in which a three-layer spacer film is formed on the main surface of a semi-insulating GaAs substrate, and FIG. 3 is a view showing an opening formed in the gate formation region by selectively etching the upper insulating film of the spacer film. FIG. 4 is a sectional view showing a state in which a stopper insulating film and a sidewall forming insulating film are sequentially formed on the opening and the upper insulating film, and FIG. 5 is a sectional view showing the sidewall by etching the sidewall forming insulating film. FIG. 6 is a cross-sectional view showing a formed state, FIG. 6 is a cross-sectional view showing a state where a recess is formed by etching using sidewalls and the like as an etching mask, and FIG. 7 is a cross-sectional view showing a state where a gate electrode is formed on the bottom of the recess.

In this embodiment, an example in which the present invention is applied to a GaAs-MESFET incorporated in a semiconductor device will be described.

The semiconductor device of this embodiment has a semi-insulating Ga.
It is formed using the As substrate 1. Semi-insulating GaAs
The surface of the main surface of the substrate 1 is partially n-type GaAs.
A layer is formed. This GaAs layer becomes the operation layer 2.

On the main surface of the semi-insulating GaAs substrate 1, a spacer film (spacer insulating film) 10 including a lower insulating film 5, an intermediate insulating film 6 and an upper insulating film 7 is formed. The lower insulating film 5 is an insulating film having stable interface characteristics with respect to the underlying semiconductor layer (GaAs layer), and is, for example, SiO ₂ or SiN that can be etched by the first etching means (dry etching by F radical). Has been formed. The lower insulating film 5 has a thickness of several tens nm, for example. In this embodiment, the lower insulating film 5 has a thickness of 20 nm.
Of SiN.

The intermediate insulating film 6 is formed of a material that cannot be etched by the first etching means, that is, an insulating film such as AlN or Al ₂ O _{3 that} cannot be dry-etched by F radicals. The middle insulating film 6 has a thickness of several nm. In the present embodiment, the middle insulating film 6 is 5
nm of AlN.

The upper insulating film 7 is formed of an insulating film such as SiO _{2 which} can be dry-etched with F radicals.
The thickness is several 100 nm, for example 400 nm.

In the center, the upper insulating film 7 of the three-layer spacer film 10 is selectively etched to form an opening 11. The length of this opening 11 is, for example, 0.3 μm. In addition, the side surface of the upper insulating film 7 and the opening 11 and the opening 11
The bottom surface of is covered with a stopper insulating film 15. The stopper insulating film 15 is formed of AlN or Al ₂ O ₃ having a thickness of several nm which cannot be etched by the first etching means (dry etching by F radical). In this embodiment, the stopper insulating film 15 is made of AlN having a thickness of 5 nm.

A side wall 17 is formed on the side surface of the opening 11 via the stopper insulating film 15. The side wall 17 is made of SiO ₂ which is etched by the first etching means (dry etching by F radical). The side wall 17 forms a recess forming opening 20 narrower than the opening 11. The recess forming opening 20 is, for example, 0.15 μm.

The side wall 17 is formed by etching the side wall forming insulating film formed on the stopper insulating film 15 by anisotropic dry etching using F radicals. During this etching, dry etching using F radicals is performed. Since the upper insulating film 7 made of SiO ₂ that is etched by etching is formed of AlN that is not etched by dry etching using F radicals, the thickness of the upper insulating film 7 that is the spacer insulating film 10 is reduced in forming the sidewall. As a result, the height of the side wall 17 does not change, and thus the protruding length of the side wall 17 is constant, so that the length of the recess forming opening 20 is always constant.

On the other hand, the side wall 17 and the stopper insulating film 15 are used as an etching mask to etch the stopper insulating film 15, the middle insulating film 6, the lower insulating film 5, and the surface layer portion of the operating layer 2 at the bottom of the opening 11 to form the recess 21. Are formed. The length of the recess 21 is 0.15 μm, which is substantially the same as the length of the recess forming opening 20.

A gate electrode 22 having a Schottky barrier junction structure is formed on the bottom of the recess 21 over the stopper insulating film 15. This gate electrode 2
2 includes a lower layer 23 made of WSi and an upper layer 24 made of Al or Au formed on the lower layer 23.

On the other hand, the stopper insulating film 15 and the spacer film 10 on both sides separated from the gate electrode 22 are selectively etched, and ohmic electrodes serving as source electrodes or drain electrodes are formed on the exposed surfaces of the operating layer 2 and the substrate 1, respectively. 25 and 26 are provided.

Next, a method of manufacturing the semiconductor device of this embodiment will be described.

First, as shown in FIG. 2, a semi-insulating GaAs substrate 1 having a predetermined thickness is prepared. This semi-insulating GaAs
An operating layer 2 made of an n-type GaAs layer having a predetermined impurity concentration is formed on the surface layer of the main surface of the substrate 1.

Next, a base semiconductor layer (GaAs layer) is formed on the main surface of the semi-insulating GaAs substrate 1 by the CVD method.
On the other hand, the interface characteristics are stable and the thickness is several 10 nm made of SiO ₂ or SiN that can be etched by the first etching means (dry etching by F radical).
Lower insulating film 5, middle insulating film 6 with a thickness of several nm made of AlN or Al ₂ O _{3 which} cannot be etched by the first etching means (dry etching by F radical), and dry etching by F radical the thickness made of a SiO ₂ to form a spacer film (spacer insulating film) 10 of the three layers are sequentially stacked an upper insulating film 7 having 100 nm.

In this embodiment, the lower insulating film 5 is made of SiN having a thickness of 20 nm, the intermediate insulating film 6 is made of AlN having a thickness of 5 nm, and the upper insulating film 7 is made of S having a thickness of 400 nm.
It is formed of i02.

SiN is selected for the lower insulating film 5, and SiO ₂ is selected for the upper insulating film 7. These SiN
And SiO ₂ can be etched by the first etching means (dry etching by F radical). However, AlN is selected for the middle-layer insulating film 6 forming the middle layer of the spacer film 10, and is a film that cannot be etched by the first etching means. This makes SiO ₂ and SiN F
When dry etching by radicals is performed, the middle-layer insulating film 6 made of AlN is not etched at all, and the etching selection ratio is extremely large and almost perfect, so that the middle-layer insulating film 6 functions as an etching stopper. As a result, the middle-layer insulating film 6 can be made extremely thin, such as several nm, and fine processing becomes possible.

Next, as shown in FIG. 3, after the photoresist film 30 is selectively formed on the main surface side of the substrate 1, the photoresist film 30 is used as an etching mask and the intermediate insulating film 6 is used as an etching stopper. As a result, an opening 11 is formed in the gate formation region of the upper insulating film 7 by dry etching with F radicals. This opening 11
Has a length of, for example, about 0.3 μm.

Next, after the photoresist film 30 is removed, as shown in FIG. 4, the main surface of the substrate 1 is made of AlN or Al ₂ O _{3 which} cannot be dry-etched by F radicals and has a thickness of several nm. A stopper insulating film 15 and a sidewall-forming insulating film 31 having a thickness of several hundreds nm and made of SiO ₂ or the like that can be dry-etched by F radicals are continuously formed by a CVD method. In this embodiment, the stopper insulating film 15 is formed of AlN having a thickness of 5 nm.

Next, as shown in FIG. 5, the side wall forming insulating film 31 is etched by anisotropic dry etching using F radicals to form side walls 17 on the side surfaces of the opening 11. In this etching, since the stopper insulating film 15 formed of AlN, which cannot be dry-etched by F radicals, acts as an etching stopper, the depth (height) of the opening 11 does not change, and the height of the side wall 17 increases. It will be constant. As a result, the recess forming opening 20 formed by the side wall 17 also has a constant length, for example, a minute opening of 0.15 μm.

Next, as shown in FIG. 6, by using the sidewall 17 as an etching mask, an etching means different from the first etching means, for example, dry etching with Cl radicals or wet etching with hot phosphoric acid is used to form a stopper insulation made of AlN. The film 15 and the intermediate insulating film 6 are etched. Further, AlN or Al ₂ O ₃ can be processed by ion milling in the case of a thin film. Then, using the sidewall 17, the stopper insulating film 7 and the intermediate insulating film 6 as an etching mask, the lower insulating film 5 made of SiN is formed.
Is etched.

Next, the exposed surface layer portion of the operating layer 2 made of GaAs is wet-etched by a desired amount to form the recess 2.
Form one.

Since the thickness of the middle-layer insulating film 6 is 5 nm and the thickness of the lower-layer insulating film 5 is 20 nm, both of which are extremely thin and thin as a whole, the recess 21 having high length dimension accuracy can be formed. For example, the length of the recess 21 is 0.15 μm, which is the same as the length of the recess forming opening 20.
5 μm. And, as a final result, this becomes a substantially gate length.

Next, as shown in FIG. 7, a metal such as WSi having a stable interface characteristic with respect to GaAs is formed to a thickness of several 100 nm on the main surface of the substrate 1, and a low metal such as Au or Al is formed. Resistive metals are sequentially formed by vapor deposition or the like. After that, a photoresist film 33 is selectively formed on the low resistance metal, and the low resistance metal and a metal having stable interface characteristics with respect to GaAs are etched by using the photoresist film 33 as an etching mask to etch the gate electrode 2
Form 2 The gate electrode 22 is formed by a lower layer 23 made of WSi having a Schottky barrier junction structure with respect to the operating layer 2 and an upper layer 24 made of Au, Al or the like overlapping the lower layer 23.

Next, after selectively etching the stopper insulating film 15 and the spacer film 10 on both sides of the gate electrode 22, as shown in FIG.
Then, ohmic electrodes 25 and 26 to be a source electrode and a drain electrode are formed on the surface portion of the substrate 1. Further, after forming a passivation film and the like as necessary, the substrate 1 is vertically and horizontally cut to manufacture a semiconductor device incorporating a GaAs-MESFET.

In the manufacturing method of the semiconductor device of the present embodiment, the first etching means for etching the uppermost insulating film 7 of the spacer film 10 forming the opening 11 and the sidewall forming insulating film 31 ( Since it is formed of an insulating film (AlN) that cannot be etched by F radical dry etching), a complete etching selection ratio can be obtained as compared with the case where a SiN-based material is used as a stopper material. Therefore, when the side wall forming insulating film 31 is etched to form the side wall 17 on the side surface of the opening 11, side wall side etching due to the reduction of the spacer film 10 does not occur, and the recess forming opening formed by the side wall 17 is removed. The dimensional variation of 20 becomes small, the length of the gate electrode 22 formed on the recess bottom becomes constant, and the gate length becomes constant.

In the manufacturing method of the semiconductor device of this embodiment, the main surface of the semi-insulating GaAs substrate 1 is covered with the SiN film having stable interface characteristics with respect to the GaAs layer (base semiconductor layer). A semiconductor device having stable characteristics can be manufactured without damaging the underlying semiconductor layer when forming the opening or forming the sidewall.

In the manufacturing method of the semiconductor device of this embodiment, the spacer film 10 for forming the opening 11 is formed.
, The lower insulating film 5 made of thin SiN and the thick S
Since the intermediate insulating film 6 made of thin AlN is arranged between the upper insulating film 7 made of iO ₂ and the upper insulating film 7 made of SiO ₂ , when the upper insulating film 7 is dry-etched by F radical, Since the middle-layer insulating film 6 acts as an etching stopper, the lower-layer insulating film 5 is not dry-etched by F radicals and does not damage the underlying semiconductor layer.

In the manufacturing method of the semiconductor device of this embodiment, the spacer film 10 for forming the opening 11 is used.
Is a lower insulating film 5 made of thin SiN and a thick SiO ₂ film.
Since the intermediate insulating film 6 made of thin AlN is arranged between the upper insulating film 7 made of Al and the upper insulating film 7, the middle layer under the upper insulating film 7 is dry-etched by F radicals. Since the insulating film 6 acts as an etching stopper, the depth of the opening 11 can always be made constant.

In the manufacturing method of the semiconductor device of this embodiment, the lower insulating film 5 made of SiO ₂ or SiN is used.
And the upper insulating film 7 and the sidewall forming insulating film 31,
Since the middle layer insulating film 6 and the stopper insulating film 15 made of AlN or Al ₂ O _{3 and the} like have a perfect etching selection ratio to each other, the lower layer insulating film 5, the middle layer insulating film 6, and the stopper insulating film 15 have a thickness of several nm. The thickness can be reduced to several tens of nm, the recess 20 and the recess 21 can be miniaturized, the GaAs-MESFET portion can be miniaturized, and the semiconductor device can be miniaturized and highly integrated.

From the above, according to the present invention, the semiconductor device (semiconductor integrated circuit device) has a structure in which thin insulating films serving as etching stoppers are mutually used. Since the precise microfabrication is possible, the yield is improved and the manufacturing cost can be reduced.

Although the invention made by the inventor has been specifically described based on the embodiment, the invention is not limited to the above embodiment, and various modifications can be made without departing from the gist of the invention. Needless to say.

In the above description, the invention made mainly by the present inventor is the field of application which is the background of the invention.
The case where the invention is applied to the manufacturing technology of the semiconductor device incorporating the s-MESFET has been described, but the invention is not limited thereto. For example, a GaAlAs layer below the operation layer,
It can also be applied to the manufacturing technology of a semiconductor device incorporating a HEMT having a layer of a two-dimensional electron gas or the like.

The present invention can be applied to a semiconductor device incorporating an FET using at least a semi-insulating GaAs substrate and a manufacturing method thereof.

[0054]

The effects obtained by the typical ones of the inventions disclosed in the present application will be briefly described as follows.

(1) The uppermost insulating film of the spacer film that forms the opening is an insulating film (Al that cannot be dry-etched by F radicals that etches the sidewall-forming insulating film).
N), the side wall forming insulating film is etched to form a side wall on the side surface of the opening, side wall side etching due to the decrease in the spacer film does not occur, and the side wall overhang length is constant. The size variation of the recess forming opening formed by the side wall is reduced, the length of the gate electrode formed on the recess bottom is constant, and the gate length is constant. As a result, miniaturization of the GaAs-MESFET portion and miniaturization and high integration of the semiconductor device can be achieved.

(2) The main surface of the semi-insulating GaAs substrate is Ga
Si whose interface characteristics are stable with respect to the As layer (base semiconductor layer)
Since it is covered with the N film, it is possible to manufacture a semiconductor device having stable characteristics without damaging the underlying semiconductor layer when forming the opening or forming the sidewall.

(3) Since the insulating film which is etched by the first etching means and the insulating film which is not etched are incorporated, it is possible to make the insulating film thin only for the purpose of the etching stopper, so that Precise microfabrication is possible, and miniaturization of GaAs-MESFET can be achieved.

[Brief description of drawings]

FIG. 1 is a sectional view schematically showing a semiconductor device according to an embodiment of the present invention.

FIG. 2 shows a method of manufacturing a semiconductor device according to the present embodiment,
FIG. 3 is a cross-sectional view showing a state in which a three-layer spacer film is formed on the main surface of a semi-insulating GaAs substrate.

FIG. 3 shows a method of manufacturing a semiconductor device according to the present embodiment,
FIG. 6 is a cross-sectional view showing a state in which an opening is formed in a gate formation region by selectively etching an upper insulating film of a spacer film.

FIG. 4 shows a method of manufacturing a semiconductor device according to the present embodiment,
FIG. 6 is a cross-sectional view showing a state in which a stopper insulating film and a sidewall forming insulating film are sequentially formed on the opening and the upper insulating film.

FIG. 5 shows a method of manufacturing a semiconductor device according to the present embodiment,
It is sectional drawing which shows the state which formed the side wall by etching the insulating film for side wall formation.

FIG. 6 shows a method of manufacturing a semiconductor device according to the present embodiment,
FIG. 6 is a cross-sectional view showing a state in which a recess is formed by etching using side walls and the like as an etching mask.

FIG. 7 shows a method of manufacturing a semiconductor device according to the present embodiment,
It is sectional drawing which shows the state which formed the gate electrode on a recess bottom.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Substrate (semi-insulating GaAs substrate) 2 ... Operating layer, 5 ... Lower insulating film, 6 ... Middle insulating film, 7 ... Upper insulating film, 10 ... Spacer film (spacer insulating film), 11 ... Opening part, 15 ... Stopper insulating film, 17 ... Side wall, 20 ... Recess forming opening, 21 ... Recess, 22 ... Gate electrode, 23 ... Lower layer, 2
4 ... Upper layer, 25, 26 ... Ohmic electrode, 30 ... Photoresist film, 31 ... Sidewall forming insulating film, 33 ... Photoresist film.

Claims (5)

[Claims] 1. A semi-insulating GaAs substrate having at least an operating layer on its main surface, a spacer film composed of a lower insulating film, an intermediate insulating film and an upper insulating film laminated on the main surface of the substrate, and the upper insulating film. An opening formed by selectively etching the film; a stopper insulating film covering the opening and the upper insulating film; a sidewall formed on the side surface of the opening through the stopper insulating film; A recess formed by etching the bottom of the opening to a predetermined depth of the operating layer using the sidewall as an etching mask, a gate electrode formed on the recess bottom, and a stopper insulating film in each region sandwiching the gate electrode. And an ohmic electrode serving as a source / drain electrode provided on the surface of the operation layer exposed by selectively etching the spacer film below the semiconductor film. Place. 2. The lower insulating film is SiO ₂ or SiN.
The intermediate insulating film is formed of AlN or Al ₂ O ₃
The upper insulating film is formed of SiO ₂ , the stopper insulating film is formed of AlN or Al ₂ O ₃ , and the side wall forming insulating film is formed of SiO _2. Item 2. The semiconductor device according to item 2. 3. A semi-insulating GaAs having an active layer on the main surface
A step of forming an insulating film on the main surface of the substrate; a step of selectively etching the insulating film to form an opening; and an anisotropic etching after forming an insulating film for forming a side wall on the main surface of the substrate. Forming a side wall only on the side surface of the opening by etching the gate formation region using the side wall and the insulating film as an etching mask to form a recess reaching the surface layer portion of the operating layer; and the recess bottom. A method of manufacturing a semiconductor device, comprising: a step of forming a gate electrode on the substrate; a lower-layer insulating film that can be etched by the first etching means on the main surface of the substrate, and cannot be etched by the first etching means. Forming a spacer film by sequentially forming an intermediate insulating film and an upper insulating film that can be etched by the first etching means; and selectively etching the upper insulating film and Forming an opening in the gate formation region using the intermediate insulating film as an etching stopper; forming a stopper insulating film that cannot be etched by the first etching means and a sidewall that can be etched by the first etching means on the main surface of the substrate; A step of sequentially forming an insulating film for use with the stopper insulating film, and the sidewall insulating film is etched by anisotropic etching using the stopper insulating film as an etching stopper to form the stopper insulating film on the side surface of the opening. A method of manufacturing a semiconductor device, comprising: forming a side wall to form a recess forming opening; and forming a recess reaching the operating layer of the substrate by using the side wall as an etching mask. . 4. The first etching means is dry etching by F radicals, the insulating film which can be etched by the first etching means is SiO ₂ or SiN, and the insulating film which cannot be etched by the first etching means. The method for manufacturing a semiconductor device according to claim 3, wherein the film is AlN or Al ₂ O ₃ . 5. The lower insulating film is SiO ₂ or SiN.
The intermediate insulating film is formed of AlN or Al ₂ O ₃
7. The upper insulating film is formed of SiO ₂ , the stopper insulating film is formed of AlN or Al ₂ O ₃ , and the side wall forming insulating film is formed of SiO _2. 4. The method for manufacturing a semiconductor device according to 4.