JPH09306915A - Manufacture of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a high-reliability Cu wiring by lessening defects caused at forming of Cu grooves wiring by the chemical-mechanical polishing. SOLUTION: The manufacturing process comprises the steps of forming wiring groove 3 into a silicon oxide film 2 on a semiconductor substrate, depositing a TiN film 4 and Cu film 5 as a barrier metal by sputtering, filling the Cu film 5 into the wiring grooves 3 by reflow, then removing the Cu film 5, except its parts in the grooves 3 by chemical-mechanical polishing, heat- treating in a H atmosphere to lessen defects 6 in the obtained Cu wiring.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device in which wiring is formed by using chemical mechanical polishing.

[0002]

2. Description of the Related Art Conventionally, aluminum has been mainly used as a wiring material for an LSI formed on a semiconductor substrate made of silicon. In recent years, however, in order to achieve high integration and high speed of a semiconductor integrated circuit, Copper, which has lower resistance than aluminum and high electromigration (EM) resistance, has attracted attention as a wiring material.

As a conventional example of a method of manufacturing a semiconductor device using the above-mentioned wiring mainly made of copper, there is, for example, one described in Japanese Patent Laid-Open No. 6-120219. Therefore, a method for manufacturing the above-described conventional semiconductor device having copper wiring will be described below with reference to the drawings.

FIG. 2 shows a sectional view of a conventional manufacturing process of a semiconductor device, in which Cu is used as a wiring material and Cr is used as a barrier metal.

First, as shown in FIG. 2A, after depositing a silicon oxide film 2 as an insulating film on a semiconductor substrate 1,
This silicon oxide film 2 is etched to form a groove 3 in which a wiring is to be formed. Next, as shown in FIG. 2B, the groove 3
A Cr film 7 as a barrier metal and a Cu film 5 as a wiring material are sequentially laminated and formed on the entire surface of the silicon oxide film 2 including.

After that, as shown in FIG. 2C, the Cu film 5 having a recess in the region of the groove 3 is made to flow by the irradiation of the excimer laser beam to flatten the surface of the Cu film 5. Then, the CMP method (chemical mechanical polishing: Chemica
1 Mechanical Polishing) to remove the Cu film 5 and the Cr film 7 in a portion other than the region of the groove 3 and finally deposit a silicon nitride film 8 on the entire surface to form a semiconductor as shown in FIG. Complete the device.

[0007]

However, in the conventional structure as described above, when polishing the wiring material (Cu) and the barrier metal (Cr) other than the groove by the chemical mechanical polishing, the polishing in the polishing solution (slurry) is performed. There is a problem that particles (for example, particles of alumina or silica) cause defects in the Cu film in the groove and deteriorate the reliability of wiring (specifically, electromigration resistance and the like). The above defects are, for example, 0.1 to 0.
Examples include scratches having a size of 5 μm.

The above problems are unavoidable as long as the particles are used for polishing. Particularly, as represented by copper, aluminum, etc., it is more difficult than polishing particles in a polishing solution used for chemical mechanical polishing. Is a significant problem when using a fairly soft conductive material. Considering further miniaturization of wirings in the future, even a slight wiring defect is expected to significantly deteriorate reliability.

Therefore, in view of the above problems, the present invention has an object to improve reliability of a wiring formed by chemical mechanical polishing.

[0010]

In order to achieve the above object, the present invention reduces the defects on the metal surface formed by chemical mechanical polishing by heat treatment in a reducing atmosphere.

Specifically, the solution means taken by the invention of claim 1 is a method of manufacturing a semiconductor device, which comprises a step of forming an insulating film on a semiconductor substrate, a step of forming an opening in the insulating film, A step of forming a conductive film on the insulating film including the inside of the opening, a step of removing the conductive film except the inside of the opening by chemical mechanical polishing using abrasive particles harder than the conductive film, and then a reducing atmosphere And a step of performing heat treatment therein.

According to a second aspect of the present invention, there is provided a method of manufacturing a semiconductor device, including the steps of forming an insulating film on a semiconductor substrate, forming a groove having a wiring pattern in the insulating film, and including the inside of the groove. A step of forming a barrier film on the insulating film; a step of depositing a conductive film on the barrier film to fill the groove; and a step of chemical mechanical polishing using abrasive particles harder than the conductive film in the groove. It is configured to include a step of removing the conductive film other than the above, and a step of performing heat treatment in a reducing atmosphere thereafter.

Further, the solution means taken by the invention of claim 3 is characterized in that the heat treatment temperature in a reducing atmosphere is higher than or equal to the deposition temperature of the conductive film or the treatment temperature after the deposition. is there.

Further, a solution means taken by the invention of claim 4 is characterized in that the conductive film is copper or a copper alloy.

According to the structure of claim 1 or 2, the conductive film and the barrier film formed on the insulating film in the groove having the wiring pattern or in the diffusion layer and the opening reaching the wiring layer are chemically mechanically polished. At that time, defects generated on the surface of the conductive film are reduced by heat treatment in a reducing atmosphere. When wiring or electrodes are formed while leaving defects caused by chemical mechanical polishing as in the past, the reliability is adversely affected, but by reducing the defects by recrystallization during heat treatment, the reliability of the wiring and electrode parts is reduced. It is possible to improve the sex.

[0016]

DESCRIPTION OF THE PREFERRED EMBODIMENTS A method of manufacturing a semiconductor device according to an embodiment of the present invention will be described below with reference to the drawings. In the present embodiment, the case where the wiring material in which the effect of the present invention is most exhibited is Cu will be described as an example.

FIG. 1 is a process sectional view of a method for manufacturing a semiconductor device according to an embodiment of the present invention. In FIG. 1, 1 is a semiconductor substrate, 2 is a silicon oxide film as an insulating film, and 3 is a semiconductor substrate. Is a groove as an opening for forming a wiring pattern, 4 is a titanium nitride (TiN) film as a barrier metal (barrier film), 5 is a copper (Cu) wiring, and 6 is a defect caused by polishing. .

Therefore, a method of manufacturing the semiconductor device according to the present embodiment will be described in detail below with reference to FIGS.

First, as shown in FIG. 1A, a semiconductor substrate 1 is formed of silicon or the like, and on which are formed respective elements (not shown) constituting an LSI such as a transistor element and a capacitive element. A silicon oxide film 2 as an insulating film is formed on the silicon oxide film 2, and then the silicon oxide film 2 is etched to form a groove 3 having a wiring pattern for forming a desired wiring in the silicon oxide film 2.

Next, as shown in FIG. 1B, a TiN film 4 having a film thickness of about 20 nm is deposited as a barrier metal by CVD.
Then, a Cu film of about 0.8 μm is deposited by the sputtering method. At this time, as shown in the drawing, the groove 3 is not completely filled with Cu. Therefore, the semiconductor device shown in FIG. 1B is subjected to a heat treatment of heating at 400 ° C. for 15 minutes in a hydrogen atmosphere using a heat treatment furnace with a load lock, thereby wiring the Cu film 5. Fill the groove 3 (Fig. 1
(C)).

In the present embodiment, the TiN film deposited by the CVD method is used as the barrier layer of the Cu wiring as described above, but the TiN film is not necessarily a TiN film and may be 300 ° C. to 600 ° C. Any film may be used as long as Cu does not diffuse into the silicon oxide film even by the heat treatment, and examples thereof include a silicon nitride film using plasma CVD, and tungsten and aluminum formed only on the Cu film by using selective CVD. Further, in the above case, since Cu is buried in the groove by the sputtering method, it is necessary to flow Cu for flattening by subsequent heat treatment with a load lock.
If the wiring material can be embedded by the method, the subsequent heat treatment is not always necessary.

Next, as shown in FIG. 1D, the Cu film 5 and the TiN film 4 other than inside the wiring groove 3 are formed by chemical mechanical polishing.
Is removed to form a Cu groove wiring. After that, a cleaning process for removing the polishing liquid, polishing particles, and the like remaining on the substrate is performed. As shown in FIG. 1D, after chemical mechanical polishing, polishing in the polishing liquid (slurry) is performed. Since particles cause defects on the surface of the Cu wiring, if the wiring having the defects is left as it is, the reliability of the Cu wiring deteriorates.

Therefore, in the present invention, in order to reduce the above defects, the semiconductor device in the state shown in FIG.
The heat treatment furnace with a load lock is used again to perform heat treatment at 430 ° C. for 15 minutes in a hydrogen atmosphere to reduce defects on the surface of the wiring of the Cu film 5 (FIG. 1E).

As described above, in the step shown in FIG. 1 (e), the heat treatment furnace with a load lock is used because the surface of the Cu film is thermally oxidized by the entrainment of air when the wafer is inserted into the furnace. This is to prevent this. Further, the heat treatment is performed in a hydrogen atmosphere in order to reduce the natural oxide film formed on the Cu surface and to easily reduce defects in the Cu film. However, in the present embodiment, as described above, the Cu film is not always required. It is not necessary to perform the heat treatment for reducing defects formed on the film surface in a hydrogen atmosphere, and an atmosphere containing hydrogen or an ammonia gas is included as long as it can reduce the natural oxide film formed on the Cu film surface. Atmosphere is okay.

In the present embodiment, as described above, a temperature higher than the temperature during the heat treatment before the planarization by chemical mechanical polishing (in other words, the heat treatment for filling the groove having the wiring pattern). In this way, heat treatment is performed to reduce the defects generated during chemical mechanical polishing. In this way, the defect recovery is performed at the temperature at the time of copper deposition or at a temperature higher than the heat treatment temperature for filling trenches with wiring patterns. If the heat treatment for this purpose is performed, the crystallinity of the embedded wiring material such as Cu is further improved, and the effect of the present invention is enhanced.

In the present embodiment, a heat treatment furnace with a load lock is used for the heat treatment in a reducing atmosphere for reducing defects formed on the Cu film surface, but a thermal oxide film is not formed on the Cu film surface. If it is such a method, RTA
It is also possible to use a vacuum chamber equipped with a (Rapid Thermal Anneal) device and a heating mechanism.

Further, in this embodiment, C is filled by filling Cu into the groove having the wiring pattern and performing chemical mechanical polishing.
Although the u wiring is formed, the present invention is not necessarily applicable only to the one in which the Cu wiring is embedded in the groove formed in the insulating film, and the metal is formed in the opening reaching the diffusion layer or the wiring layer on the semiconductor substrate. It goes without saying that it is also effective when forming electrodes. To give a specific example, for example, select CV for contact holes and through holes.
When a metal such as Al, W, or Cu is grown by the D method to remove the metal overflowing from the holes, or Cu-Ti is used as a material for the buried wiring in the groove in the above-described embodiment.
This is the case when using a metal softer than the abrasive particles used for chemical mechanical polishing such as Cu, other Cu alloys, aluminum and its alloys. Of the above, when Al or the like is used as the wiring material, it is not always necessary to form the barrier metal, and the present invention provides a conductive film embedded in a groove formed by etching an insulating film such as a silicon oxide film. It can be applied to all cases where a film is planarized by chemical mechanical polishing.

Furthermore, in the present embodiment, the heat treatment furnace with a load lock is used again to perform heat treatment in a hydrogen atmosphere to reduce defects on the surface of Cu wiring.
When a barrier metal is formed again on the embedded wiring, for example, when u is used as a wiring material, heat treatment for reducing defects in a reducing atmosphere in the barrier film deposition apparatus before the barrier film is deposited. By performing the above, it is possible to more efficiently reduce the defects generated during the chemical mechanical polishing.

[0029]

As described above, according to the present invention, a Cu groove wiring having high reliability is formed by improving defects of the Cu wiring when the Cu groove wiring is formed by chemical mechanical polishing by heat treatment in a hydrogen atmosphere. be able to.

[Brief description of drawings]

FIG. 1 is a sectional view of a manufacturing process of a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a sectional view of a conventional semiconductor device manufacturing process.

[Explanation of symbols]

 1 semiconductor substrate 2 silicon oxide film 3 groove having wiring pattern 4 titanium nitride (TiN) film 5 copper (Cu) film 6 defects caused by polishing 7 chromium (Cr) film 8 silicon nitride film

Claims (4)

[Claims] A step of forming an insulating film on a semiconductor substrate;
A step of forming an opening in the insulating film; a step of forming a conductive film on the insulating film including the inside of the opening; and a step other than the inside of the opening by chemical mechanical polishing using abrasive particles harder than the conductive film. A method of manufacturing a semiconductor device, comprising: a step of removing the conductive film; and a step of subsequently performing heat treatment in a reducing atmosphere. 2. A step of forming an insulating film on a semiconductor substrate,
Forming a groove having a wiring pattern in the insulating film, forming a barrier film on the insulating film including the inside of the groove, and depositing a conductive film on the barrier film to fill the inside of the groove A method for manufacturing a semiconductor device, which comprises a step, a step of removing the conductive film other than in the groove by chemical mechanical polishing using abrasive particles harder than the conductive film, and a step of performing heat treatment in a reducing atmosphere thereafter. . 3. The method of manufacturing a semiconductor device according to claim 1, wherein the heat treatment temperature in the reducing atmosphere is equal to or higher than the deposition temperature of the conductive film or the processing temperature after deposition. 4. The method of manufacturing a semiconductor device according to claim 1, wherein the conductive film is copper or a copper alloy.