JPH09298407A - Microstrip line - Google Patents

Microstrip line

Info

Publication number
JPH09298407A
JPH09298407A JP8113502A JP11350296A JPH09298407A JP H09298407 A JPH09298407 A JP H09298407A JP 8113502 A JP8113502 A JP 8113502A JP 11350296 A JP11350296 A JP 11350296A JP H09298407 A JPH09298407 A JP H09298407A
Authority
JP
Japan
Prior art keywords
microstrip
dielectric
dielectric substrate
thin film
board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8113502A
Other languages
Japanese (ja)
Inventor
Takahiro Asano
貴弘 浅野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP8113502A priority Critical patent/JPH09298407A/en
Publication of JPH09298407A publication Critical patent/JPH09298407A/en
Pending legal-status Critical Current

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  • Non-Reversible Transmitting Devices (AREA)
  • Waveguides (AREA)

Abstract

PROBLEM TO BE SOLVED: To reduce the passing loss by forming a conductor thin film with a cavity corresponding to the location of a microstrip on the rear side of a microstrip dielectric board and fixing a ground metallic conductor to the conductor thin film. SOLUTION: A part of a rear conductor thin film 5 formed in advance by vapor-deposition or the like on the rear side of a dielectric board 2 where a microstrip 1 is placed on the front and corresponding to the microstrip 1 is exfoliated or removed in advance in the case of forming a pattern of the board. Thus, in the case of soldering or screw-fastening the dielectric board 2 and a ground metallic conductor 4, a cavity layer 3 is formed between the dielectric board 2 and the round metallic conductor 4 corresponding to the board 2. Through the constitution above, even when a dielectric board whose dielectric constant is high is in use, since the dielectric constant of the cavity layer is '1', the combined dielectric constant is nearly '1', the wavelength reduction rate of the circuit is increased, and a transmission loss of the microstrip line is as small as that formed on a dielectric board whose dielectric is nearly '1'.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は、マイクロ波集積回
路を構成する高周波伝送線路であるマイクロストリップ
ラインにおいて、通過損失量を低滅することを可能とし
た改良技術に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an improved technique capable of reducing the amount of passage loss in a microstrip line which is a high frequency transmission line constituting a microwave integrated circuit.

【0002】[0002]

【従来の技術】マイクロストリップラインにおける通過
損失量を低滅する従来技術について、実開昭63−14
7003号公報に記載の技術に基づいて説明する。
2. Description of the Related Art A conventional technique for reducing the amount of passage loss in a microstrip line is disclosed in Japanese Utility Model Laid-Open No. 63-14.
Description will be made based on the technique described in Japanese Patent Publication No. 7003.

【0003】図2は、従来のマイクロストリップライン
の一実施例の構成を示す断面図である。同図において、
11は高周波伝送線路であるマイクロストリップ、12
はマイクロストリップ11が配線された誘電体基板、1
3はマイクロストリップ11が位置する誘電体基板12
の裏面側に形成された空洞層、14は帯電を大地に逃す
接地用金属導体、16は誘電体基板12の裏面から一定
間隔を置いて接地用金属導体14を配置するためのスペ
ーサで、その一部が欠けて空洞層13を形成している。
FIG. 2 is a sectional view showing the structure of an embodiment of a conventional microstrip line. In the figure,
11 is a microstrip which is a high-frequency transmission line, 12
Is a dielectric substrate on which the microstrip 11 is wired, 1
3 is a dielectric substrate 12 on which the microstrip 11 is located
Is a cavity layer formed on the back surface side of the substrate, 14 is a grounding metal conductor for releasing the charge to the ground, and 16 is a spacer for arranging the grounding metal conductor 14 at a constant distance from the back surface of the dielectric substrate 12, A part is chipped off to form the cavity layer 13.

【0004】つぎに通過損失量を低滅の作用について説
明すると、マイクロストリップ11が配線された誘電体
基板12と接地用金属導体14の間にスペーサ16を介
して空洞層13が設けられ、誘電体12の一部として空
気を利用することで、誘電体損失を低減している。
Next, the effect of reducing the amount of passage loss will be described. A cavity layer 13 is provided between a dielectric substrate 12 on which the microstrip 11 is wired and a grounding metal conductor 14 with a spacer 16 interposed therebetween. Utilizing air as part of body 12 reduces dielectric loss.

【0005】[0005]

【発明が解決しようとする課題】上述した従来のマイク
ロストリップラインでは、次のような問題点がある。
The above-mentioned conventional microstrip line has the following problems.

【0006】第1の問題点は、マイクロストリップライ
ンの形状が厚くなるという点である。その理由は、誘電
体基板下の空洞を確保するために、基板と接地用金属導
体との間にスペーサを介していたためである。
The first problem is that the shape of the microstrip line becomes thick. The reason is that a spacer is provided between the substrate and the grounding metal conductor in order to secure a cavity under the dielectric substrate.

【0007】第2の問題点は、従来の方法では、誘電体
基板下の空洞を確実に確保できているかどうかを確認で
きないという点である。その理由は、マイクロストリッ
プ下に、丁度空洞が出来るように上記スペ−サの位置を
設定するのは、基板で隠れてしまうために困難であるか
らである。
The second problem is that the conventional method cannot confirm whether or not the cavity under the dielectric substrate can be surely secured. The reason is that it is difficult to set the position of the spacer so that a cavity is just formed under the microstrip because it is hidden by the substrate.

【0008】本発明は、従来技術の上記問題点に鑑み、
マイクロ波集積回路を構成する高周波伝送線路であるマ
イクロストリップラインにおいて、通過損失量を容易に
低減し、かつ薄型化しその作製の容易化を図ることを目
的とする。
The present invention has been made in view of the above problems of the prior art.
An object of the present invention is to easily reduce the amount of passage loss and make it thin to facilitate the manufacture of a microstrip line which is a high-frequency transmission line constituting a microwave integrated circuit.

【0009】[0009]

【課題を解決するための手段】本発明は、上記の問題を
解決するために、マイクロストリップラインとして、高
周波伝送線路であるマイクロストリップが配線された誘
電体基板の裏面側に前記マイクロストリップが位置する
対応部分を欠いた空洞を有する導体薄膜を固定し、導体
薄膜に接地用金属導体を固定したことを特徴とするもの
であり、これにより誘電体基板とそれに対向する接地用
金属導体との間に空洞層が形成されることで、誘電率が
高い誘電体基板を使用しても、誘電率が異なる物質が直
列に接続されたときの合成誘電率は、εε’/(ε十
ε’)で表すことが出来るので、空洞層の誘電率ε=1
を考えれば、誘電体基板の誘電率にかかわらず、合成誘
電率はほぼ1となる。従って、本技術により、回路の波
長短縮率を大きくすることが出来るので単位長さあたり
の電気長が短くなり、そのため回路の通過損失も低減す
ることが出来る。
In order to solve the above problems, the present invention provides a microstrip line, wherein the microstrip is located on the back surface side of a dielectric substrate on which a microstrip which is a high frequency transmission line is wired. It is characterized in that a conductor thin film having a cavity lacking a corresponding portion is fixed, and a grounding metal conductor is fixed to the conductor thin film, whereby a gap between the dielectric substrate and the grounding metal conductor facing it is fixed. Even if a dielectric substrate with a high permittivity is used, the combined permittivity when substances with different permittivities are connected in series will be εε '/ (ε + ε') even if a dielectric substrate with a high permittivity is used. The dielectric constant of the cavity layer ε = 1
Considering the above, the combined permittivity is almost 1 regardless of the permittivity of the dielectric substrate. Therefore, according to the present technology, the wavelength shortening rate of the circuit can be increased, so that the electrical length per unit length is shortened, and thus the passage loss of the circuit can be reduced.

【0010】加えて、誘電体基板とそれに対向する接地
用金属導体との間に設けられた空洞層を形成するための
手段としてスペーサを介さず、マイクロストリップが位
置する誘電体基板の裏面の導体薄膜を無くすことで、そ
の空洞層の厚みはわずか数μmで済み、マイクロストリ
ップラインの形状を薄くすることを可能にした。
In addition, as a means for forming a cavity layer provided between the dielectric substrate and the grounding metal conductor facing the dielectric substrate, a conductor on the back surface of the dielectric substrate on which the microstrip is located without using a spacer. By eliminating the thin film, the thickness of the cavity layer was only a few μm, making it possible to reduce the shape of the microstrip line.

【0011】[0011]

【発明の実施の形態】本発明、マイクロストリップライ
ンの実施の形態としては、高周波伝送線路であるマイク
ロストリップが配線された誘電体基板の裏面に前記マイ
クロストリップが位置する対応部分を欠いた空洞を有す
る導体薄膜を固定し、さらに導体薄膜に接地用金属導体
を固定するものである。
BEST MODE FOR CARRYING OUT THE INVENTION As an embodiment of the present invention, a microstrip line has a cavity in which a corresponding portion where the microstrip is located is lacked on the back surface of a dielectric substrate on which the microstrip which is a high frequency transmission line is wired. The conductor thin film which it has is fixed, and also the metal conductor for grounding is fixed to the conductor thin film.

【0012】[0012]

【実施例】次に、本発明の実施例について図面を参照し
て詳細に説明する。図1は本発明のマイクロストリップ
ラインの一実施例の構成を示す断面図である。同図にお
いて、1は高周波伝送線路であるマイクロストリップ、
2はマイクロストリップ1が配線された誘電体基板、3
はマイクロストリップ1が位置する誘電体基板2の裏面
側に形成された空洞層で、裏面導体薄膜5の対応部分を
基板のパターン形成の際に予め剥離もしくは除去してお
く。4は帯電を大地に逃す接地用金属導体、5は誘電体
基板2の裏面に接地用金属導体4を接着し易くするため
の裏面導体薄膜で、基板のパターン形成の際、あらかじ
め蒸着などで形成される。
Next, embodiments of the present invention will be described in detail with reference to the drawings. FIG. 1 is a sectional view showing the structure of an embodiment of the microstrip line of the present invention. In the figure, 1 is a microstrip, which is a high-frequency transmission line,
2 is a dielectric substrate on which the microstrip 1 is wired, 3
Is a cavity layer formed on the back surface side of the dielectric substrate 2 on which the microstrip 1 is located, and the corresponding portion of the back surface conductor thin film 5 is peeled or removed in advance when patterning the substrate. Reference numeral 4 denotes a grounding metal conductor that allows the electrostatic charge to escape to the ground, and 5 denotes a back surface conductor thin film for facilitating adhesion of the grounding metal conductor 4 to the back surface of the dielectric substrate 2, which is formed in advance by vapor deposition or the like when forming a pattern on the substrate. To be done.

【0013】つぎに上記構成による作用について説明す
ると、マイクロストリップ1が位置する誘電体基板2の
裏面導体薄膜5には、基板のパターン形成の際、あらか
じめ剥離もしくは除去されており、誘電体基板2と接地
用金属導体5を半田付けもしくはネジ止めしたときに、
誘電体基板2とそれに対向する接地用金属導体5との間
に空洞層3が形成される。
Next, the operation of the above structure will be described. The back surface conductor thin film 5 of the dielectric substrate 2 on which the microstrip 1 is located has been peeled or removed in advance when the pattern of the substrate is formed. When soldering and the metal conductor 5 for grounding or screwing,
The cavity layer 3 is formed between the dielectric substrate 2 and the grounding metal conductor 5 facing it.

【0014】この構成によれば、誘電率が異なる物質が
直列に接続されたときの合成誘電率は、εε’/(ε十
ε’)で表すことが出来るので、誘電率が高い誘電体基
板を使用しても、空洞層の誘電率ε=1を考えれば、合
成誘電率はほぼ1となる。従って、本技術により、回路
の波長短縮率を大きくすることが出来るので単位長さあ
たりの電気長が短くなり、マイクロストリップライン
は、誘電率がほぼ1の誘電体基板上に形成したものと同
じ少ない通過損失量で済む。
According to this structure, since the combined permittivity when substances having different permittivities are connected in series can be represented by εε '/ (ε-10ε'), a dielectric substrate having a high permittivity. Even if is used, the combined permittivity is almost 1 when the permittivity ε of the cavity layer is taken into consideration. Therefore, according to the present technology, the wavelength shortening rate of the circuit can be increased, so that the electrical length per unit length is shortened, and the microstrip line is the same as that formed on a dielectric substrate having a dielectric constant of about 1. Only a small amount of passage loss is required.

【0015】また、誘電体基板とそれに対向する接地用
金属導体との間に設けられた空洞層を形成するための手
段としてスペーサを介さず、マイクロストリップが位置
する誘電体基板の裏面の導体薄膜を無くす方法を採った
ために、その空洞層の厚みはわずか数μmで形成でき
る。
Also, as a means for forming a cavity layer provided between the dielectric substrate and the grounding metal conductor facing the dielectric substrate, a conductor thin film on the back surface of the dielectric substrate on which the microstrip is located without using a spacer. Since the cavity is removed, the cavity layer can be formed with a thickness of only a few μm.

【0016】さらに、空洞層を形成するための手段とし
て位置設定が困難なスペーサの代わりに、誘電体基板の
裏面の導体薄膜を無くす方法を採ったため、位置設定が
不要となった。
Further, as a means for forming the cavity layer, a method of eliminating the conductive thin film on the back surface of the dielectric substrate was adopted instead of the spacer, which is difficult to set the position, so that the position setting became unnecessary.

【0017】[0017]

【発明の効果】本発明の構成によれば、まず、誘電率が
高い誘電体基板を使用しても、通過損失を低減すること
が出来る。また、マイクロストリップラインの形状を薄
くすることを可能にしたことである。さらに、誘電体基
板下の空洞層を確実に確保することを容易にし作製が容
易になるという点である。
According to the structure of the present invention, first, the passage loss can be reduced even if a dielectric substrate having a high dielectric constant is used. It is also possible to make the shape of the microstrip line thin. Further, it is easy to surely secure the cavity layer under the dielectric substrate and the production is easy.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明のマイクロストリップラインの一実施例
の構成を示す断面図
FIG. 1 is a sectional view showing the configuration of an embodiment of a microstrip line of the present invention.

【図2】従来のマイクロストリップラインの一実施例の
構成を示す断面図
FIG. 2 is a cross-sectional view showing the configuration of an example of a conventional microstrip line.

【符号の説明】[Explanation of symbols]

1、11 マイクロストリップ 2、12 誘電体基板 3、13 空洞層 4、14 接地用金属導体 5 裏面導体薄膜 16 スペ−サ 1, 11 Microstrip 2, 12 Dielectric substrate 3, 13 Cavity layer 4, 14 Grounding metal conductor 5 Back conductor thin film 16 Spacer

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 高周波伝送線路であるマイクロストリッ
プが配線された誘電体基板と、前記誘電体基板の裏面側
に固定され前記マイクロストリップが位置する対応部分
を欠いた空洞を有する導体薄膜と、前記導体薄膜に固定
された接地用金属導体とを有することを特徴とするマイ
クロストリップライン。
1. A dielectric substrate on which a microstrip, which is a high-frequency transmission line, is wired, a conductor thin film having a cavity fixed to the back surface of the dielectric substrate and lacking a corresponding portion where the microstrip is located, A microstrip line comprising a grounding metal conductor fixed to a conductor thin film.
【請求項2】 誘電体基板の裏面側に固定される導体薄
膜のマイクロストリップが位置する対応部分を欠いた空
洞は、誘電体基板のパターン形成の際に予め形成される
ことを特徴とする請求項1記載のマイクロストリップラ
イン。
2. A cavity lacking a corresponding portion where a microstrip of a conductive thin film fixed to the back surface side of the dielectric substrate is located is formed in advance when forming a pattern on the dielectric substrate. Item 1. The microstrip line according to Item 1.
JP8113502A 1996-05-08 1996-05-08 Microstrip line Pending JPH09298407A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8113502A JPH09298407A (en) 1996-05-08 1996-05-08 Microstrip line

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8113502A JPH09298407A (en) 1996-05-08 1996-05-08 Microstrip line

Publications (1)

Publication Number Publication Date
JPH09298407A true JPH09298407A (en) 1997-11-18

Family

ID=14613956

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8113502A Pending JPH09298407A (en) 1996-05-08 1996-05-08 Microstrip line

Country Status (1)

Country Link
JP (1) JPH09298407A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1126542A1 (en) * 2000-02-15 2001-08-22 Matsushita Electric Industrial Co., Ltd. Microstrip line and microwave device using the same
US6800929B1 (en) 1998-07-14 2004-10-05 Matsushita Electric Industrial Co., Ltd. Semiconductor device
RU2713917C1 (en) * 2019-09-25 2020-02-11 Акционерное общество "Российская корпорация ракетно-космического приборостроения и информационных систем" (АО "Российские космические системы") Microwave switching board from high-resistance silicon on a metal base
JPWO2022114205A1 (en) * 2020-11-30 2022-06-02

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6800929B1 (en) 1998-07-14 2004-10-05 Matsushita Electric Industrial Co., Ltd. Semiconductor device
EP1126542A1 (en) * 2000-02-15 2001-08-22 Matsushita Electric Industrial Co., Ltd. Microstrip line and microwave device using the same
US6445345B1 (en) 2000-02-15 2002-09-03 Matsushita Electric Industrial Co., Ltd. Microstrip line and microwave device using the same
RU2713917C1 (en) * 2019-09-25 2020-02-11 Акционерное общество "Российская корпорация ракетно-космического приборостроения и информационных систем" (АО "Российские космические системы") Microwave switching board from high-resistance silicon on a metal base
JPWO2022114205A1 (en) * 2020-11-30 2022-06-02
WO2022114205A1 (en) * 2020-11-30 2022-06-02 株式会社村田製作所 Multilayered substrate and electronic device

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