JPH09297626A - Reference voltage source circuit and voltage feedback circuit - Google Patents
Reference voltage source circuit and voltage feedback circuitInfo
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- JPH09297626A JPH09297626A JP9036568A JP3656897A JPH09297626A JP H09297626 A JPH09297626 A JP H09297626A JP 9036568 A JP9036568 A JP 9036568A JP 3656897 A JP3656897 A JP 3656897A JP H09297626 A JPH09297626 A JP H09297626A
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- reference voltage
- voltage
- circuit
- current
- source
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Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、基準電圧源回路及
び半導体回路に関し、特に、その動作開始（スタートア
ップ）を誤動作点で安定させず、正常動作点で安定させ
るものの改良に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a reference voltage source circuit and a semiconductor circuit, and more particularly, to an improvement in stabilizing the operation start (start-up) at a normal operation point without stabilizing it at a malfunction point.
【０００２】[0002]
【従来の技術】基準電圧源回路は、温度変化や回路の電
源電圧変化によらず一定の基準電圧を発生する回路であ
り、従来、種々の回路が考案されている。その中で最も
一般的に広く使用されている基準電圧源回路について、
図１３を用いて説明する。2. Description of the Related Art A reference voltage source circuit is a circuit for generating a constant reference voltage irrespective of temperature changes and circuit power supply voltage changes, and various circuits have been devised conventionally. Of the most commonly used reference voltage source circuit among them,
This will be described with reference to FIG.
【０００３】同図において、７は電流源、１０２ａは第
１基準電圧発生回路であって、抵抗素子８とダイオード
素子１１とから成る。１０２ｂは第２基準電圧発生回路
であって、２個の抵抗素子９、１０とダイオード素子１
２とから成る。この両基準電圧発生回路１０２ａ、１０
２ｂは、基準電圧出力端子１０２out を共有し、この端
子１０２out に基準電圧を発生する。１０３は演算増幅
器であって、差動増幅回路１０１及び反転増幅器６を有
する。前記差動増幅回路１０１は、電流源１と、２個の
ＰＭＯＳトランジスタ２、３と、２個のＮＭＯＳトラン
ジスタ４、５とを備える。１１０はインバータであっ
て、ＰＭＯＳトランジスタ５３と、ＮＭＯＳトランジス
タ５４とを有する。２３は電圧制御スイッチであって、
前記インバータ１１０からの出力を受けて、電源電圧を
前記基準電圧出力端子１０２out に供給する。In the figure, 7 is a current source, and 102a is a first reference voltage generating circuit, which comprises a resistance element 8 and a diode element 11. 102b is a second reference voltage generation circuit, which includes two resistance elements 9 and 10 and a diode element 1.
It consists of 2. Both of the reference voltage generating circuits 102a and 10
2b shares a reference voltage output terminal 102out and generates a reference voltage at this terminal 102out. An operational amplifier 103 has a differential amplifier circuit 101 and an inverting amplifier 6. The differential amplifier circuit 101 includes a current source 1, two PMOS transistors 2 and 3, and two NMOS transistors 4 and 5. An inverter 110 has a PMOS transistor 53 and an NMOS transistor 54. 23 is a voltage control switch,
Upon receiving the output from the inverter 110, the power supply voltage is supplied to the reference voltage output terminal 102out.
【０００４】ここで、ＰＭＯＳトランジスタ２のゲート
端子に入力される電圧をＶ１とし、ＰＭＯＳトランジス
タ３のゲート端子に入力される電圧をＶ２とし、基準電
圧出力端子１０２out に発生する基準電圧をＶｏｕｔと
する。ダイオード素子１１、１２の逆方向飽和電流を各
々Ｉｓ１、Ｉｓ２、流れる電流値を各々Ｉ１、Ｉ２、抵
抗素子８〜１０の抵抗を各々Ｒ１、Ｒ１、Ｒ２とすれ
ば、電圧Ｖｏｕｔ、Ｖ１、Ｖ２の関係は、以下のように
表現される。Here, the voltage input to the gate terminal of the PMOS transistor 2 is V1, the voltage input to the gate terminal of the PMOS transistor 3 is V2, and the reference voltage generated at the reference voltage output terminal 102out is Vout. . If the reverse saturation currents of the diode elements 11 and 12 are Is1 and Is2, the flowing current values are I1 and I2, and the resistances of the resistance elements 8 to 10 are R1, R1 and R2, respectively, the voltages Vout, V1 and V2 are calculated. The relationship is expressed as follows.
【０００５】 Ｉ１=Iｓ１（ｅ（Ｖ１／ｎＶｔ）−１） Ｉ２=Iｓ２（ｅ（Ｖｄ／ｎＶｔ）−１） （Ｖｄはダイオード１２の電圧である） Ｖ２＝Ｒ２＊Ｉ２＋Ｖｄ また、演算増幅器１０３は入力電圧Ｖ１、Ｖ２が互いに
等しくなるように電流源７にフィードバック電圧を発生
させて、基準電圧Ｖｏｕｔを決定するから、Ｖ１＝Ｖ２
又は Ｉ１＊Ｒ１＝Ｉ２＊Ｒ２ より、Ｉ１＝Ｉ２と
なる。従って、これ等の式から、基準電圧出力端子１０
２out から発生する基準電圧Ｖｏｕｔは、以下のように
計算できる。I1 = Is1 (e (V1 / nVt) −1) I2 = Is2 (e (Vd / nVt) −1) (Vd is the voltage of the diode 12) V2 = R2 * I2 + Vd Further, the operational amplifier 103 is Since the feedback voltage is generated in the current source 7 so that the input voltages V1 and V2 are equal to each other and the reference voltage Vout is determined, V1 = V2
Or, from I1 * R1 = I2 * R2, I1 = I2. Therefore, from these equations, the reference voltage output terminal 10
The reference voltage Vout generated from 2out can be calculated as follows.
【０００６】 Ｖｏｕｔ＝nVt ＊log(nVt ＊log(Is2/ Is1)/R2/Is1+1) ＋R1/R2 ＊nVt ＊log(Is2/ Is1) …（１） すなわち、基準電圧Ｖｏｕｔを表す項には電源電圧を表
す項が現れないため、基準電圧Ｖｏｕｔは電源電圧とは
無関係に決定される。また、前記（１）式の右辺の第１
項 nVt＊log(nVt ＊log(Is2/Is1)/R2/Is1+1)と、第２項
R1/R2＊nVt ＊log(Is2/Is1)との温度係数の極性が逆に
なるため、Ｒ１／Ｒ２を適切に選ぶことにより、温度変
化に対しても変動しない基準電圧Ｖｏｕｔを発生するこ
とができる。Vout = nVt * log (nVt * log (Is2 / Is1) / R2 / Is1 + 1) + R1 / R2 * nVt * log (Is2 / Is1) (1) That is, the term representing the reference voltage Vout is Since the term indicating the power supply voltage does not appear, the reference voltage Vout is determined regardless of the power supply voltage. In addition, the first side of the right side of the equation (1)
The term nVt * log (nVt * log (Is2 / Is1) / R2 / Is1 + 1) and the second term
Since the polarities of the temperature coefficient with R1 / R2 * nVt * log (Is2 / Is1) are opposite, it is possible to generate the reference voltage Vout that does not fluctuate with temperature changes by selecting R1 / R2 appropriately. it can.
【０００７】しかし、この従来の基準電圧源回路には、
２つの直流安定点が存在するという問題点がある。以
下、この問題点を説明する。However, in this conventional reference voltage source circuit,
There is a problem that there are two DC stable points. Hereinafter, this problem will be described.
【０００８】図８（ａ）に、基準電圧Ｖｏｕｔと入力電
圧Ｖ１、Ｖ２との関係を示す。同図から判るように、電
圧Ｖ１＝Ｖ２となる点は前記（１）式で示した基準電圧
Ｖｏｕｔの値以外に基準電圧Ｖｏｕｔ＝０でも成立す
る。また、演算増幅器１０３の特性上、オフセット電圧
Ｖｏｆｆが発生した場合には、以下の条件で回路が安定
する。FIG. 8A shows the relationship between the reference voltage Vout and the input voltages V1 and V2. As can be seen from the figure, the point where the voltage V1 = V2 is satisfied not only with the value of the reference voltage Vout shown in the equation (1) but also with the reference voltage Vout = 0. Further, due to the characteristics of the operational amplifier 103, when the offset voltage Voff is generated, the circuit becomes stable under the following conditions.
【０００９】Ｖ２−Ｖｏｆｆ＝Ｖ１ この場合の入力電圧Ｖ１、Ｖ２と基準電圧Ｖｏｕｔとの
関係を図８（ｂ）に示す。この場合には、電圧Ｖ１、Ｖ
２が０ｖの電位から立ち上がったとすれば、正常動作点
に達する前に誤動作点Ｖｘで安定してしまい、正常動作
しないという問題がある。V2-Voff = V1 FIG. 8B shows the relationship between the input voltages V1 and V2 and the reference voltage Vout in this case. In this case, the voltages V1, V
If 2 rises from the potential of 0 v, there is a problem in that it becomes unstable at the malfunction point Vx before reaching the normal operation point and does not operate normally.
【００１０】そこで、従来では、図１３の電圧制御スイ
ッチ２３及びインバータ１１０を用いてスタートアップ
回路を構成している。即ち、電源がＯＮされると、当
初、基準電圧Ｖｏｕｔは０ｖであるので、インバータ１
１０の出力はＨｉｇｈとなる。その時、電圧制御スイッ
チ２３がＨｉｇｈでＯＮするように構成すれば、基準電
圧Ｖｏｕｔは電源電圧付近まで瞬間に引き上げられる。
一端引き上げられると、インバータ１１０の出力がＬｏ
ｗになって、電圧制御スイッチ２３がＯＦＦし、この状
態で、演算増幅器１０３の出力により電流源７の出力電
流が減少側に制御されて、入力電圧Ｖ１、Ｖ２が低下
し、Ｖ１＝Ｖ２の正常動作点に至ると、発生する基準電
圧Ｖｏｕｔは所期の値で安定する。Therefore, conventionally, a startup circuit is constructed by using the voltage control switch 23 and the inverter 110 shown in FIG. That is, when the power is turned on, the reference voltage Vout is initially 0v, so the inverter 1
The output of 10 becomes High. At this time, if the voltage control switch 23 is configured to be turned on at High, the reference voltage Vout is instantly raised to near the power supply voltage.
Once pulled up, the output of the inverter 110 becomes Lo
At w, the voltage control switch 23 is turned off, and in this state, the output current of the current source 7 is controlled to the decreasing side by the output of the operational amplifier 103, the input voltages V1 and V2 are decreased, and V1 = V2 When reaching the normal operating point, the generated reference voltage Vout becomes stable at a desired value.
【００１１】[0011]
【発明が解決しようとする課題】しかしながら、前記従
来の基準電圧源回路では次の欠点がある。即ち、従来の
基準電圧源回路では、基準電圧Ｖｏｕｔが所期の値を出
力している正常動作中に、インバータ１１０が基準電圧
ＶｏｕｔによってＨｉｇｈ信号を出力すると、電圧制御
スイッチ２３がＯＮして、出力電圧Ｖｏｕｔが電源電圧
近くまで引き上げられる誤動作が生じるため、この誤動
作を確実に防止するように、インバータ１１０のしきい
値を精度良く設定する必要がある。しかし、携帯型と据
え置き型とが存在する機器では、その内部で使用される
アナログ回路は、携帯型と据え置き型との双方で同一構
成のものが使用されるため、形態用として例えば２Ｖの
電源電圧が、据え置き用として例えば５Ｖの電源電圧が
使用される場合にも、その双方の電源の下で安定に動作
することが求められる。この状況では、電子機器に内蔵
される基準電圧源回路は、これに使用される電源電圧が
２Ｖや５Ｖ等の種々の電圧であっても、常に正常に動作
することが要求される。一方、前記インバータ１１０の
しきい値は、電源電圧に応じて変動するため、前記従来
の基準電圧発生回路では、所定値（例えば２Ｖ）の電源
電圧で正常動作するよう精度良く設定された場合であっ
ても、他の所定値（例えば５Ｖ）の電源電圧では、誤動
作して、安定にスタートアップさせることが難しく、従
って、他の所定値の電源電圧で使用する場合には、再
度、インバータ１１０のしきい値を精度良く設定し直す
必要が生じ、基準電圧源回路に汎用性が無い欠点があ
る。However, the conventional reference voltage source circuit described above has the following drawbacks. That is, in the conventional reference voltage source circuit, when the inverter 110 outputs the High signal by the reference voltage Vout during the normal operation in which the reference voltage Vout is outputting the desired value, the voltage control switch 23 is turned on, Since a malfunction occurs in which the output voltage Vout is raised to near the power supply voltage, it is necessary to accurately set the threshold value of the inverter 110 so as to reliably prevent this malfunction. However, in a device having a portable type and a stationary type, since the analog circuit used inside has the same configuration in both the portable type and the stationary type, for example, a power supply of 2V is used for the form. Even when a power supply voltage of, for example, 5V is used for stationary use, stable operation is required under both power supplies. In this situation, the reference voltage source circuit built into the electronic device is required to always operate normally even if the power supply voltage used for the reference voltage source circuit is various voltages such as 2V and 5V. On the other hand, since the threshold value of the inverter 110 varies according to the power supply voltage, the conventional reference voltage generating circuit can be configured to operate normally with a predetermined value (for example, 2V) of the power supply voltage with high accuracy. Even if there is a power supply voltage of other predetermined value (for example, 5V), it is difficult to malfunction and start up stably. Therefore, when the power supply voltage of another predetermined value is used, the inverter 110 of There is a drawback that the reference voltage source circuit has no versatility because the threshold value needs to be set accurately.
【００１２】本発明は上記問題点に鑑み、その目的は、
種々の値の電源電圧を使用する場合であっても、誤動作
せず、常に安定にスタートアップできる基準電圧源回路
を提供し、その汎用性を持たせることにある。[0012] In view of the above problems, the present invention has the following object.
It is to provide a reference voltage source circuit that does not malfunction and can always start up stably even when using a power supply voltage of various values, and to have versatility.
【００１３】[0013]
【課題を解決するための手段】前記問題点を解決するた
めに、本発明では、第１に、誤動作点を消滅させること
により、回路を正常動作点で確実に安定させる。第２
に、インバータを採用せず、差動コンパレータを用いて
スタートアップ回路を構成することにより、しきい値を
考慮する必要を無くす。In order to solve the above problems, in the present invention, firstly, by eliminating the malfunctioning point, the circuit is reliably stabilized at the normal operating point. Second
In addition, since the startup circuit is configured by using the differential comparator without using the inverter, it is not necessary to consider the threshold value.
【００１４】以上の目的を達成するため、請求項１記載
の発明の基準電圧源回路は、内部第１部位の電圧値と内
部第２部位の電圧値とが一致する正常動作点及びこの正
常動作点以外の他の安定点で動作が安定する基準電圧源
回路であって、制御端子を有し、この制御端子に入力さ
れる制御信号に応じた値の電流を流す電流源と、基準電
圧出力端子を共有すると共に、前記電流源から電流を受
けて、前記基準電圧出力端子に基準電圧を発生させると
共に、前記内部第１部位及び内部第２部位を各々有し、
この各部位に各々電圧を発生させる第１及び第２の基準
電圧発生回路と、前記第１部位及び第２の部位の両電圧
を差動信号として入力し、この差動信号を増幅し、この
増幅差動信号を構成する２つの信号のうち一方を出力端
子から出力し、この出力信号を制御信号として前記電流
源の制御端子に与える演算増幅器と、基準電圧源回路の
動作開始時に、前記第１及び第２の基準電圧発生回路の
基準電圧出力端子に発生する基準電圧を監視し、この基
準電圧が設定値未満の場合には、前記演算増幅器への２
つの入力電圧間にオフセット電圧を発生させて、前記他
の安定点を消滅させる制御回路とを備えたことを特徴と
する。In order to achieve the above object, the reference voltage source circuit according to the invention of claim 1 has a normal operating point at which the voltage value of the internal first portion and the voltage value of the internal second portion match, and this normal operation. A reference voltage source circuit whose operation is stable at stable points other than the above point, which has a control terminal and which supplies a current having a value according to a control signal input to the control terminal, and a reference voltage output. Sharing a terminal, receiving a current from the current source to generate a reference voltage at the reference voltage output terminal, and having the internal first portion and the internal second portion, respectively.
First and second reference voltage generating circuits for respectively generating voltages in the respective parts and both voltages of the first part and the second part are inputted as differential signals, and the differential signals are amplified, When one of the two signals forming the amplified differential signal is output from the output terminal and the output signal is applied as a control signal to the control terminal of the current source, and the reference voltage source circuit is started to operate, The reference voltage generated at the reference voltage output terminals of the first and second reference voltage generation circuits is monitored, and if this reference voltage is less than the set value, the operation amplifier 2
And a control circuit for generating an offset voltage between two input voltages to eliminate the other stable points.
【００１５】請求項２記載の発明は、前記請求項１記載
の基準電圧源回路において、前記制御回路で使用する設
定値は、前記正常動作点での基準電圧の値と、前記他の
安定点での基準電圧の値との間の電圧値であることを特
徴とする。According to a second aspect of the present invention, in the reference voltage source circuit according to the first aspect, the set value used in the control circuit is the value of the reference voltage at the normal operating point and the other stable point. It is characterized in that it is a voltage value between that of the reference voltage value in.
【００１６】請求項３記載の発明は、前記請求項１記載
の基準電圧源回路において、制御回路は、第１及び第２
の基準電圧発生回路の基準電圧が設定値以上の場合には
演算増幅器への２つの入力電圧間にオフセット電圧を発
生させないように、演算増幅器を制御することを特徴と
する。According to a third aspect of the present invention, in the reference voltage source circuit according to the first aspect, the control circuit includes first and second control circuits.
When the reference voltage of the reference voltage generating circuit is above a set value, the operational amplifier is controlled so that an offset voltage is not generated between two input voltages to the operational amplifier.
【００１７】請求項４記載の発明は、前記請求項１記載
の基準電圧源回路において、演算増幅器は、差動増幅回
路を有し、前記差動増幅回路は、定電流源と、前記定電
流源から電流が供給されると共に、前記第１及び第２の
基準電圧発生回路の内部第１部位及び内部第２部位の両
電圧が差動信号として入力され、この差動信号を増幅す
る差動電流増幅部と、前記差動電位増幅部の増幅差動信
号が入力される第１及び第２の電流入力端子を有し、前
記第１の電流入力端子に入力される信号の値に比例した
値で且つこの信号と同極性の電流を前記第２の電流入力
端子から引き抜くカレントミラー回路とを備え、前記第
２の電流入力端子が差動増幅回路の出力端子となること
を特徴とする。According to a fourth aspect of the present invention, in the reference voltage source circuit according to the first aspect, the operational amplifier includes a differential amplifier circuit, and the differential amplifier circuit includes a constant current source and the constant current source. A current is supplied from a source and both voltages of the internal first part and the internal second part of the first and second reference voltage generating circuits are input as a differential signal, and a differential for amplifying the differential signal. It has a current amplifier and first and second current input terminals to which the amplified differential signal of the differential potential amplifier is input, and is proportional to the value of the signal input to the first current input terminal. And a current mirror circuit for extracting a current having the same value and the same polarity as this signal from the second current input terminal, and the second current input terminal serves as an output terminal of the differential amplifier circuit.
【００１８】請求項５記載の発明は、前記請求項４記載
の基準電圧源回路において、演算増幅器は、更に反転増
幅器を備え、前記反転増幅器は、定電流源を内蔵すると
共に、差動増幅回路の出力端子の電圧を反転増幅するこ
とを特徴とする。According to a fifth aspect of the present invention, in the reference voltage source circuit according to the fourth aspect, the operational amplifier further includes an inverting amplifier, and the inverting amplifier has a built-in constant current source and a differential amplifier circuit. It is characterized by inverting and amplifying the voltage of the output terminal of.
【００１９】請求項６記載の発明は、前記請求項１記載
の基準電圧源回路において、前記電流源は、１個のトラ
ンジスタを有し、前記トランジスタは、その電流制御端
子が前記制御端子として割り当てられることを特徴とす
る。According to a sixth aspect of the present invention, in the reference voltage source circuit according to the first aspect, the current source has one transistor, and the current control terminal of the transistor is assigned as the control terminal. It is characterized by being.
【００２０】請求項７記載の発明は、前記請求項５記載
の基準電圧源回路において、前記電流源は、前記反転増
幅器により兼用されることを特徴とする。According to a seventh aspect of the present invention, in the reference voltage source circuit according to the fifth aspect, the current source is also used by the inverting amplifier.
【００２１】請求項８記載の発明は、前記請求項１記載
の基準電圧源回路において、前記第１の基準電圧発生回
路は、前記電流源に一端が接続された抵抗素子と、前記
抵抗素子の他端に陽極が接続され、陰極が低電圧源に接
続されたダイオード素子とを備え、前記抵抗素子と前記
ダイオード素子との接続点が前記内部第１部位であり、
前記電流源と前記抵抗素子との接続点が前記基準電圧出
力端子であることを特徴とする。According to an eighth aspect of the present invention, in the reference voltage source circuit according to the first aspect, the first reference voltage generating circuit includes a resistance element having one end connected to the current source, and the resistance element. An anode is connected to the other end, and a cathode is provided with a diode element connected to a low voltage source, the connection point between the resistance element and the diode element is the internal first portion,
A connection point between the current source and the resistance element is the reference voltage output terminal.
【００２２】請求項９記載の発明は、前記請求項１記載
の基準電圧源回路において、前記第２の基準電圧発生回
路は、前記電流源に一端が接続された抵抗素子と、前記
抵抗素子の他端に一端が接続された他の抵抗素子と、前
記他の抵抗素子の他端に陽極が接続され、陰極が低電圧
源に接続されたダイオード素子とを備え、前記抵抗素子
と前記他の抵抗素子との接続点が前記内部第２部位であ
り、前記抵抗素子と前記電流源との接続点が前記基準電
圧出力端子であることを特徴とする。According to a ninth aspect of the present invention, in the reference voltage source circuit according to the first aspect, the second reference voltage generating circuit includes a resistor element having one end connected to the current source, and the resistor element. The other resistance element having one end connected to the other end, the anode connected to the other end of the other resistance element, the cathode is provided with a diode element connected to a low voltage source, the resistance element and the other A connection point with the resistance element is the internal second portion, and a connection point with the resistance element and the current source is the reference voltage output terminal.
【００２３】請求項１０記載の発明は、前記請求項３記
載の基準電圧源回路において、制御回路は、ダイオード
素子より成り、このダイオード素子は、その陽極が前記
演算増幅器のカレントミラー回路の第１電流入力端子に
接続され、その陰極が前記第１及び第２の基準電圧発生
回路の基準電圧出力端子に接続されることを特徴とす
る。According to a tenth aspect of the present invention, in the reference voltage source circuit according to the third aspect, the control circuit includes a diode element, and the anode of the diode element is the first of the current mirror circuits of the operational amplifier. It is characterized in that it is connected to a current input terminal, and its cathode is connected to the reference voltage output terminals of the first and second reference voltage generating circuits.
【００２４】請求項１１記載の発明は、前記請求項１０
記載の基準電圧源回路において、前記ダイオード素子
は、ダイオード接続したトランジスタ又は接合ダイオー
ドより成ることを特徴とする。[0024] The invention according to claim 11 is the above-mentioned claim 10.
In the reference voltage source circuit described above, the diode element is a diode-connected transistor or a junction diode.
【００２５】請求項１２記載の発明の基準電圧源回路
は、内部第１部位の電圧値と内部第２部位の電圧値とが
一致する正常動作点及びこの正常動作点以外の他の安定
点で動作が安定する基準電圧源回路であって、制御端子
を有し、この制御端子に入力される制御信号に応じた値
の電流を流す電流源と、基準電圧出力端子を有すると共
に、前記電流源から電流を受けて、前記基準電圧出力端
子に基準電圧を発生させると共に、前記内部第１部位及
び内部第２部位を各々有し、この各部位に各々電圧を発
生させる第１及び第２の基準電圧発生回路と、前記第１
部位及び第２の部位の両電圧を差動信号として入力し、
この差動信号を増幅し、この増幅差動信号を構成する２
つの信号のうち一方を出力端子から出力し、この出力信
号を制御信号として前記電流源の制御端子に与える演算
増幅器と、２個の入力端子を有し、この両入力端子が、
前記演算増幅器でほぼ一定電圧となる点と、前記第１及
び第２の基準電圧発生回路の基準電圧出力端子とに各々
接続され、前記基準電圧出力端子の基準電圧と前記一定
電圧とを比較する差動コンパレータと、前記差動コンパ
レータの比較結果信号を受け、この比較結果信号に応じ
て高電圧源を前記第１及び第２の基準電圧発生回路の基
準電圧出力端子に接続する電圧制御スイッチとを備えた
ことを特徴とする。In the reference voltage source circuit of the invention as defined in claim 12, the normal operating point at which the voltage value of the internal first portion and the voltage value of the internal second portion match, and a stable point other than the normal operating point. A reference voltage source circuit having stable operation, having a control terminal, having a current source for flowing a current having a value according to a control signal input to the control terminal, and having a reference voltage output terminal, and the current source A first reference voltage generating a reference voltage at the reference voltage output terminal and having the internal first portion and the internal second portion, and generating a voltage at each of the reference portions. A voltage generating circuit, and the first
Input both the voltage of the part and the second part as a differential signal,
2 which amplifies this differential signal and constitutes this amplified differential signal
It has an operational amplifier that outputs one of the two signals from the output terminal and applies this output signal as a control signal to the control terminal of the current source, and two input terminals, both input terminals of which are
A point at which the operational amplifier has a substantially constant voltage and a reference voltage output terminal of each of the first and second reference voltage generation circuits are respectively connected, and the reference voltage of the reference voltage output terminal is compared with the constant voltage. A differential comparator and a voltage control switch that receives a comparison result signal of the differential comparator and connects a high voltage source to the reference voltage output terminals of the first and second reference voltage generation circuits according to the comparison result signal. It is characterized by having.
【００２６】請求項１３記載の発明は、前記請求項１２
記載の基準電圧源回路において、演算増幅器は、差動増
幅回路を有し、前記差動増幅回路は、定電流源と、前記
定電流源から電流が供給されると共に、前記第１及び第
２の基準電圧発生回路の内部第１部位及び内部第２部位
の両電圧が差動信号として入力され、この差動信号を増
幅する差動電流増幅部と、前記差動電位増幅部の増幅差
動信号が入力される第１及び第２の電流入力端子を有
し、前記第１の電流入力端子に入力される信号の値に比
例した値で且つこの信号と同極性の電流を前記第２の電
流入力端子から引き抜くカレントミラー回路とを備え、
前記第２の電流入力端子が差動増幅回路の出力端子とな
ることを特徴とする。The invention according to claim 13 is the above-mentioned claim 12.
In the reference voltage source circuit described above, the operational amplifier includes a differential amplifier circuit, and the differential amplifier circuit is supplied with a constant current source and current from the constant current source, and the first and second differential voltage circuits. Both the voltage of the internal first part and the voltage of the internal second part of the reference voltage generating circuit are input as a differential signal, and a differential current amplification part for amplifying the differential signal and an amplification differential of the differential potential amplification part. It has first and second current input terminals to which a signal is input, and a current having a value proportional to the value of the signal input to the first current input terminal and having the same polarity as this signal is input to the second current input terminal. Equipped with a current mirror circuit that pulls out from the current input terminal,
The second current input terminal serves as an output terminal of the differential amplifier circuit.
【００２７】請求項１４記載の発明は、前記請求項１３
記載の基準電圧源回路において、前記演算増幅器でほぼ
一定電圧となる点は、前記カレントミラー回路の第１の
電流入力端子であることを特徴とする。The invention of claim 14 is the same as that of claim 13.
In the reference voltage source circuit described above, the point at which the operational amplifier has a substantially constant voltage is the first current input terminal of the current mirror circuit.
【００２８】請求項１５記載の発明は、前記請求項１３
記載の基準電圧源回路において、演算増幅器は、更に反
転増幅器を備え、前記反転増幅器は、定電流源を内蔵す
ると共に、差動増幅回路の出力端子の電圧を反転増幅す
ることを特徴とする。The invention of claim 15 is the same as that of claim 13.
In the reference voltage source circuit described above, the operational amplifier further includes an inverting amplifier, and the inverting amplifier has a built-in constant current source and inversely amplifies the voltage at the output terminal of the differential amplifier circuit.
【００２９】請求項１６記載の発明は、前記請求項１２
記載の基準電圧源回路において、前記電流源は、１個の
トランジスタを有し、前記トランジスタは、その電流制
御端子が前記制御端子として割り当てられることを特徴
とする。The invention according to claim 16 is the above-mentioned claim 12.
In the reference voltage source circuit described above, the current source has one transistor, and the current control terminal of the transistor is assigned as the control terminal.
【００３０】請求項１７記載の発明は、前記請求項１５
記載の基準電圧源回路において、前記電流源は、前記反
転増幅器により兼用されることを特徴とする。The invention according to claim 17 is the above-mentioned claim 15.
In the reference voltage source circuit described, the current source is also used by the inverting amplifier.
【００３１】請求項１８記載の発明は、前記請求項１２
記載の基準電圧源回路において、前記第１の基準電圧発
生回路は、前記電流源に一端が接続された抵抗素子と、
前記抵抗素子の他端に陽極が接続され、陰極が低電圧源
に接続されたダイオード素子とを備え、前記抵抗素子と
前記ダイオード素子との接続点が前記内部第１部位であ
り、前記電流源と前記抵抗素子との接続点が前記基準電
圧出力端子であることを特徴とする。The invention according to claim 18 is the above-mentioned claim 12.
In the reference voltage source circuit described above, the first reference voltage generation circuit, a resistor element having one end connected to the current source,
An anode is connected to the other end of the resistance element, and a diode element whose cathode is connected to a low voltage source is provided, and a connection point between the resistance element and the diode element is the internal first portion, and the current source is And a connection point between the resistance element and the resistance element is the reference voltage output terminal.
【００３２】請求項１９記載の発明は、前記請求項１２
記載の基準電圧源回路において、前記第２の基準電圧発
生回路は、前記電流源に一端が接続された抵抗素子と、
前記抵抗素子の他端に一端が接続された他の抵抗素子
と、前記他の抵抗素子の他端に陽極が接続され、陰極が
低電圧源に接続されたダイオード素子とを備え、前記抵
抗素子と前記他の抵抗素子との接続点が前記内部第２部
位であり、前記抵抗素子と前記電流源との接続点が前記
基準電圧出力端子であることを特徴とする。The invention according to claim 19 is the above-mentioned claim 12.
In the reference voltage source circuit described above, the second reference voltage generating circuit includes a resistance element whose one end is connected to the current source,
The resistance element includes another resistance element whose one end is connected to the other end of the resistance element, an anode connected to the other end of the other resistance element, and a diode element whose cathode is connected to a low voltage source. And a connection point between the resistance element and the other resistance element is the internal second portion, and a connection point between the resistance element and the current source is the reference voltage output terminal.
【００３３】請求項２０記載の発明は、前記請求項１２
記載の基準電圧源回路において、前記電圧制御スイッチ
は、前記演算増幅器の前記点での一定電圧が第１及び第
２の基準電圧発生回路の基準電圧よりも高い時の差動コ
ンパレータの比較結果信号を受けて、高電圧源を前記第
１及び第２の基準電圧発生回路の基準電圧出力端子に接
続することを特徴とする。The invention according to claim 20 is the above-mentioned claim 12.
In the reference voltage source circuit described above, the voltage control switch is a comparison result signal of a differential comparator when the constant voltage at the point of the operational amplifier is higher than the reference voltages of the first and second reference voltage generation circuits. Accordingly, the high voltage source is connected to the reference voltage output terminals of the first and second reference voltage generating circuits.
【００３４】請求項２１記載の発明の電圧フィードバッ
ク回路は、出力電圧を設定電圧にフィードバック制御す
る電圧フィードバック回路であって、電流源と、フィー
ドバック端子を有し、このフィードバック端子に入力さ
れる制御信号に応じた値の電流を流す電流源と、電圧出
力端子を共有すると共に、前記電流源から電流を受けて
電圧を発生し、この電圧を前記電圧出力端子から出力す
ると共に、各々、内部所定部位に参照電圧を発生させる
第１及び第２の電圧発生回路と、前記第１及び第２の電
圧発生回路の前記各参照電圧を差動信号として入力し、
この差動信号を増幅し、この増幅差動信号を構成する２
つの信号のうち一方を出力し、この出力信号を前記制御
信号として前記電流源のフィードバック端子に与える演
算増幅器と、電圧フィードバック回路の動作開始時に、
前記第１及び第２の電圧発生回路の電圧出力端子からの
出力電圧を監視し、この出力電圧が所望電圧値未満の場
合には、前記演算増幅器への２つの入力電圧間にオフセ
ット電圧を発生させる制御回路とを備えたことを特徴と
する。According to a twenty-first aspect of the invention, a voltage feedback circuit is a voltage feedback circuit for feedback-controlling an output voltage to a set voltage, which has a current source and a feedback terminal, and a control signal input to the feedback terminal. A current source for passing a current having a value corresponding to the voltage output terminal, generate a voltage by receiving a current from the current source, and output the voltage from the voltage output terminal. First and second voltage generating circuits for generating a reference voltage, and the reference voltages of the first and second voltage generating circuits are input as differential signals,
2 which amplifies this differential signal and constitutes this amplified differential signal
When one of the two signals is output, and the output signal is supplied to the feedback terminal of the current source as the control signal, and the operation of the voltage feedback circuit is started,
The output voltage from the voltage output terminals of the first and second voltage generating circuits is monitored, and when the output voltage is less than a desired voltage value, an offset voltage is generated between the two input voltages to the operational amplifier. And a control circuit for controlling.
【００３５】請求項２２記載の発明は、前記請求項２１
記載の電圧フィードバック回路において、前記制御回路
の所望電圧値は、予め設定した複数の電圧値のうち何れ
かの電圧値に切換可能であることを特徴とする。The invention according to claim 22 is the same as claim 21.
In the voltage feedback circuit described above, the desired voltage value of the control circuit can be switched to any one of a plurality of preset voltage values.
【００３６】請求項２３記載の発明は、前記請求項２１
記載の電圧フィードバック回路において、前記制御回路
は、電圧出力端子からの出力電圧が所望電圧値以上の場
合には、前記演算増幅器への２つの入力電圧間にオフセ
ット電圧を発生させないように、前記演算増幅器を制御
することを特徴とする。The invention according to claim 23 is the same as claim 21.
In the voltage feedback circuit described above, the control circuit performs the operation so as not to generate an offset voltage between two input voltages to the operational amplifier when the output voltage from the voltage output terminal is equal to or higher than a desired voltage value. It is characterized by controlling an amplifier.
【００３７】請求項２４記載の発明は、前記請求項２１
記載の電圧フィードバック回路において、電圧フィード
バック回路は、基準電圧を発生する基準電圧源回路を構
成することを特徴とする。The invention according to claim 24 is the same as claim 21.
In the described voltage feedback circuit, the voltage feedback circuit constitutes a reference voltage source circuit which generates a reference voltage.
【００３８】以上の構成により、請求項１ないし請求項
１１及び請求項２１ないし請求項２４記載の発明の基準
電圧源回路及び電圧フィードバック回路では、動作開始
時（スタートアップ時）には、演算増幅器のオフセット
電圧でもって、正常動作点以外の他の安定動作点（誤動
作点）が消滅するので、正常動作点で確実に安定して動
作する。With the above configuration, in the reference voltage source circuit and the voltage feedback circuit according to the first to eleventh aspects of the invention and the twenty-first to twenty-fourth aspects of the invention, at the start of operation (startup), the operational amplifier Because of the offset voltage, other stable operating points (malfunctioning points) other than the normal operating point disappear, so that the system operates reliably and stably at the normal operating point.
【００３９】特に、請求項３及び請求項２３記載の発明
の基準電圧源回路及び電圧フィードバック回路では、正
常動作点での安定動作後は、演算増幅器のオフセット電
圧は無くなるので、基準電圧発生回路及び電圧フィード
バック回路は所期通りの基準電圧を精度良く出力する。Particularly, in the reference voltage source circuit and the voltage feedback circuit according to the third and twenty-third aspects of the present invention, the offset voltage of the operational amplifier disappears after the stable operation at the normal operating point, so that the reference voltage generating circuit and the voltage feedback circuit are eliminated. The voltage feedback circuit accurately outputs the reference voltage as expected.
【００４０】また、請求項１２ないし請求項２０記載の
発明の基準電圧源回路では、動作開始時には、その起動
を差動コンパレータの出力に基づく電圧制御スイッチの
動作でもって行うので、従来のインバータを用いた場合
のように、しきい値を考慮する必要が無く、従って、種
々の値の電源電圧を用いても、基準電圧源回路は誤動作
点で安定せずに、確実に正常動作点で安定に動作するこ
とになる。Further, in the reference voltage source circuit according to the twelfth to twentieth aspects of the invention, when the operation is started, the activation is performed by the operation of the voltage control switch based on the output of the differential comparator. There is no need to consider the threshold value as in the case of using it. Therefore, the reference voltage source circuit does not stabilize at the malfunction point even when using various values of the power supply voltage, and certainly stabilizes at the normal operation point. Will work.
【００４１】[0041]
【発明の実施の形態】以下、本発明の実施の形態を図面
に基いて説明する。Embodiments of the present invention will be described below with reference to the drawings.
【００４２】（第１の実施の形態）図１は本発明の第１
の実施の形態の電圧フィードバック回路を示す。同図に
おいて、１３１は電流源、１３２は第１の電圧発生回
路、１３３は第２の電圧発生回路、１３４は制御回路、
１３５は演算増幅器である。(First Embodiment) FIG. 1 shows a first embodiment of the present invention.
2 shows a voltage feedback circuit of the embodiment. In the figure, 131 is a current source, 132 is a first voltage generating circuit, 133 is a second voltage generating circuit, 134 is a control circuit,
Reference numeral 135 is an operational amplifier.
【００４３】前記電流源１３１は、フィードバック端子
１３１ａを有し、この端子１３１ａに入力される制御信
号に応じた値の電流を出力する。The current source 131 has a feedback terminal 131a and outputs a current having a value corresponding to the control signal input to the terminal 131a.
【００４４】前記第１及び第２の電圧発生回路１３２、
１３３は、電圧出力端子１３６を共有すると共に、前記
電流源１３１から電流を受けて、前記電圧出力端子１３
６に電圧を発生させる。この両電圧発生回路１３２、１
３３は、各内部所定点に生じる参照電圧が差動信号１３
９として前記演算増幅器１３５に入力される。The first and second voltage generating circuits 132,
133 shares the voltage output terminal 136, receives current from the current source 131, and receives the voltage output terminal 13
A voltage is generated at 6. Both voltage generation circuits 132, 1
33, the reference voltage generated at each internal predetermined point is the differential signal 13
9 is input to the operational amplifier 135.
【００４５】前記演算増幅器１３５は、入力された差動
信号１３９を構成する２つの信号１３７、１３８間の差
電圧を差動増幅し、その差動増幅信号を構成する２つの
信号のうちの何れか一方を、制御信号１３５ａとして、
前記電流源１３１のフィードバック端子１３１ａに出力
する。The operational amplifier 135 differentially amplifies the differential voltage between the two signals 137 and 138 forming the input differential signal 139, and selects one of the two signals forming the differential amplified signal. One of them is used as the control signal 135a,
Output to the feedback terminal 131a of the current source 131.
【００４６】前記制御回路１３４は、予め、前記電圧出
力端子１３６に発生すべき所望電圧値を複数個記憶して
おり、その複数個の中から何れか１つの所望電圧値を選
択可能である。また、この制御回路１３４は、電圧フィ
ードバック回路の動作開始時に前記電圧出力端子１３６
に発生した電圧を入力し、この入力電圧値を前記選択し
た所望電圧値と比較して、この入力電圧値が前記所望電
圧値未満の場合には、オフセット制御信号１３９を前記
演算増幅器１３５に出力し、一方、その入力電圧値が前
記所望電圧値以上の場合には、そのオフセット制御信号
１３９の出力を停止する。演算増幅器１３５は、前記オ
フセット制御信号１３９を受けた場合には、前記第１及
び第２の電圧発生回路１３２、１３３からの参照電圧１
３７、１３８間にオフセット電圧Ｖｏｆｆを与え、この
参照電圧間の差電圧が前記オフセット電圧Ｖｏｆｆに一
致した時、制御信号１３５ａを出力しない。The control circuit 134 previously stores a plurality of desired voltage values to be generated at the voltage output terminal 136, and any one of the desired voltage values can be selected from the plurality. The control circuit 134 also controls the voltage output terminal 136 when the operation of the voltage feedback circuit is started.
The voltage generated at the input voltage is input, the input voltage value is compared with the selected desired voltage value, and when the input voltage value is less than the desired voltage value, the offset control signal 139 is output to the operational amplifier 135. On the other hand, when the input voltage value is equal to or higher than the desired voltage value, the output of the offset control signal 139 is stopped. When the operational amplifier 135 receives the offset control signal 139, the operational amplifier 135 receives the reference voltage 1 from the first and second voltage generating circuits 132 and 133.
An offset voltage Voff is applied between 37 and 138, and when the difference voltage between the reference voltages matches the offset voltage Voff, the control signal 135a is not output.
【００４７】従って、電圧出力端子１３６に発生した電
圧をＶで表し、第１及び第２の電圧発生回路１３２、１
３３の参照電圧を各々Ｆ１（Ｖ）、Ｆ２（Ｖ）で表す
と、この電圧フィードバック回路全体は、演算増幅器１
３５の２つの入力電圧Ｆ１（Ｖ）、Ｆ２（Ｖ）が等しく
なるようにフィードバックされ、２つの参照電圧がＦ１
（Ｖ）＝Ｆ２（Ｖ）の点で安定し、この時の電圧値Ｖが
電圧出力端子１３６に出力される。Therefore, the voltage generated at the voltage output terminal 136 is represented by V, and the first and second voltage generating circuits 132, 1
When the reference voltages of 33 are respectively represented by F1 (V) and F2 (V), the entire voltage feedback circuit is the operational amplifier 1
The two input voltages F1 (V) and F2 (V) of 35 are fed back so as to be equal, and the two reference voltages are F1 (V) and F2 (V).
It becomes stable at (V) = F2 (V), and the voltage value V at this time is output to the voltage output terminal 136.
【００４８】しかし、Ｆ１（Ｖ）＝Ｆ２（Ｖ）になる点
が２点以上存在する場合は、電圧フィードバック回路は
その何れか１つの点で安定するため、その安定点の電圧
値が意図した所望電圧値でない場合には、電圧フィード
バック回路は誤動作してしまう。However, when there are two or more points where F1 (V) = F2 (V), the voltage feedback circuit is stable at any one of the points, so the voltage value at that stable point is intended. If it is not the desired voltage value, the voltage feedback circuit malfunctions.
【００４９】本電圧フィードバック回路では、前記安定
した電圧値を制御回路１３４が監視し、この安定した電
圧値が所望電圧値でない場合には、制御回路１３４は、
演算増幅器１３５にオフセット電圧を発生させて、電圧
フィードバック回路が他の安定点で動作するように電流
源１３１を制御する。その後、電圧出力端子１３６に発
生した電圧が前記所望電圧値に近づくと、制御回路１３
４は、演算増幅器１３５にオフセット電圧を解消させ、
前記所望電圧値で安定するよう電流源１３１を制御す
る。In this voltage feedback circuit, the control circuit 134 monitors the stable voltage value, and when the stable voltage value is not the desired voltage value, the control circuit 134
An offset voltage is generated in the operational amplifier 135 to control the current source 131 so that the voltage feedback circuit operates at another stable point. Thereafter, when the voltage generated at the voltage output terminal 136 approaches the desired voltage value, the control circuit 13
4 causes the operational amplifier 135 to eliminate the offset voltage,
The current source 131 is controlled so as to be stable at the desired voltage value.
【００５０】従って、本電圧フィードバック回路によれ
ば、所望の動作点で確実に安定して動作させることが可
能である。Therefore, according to the present voltage feedback circuit, it is possible to surely and stably operate at a desired operating point.
【００５１】（第２の実施の形態）図２は本発明の第２
の実施の形態を示し、前記電圧フィードバック回路を基
準電圧源回路に適用した例を示す。(Second Embodiment) FIG. 2 shows a second embodiment of the present invention.
The following is an example of applying the voltage feedback circuit to a reference voltage source circuit.
【００５２】同図において、７は制御端子７ａを有する
電流源、１０２ａ及び１０２ｂは各々第１及び第２の基
準電圧発生回路、１０３は演算増幅器、１３は制御回路
である。In the figure, 7 is a current source having a control terminal 7a, 102a and 102b are first and second reference voltage generating circuits, 103 is an operational amplifier, and 13 is a control circuit.
【００５３】前記電流源７は、前記制御端子７ａに入力
される制御信号に応じた値の電流を流す。この電流源７
は、通常、図３（ａ）に示すＰＭＯＳ型トランジスタ２
５、同図（ｂ）に示すＰＮＰトランジスタ２６、又は同
図（ｃ）に示す抵抗素子２７及びＰＮＰトランジスタ２
８により構成され、その各トランジスタの電流制御端子
が前記制御端子７ａとなる。The current source 7 supplies a current having a value corresponding to the control signal input to the control terminal 7a. This current source 7
Is normally the PMOS transistor 2 shown in FIG.
5, PNP transistor 26 shown in FIG. 2B, or resistance element 27 and PNP transistor 2 shown in FIG.
8 and the current control terminal of each transistor serves as the control terminal 7a.
【００５４】また、前記第１及び第２の基準電圧発生回
路１０２ａ、１０２ｂは、基準電圧出力端子１０２out
を共用し、前記電流源７からこの基準電圧出力端子１０
２out に電流が供給される。第１の基準電圧発生回路１
０２ａは、抵抗素子８とダイオード素子１１とから成
る。前記抵抗素子８は、その一端が基準電圧出力端子１
０２out に接続され、その他端は前記ダイオード素子１
１の陽極が接続され、ダイオード素子１１の陰極は低電
圧源に接続（接地）される。前記抵抗素子８とダイオー
ド素子１１との接続点は内部第１部位１４とされる。前
記第２の基準電圧発生回路１０２ｂは、抵抗素子９と、
他の抵抗素子１０と、ダイオード素子１２とから成る。
前記抵抗素子９は、その一端が基準電圧出力端子１０２
out に接続され、その他端は前記他の抵抗素子１０の一
端に接続され、他の抵抗素子１０の他端は前記ダイオー
ド素子１１の陽極が接続され、ダイオード素子１１の陰
極は低電圧源に接続（接地）される。前記２個の抵抗素
子９、１０の接続点は内部第２部位１５とされる。The first and second reference voltage generating circuits 102a and 102b are connected to the reference voltage output terminal 102out.
And the reference voltage output terminal 10 from the current source 7
Electric current is supplied to 2out. First reference voltage generation circuit 1
02a includes a resistance element 8 and a diode element 11. One end of the resistance element 8 has a reference voltage output terminal 1
02out, the other end is the diode element 1
The anode of diode element 11 is connected (grounded) to the low voltage source. A connection point between the resistance element 8 and the diode element 11 is an internal first portion 14. The second reference voltage generating circuit 102b includes a resistance element 9 and
It is composed of another resistance element 10 and a diode element 12.
One end of the resistance element 9 has a reference voltage output terminal 102.
connected to out, the other end is connected to one end of the other resistance element 10, the other end of the other resistance element 10 is connected to the anode of the diode element 11, and the cathode of the diode element 11 is connected to a low voltage source. (Grounded). A connection point between the two resistance elements 9 and 10 is an internal second portion 15.
【００５５】更に、前記演算増幅器１０３は、差動増幅
回路１０１と反転増幅器６とを備える。前記差動増幅回
路１０１は、定電流源１と、２個のトランジスタ２、３
を有する差動電流増幅部１０４と、他の２個のトランジ
スタ４、５を有するカレントミラー回路１０５とを備え
る。Further, the operational amplifier 103 includes a differential amplifier circuit 101 and an inverting amplifier 6. The differential amplifier circuit 101 includes a constant current source 1 and two transistors 2, 3
And a current mirror circuit 105 having the other two transistors 4 and 5.
【００５６】前記差動増幅回路１０１の具体的な内部構
成を図４に示す。同図において、定電流源１は、一端が
高電圧源Ｖｏに接続された２個のＰＭＯＳトランジスタ
３３、３５と、抵抗素子３４とから成る。ＰＭＯＳトラ
ンジスタ３３及び抵抗素子３４は共働してバイアス電圧
を発生してＰＭＯＳトランジスタ３５のゲートに供給
し、ＰＭＯＳトランジスタ３５が定電流を供給出力す
る。定電源源１の他端（即ち、ＰＭＯＳトランジスタ３
５の他端）には、差動電流増幅部１０４が接続される。
差動電流増幅部１０４では、２個のトランジスタ２、３
が、各々、Ｐ型（第１の導電型）の第１及び第２のＭＯ
Ｓトランジスタより成り、その各一端（ソース）は前記
定電流源１に接続され、その各他端（ドレイン）は前記
カレントミラー回路１０５に接続され、その各ゲートは
差動増幅回路１０１の正相入力端子２ａ及び逆相入力端
子３ａとり、この各端子には、前記第１及び第２の基準
電圧発生回路１０２ａ、１０２ｂの内部第１部位１４、
内部第２部位１５の電圧Ｖ１、Ｖ２が差動信号として入
力されており、この差動信号を増幅する。また、前記カ
レントミラー回路１０５では、２個のトランジスタ４、
５は、共にＮ型（第２の導電型）のＭＯＳトランジスタ
より成り、その各一端（ドレイン）は第１及び第２の電
流入力端子１０５ａ、１０５ｂとなり、この両端子が前
記差動電流増幅部１０４の２個のＭＯＳトランジスタ
２、３の他端（ドレイン）に各々接続される。前記両ト
ランジスタ４、５の他端（ソース）は共に低電圧源に接
続（接地）され、その各ゲートは共通接続され、この接
続点は前記第１の電流入力端子１０５ａに接続される。
従って、カレントミラー回路１０５は、前記第１の電流
入力端子１０５ａに入力される電流の値に比例した値で
且つこの電流と同極性の電流を前記第２の電流入力端子
１０５ｂから引き抜く。前記第１の電流入力端子１０５
ａはオフセット電圧制御端子４ａに接続され、前記第２
の電流入力端子１０５ｂは差動増幅回路１０１の出力端
子５ａとなる。前記オフセット電圧制御端子４ａから所
定値の電流を引き抜くと、差動増幅回路１０１の差動電
流増幅回路１０４から流れ出す２つの電流相互のバラン
スが崩れて、差動電流増幅部１０４への２つの入力電圧
Ｖ１，Ｖ２相互にオフセット電圧Ｖｏｆｆが付与され
る。The specific internal structure of the differential amplifier circuit 101 is shown in FIG. In the figure, the constant current source 1 is composed of two PMOS transistors 33 and 35, one ends of which are connected to the high voltage source Vo, and a resistance element 34. The PMOS transistor 33 and the resistance element 34 cooperate to generate a bias voltage and supply it to the gate of the PMOS transistor 35, and the PMOS transistor 35 supplies and outputs a constant current. The other end of the constant power source 1 (that is, the PMOS transistor 3
The other end of 5) is connected to the differential current amplifier 104.
In the differential current amplifier 104, the two transistors 2, 3
Are P-type (first conductivity type) first and second MOs, respectively.
Each of the S transistors is connected to the constant current source 1 at its one end (source), connected to the current mirror circuit 105 at its other end (drain), and has its gate connected to the positive phase of the differential amplifier circuit 101. An input terminal 2a and a negative-phase input terminal 3a are taken, and each of these terminals has an internal first portion 14 of the first and second reference voltage generation circuits 102a and 102b.
The voltages V1 and V2 of the internal second portion 15 are input as differential signals, and the differential signals are amplified. Further, in the current mirror circuit 105, the two transistors 4,
Reference numeral 5 denotes an N-type (second conductivity type) MOS transistor, one end (drain) of which serves as first and second current input terminals 105a and 105b, and both terminals are the differential current amplifier section. The two MOS transistors 2 and 3 of 104 are respectively connected to the other ends (drain). The other ends (sources) of the transistors 4 and 5 are both connected (grounded) to a low voltage source, their gates are commonly connected, and this connection point is connected to the first current input terminal 105a.
Therefore, the current mirror circuit 105 extracts from the second current input terminal 105b a current having a value proportional to the value of the current input to the first current input terminal 105a and having the same polarity as this current. The first current input terminal 105
a is connected to the offset voltage control terminal 4a, and
The current input terminal 105b becomes the output terminal 5a of the differential amplifier circuit 101. When a current of a predetermined value is drawn from the offset voltage control terminal 4a, the two currents flowing out from the differential current amplification circuit 104 of the differential amplification circuit 101 are out of balance with each other, and two inputs to the differential current amplification unit 104 are lost. An offset voltage Voff is applied to the voltages V1 and V2.
【００５７】図５は、前記反転増幅器６の内部構成を示
す。この内部構成は、差動増幅回路１０１をＭＯＳトラ
ンジスタで構成する場合に、反転増幅器として一般的に
用いられる構成である。同図において、３２は定電流源
であって、２個のＰＭＯＳトランジスタ３３、４０と、
抵抗素子３４とから成り、ＰＭＯＳトランジスタ３３及
び抵抗素子３４は共働してバイアス電圧を発生してＰＭ
ＯＳトランジスタ４０に供給し、ＰＭＯＳトランジスタ
４０が定電流を供給する。４１は容量素子、４２は抵抗
素子、４３はＮＭＯＳトランジスタである。前記ＮＭＯ
Ｓトランジスタ４３のゲート６ａは、入力端子として、
前記差動増幅回路１０１の出力端子５ａからの出力信号
を入力し、この信号が反転増幅されて、出力端子６ｂか
ら出力される。この出力端子６ｂから出力される増幅信
号は、制御信号として、前記電流源７の制御端子７ａに
入力される。演算増幅器１０３の２つの入力電圧Ｖ１、
Ｖ２がＶ１＞Ｖ２の関係のとき、反転増幅器６はＬＯＷ
信号を出力し、電流源７は出力電流を大きくする。一
方、Ｖ１＜Ｖ２の関係のとき、反転増幅器６はＨＩＧＨ
信号を出力し、電流源７は出力電流を小さくする。前記
容量４１及び抵抗４２は、回路の位相補償の役割を果
す。反転増幅器６の構成は、図５に示したものの他、反
転増幅作用を示す任意の回路を採用することが可能であ
る。FIG. 5 shows the internal structure of the inverting amplifier 6. This internal structure is a structure generally used as an inverting amplifier when the differential amplifier circuit 101 is composed of MOS transistors. In the figure, 32 is a constant current source, and two PMOS transistors 33 and 40,
The resistance element 34 and the PMOS transistor 33 and the resistance element 34 work together to generate a bias voltage and PM
It supplies to the OS transistor 40, and the PMOS transistor 40 supplies a constant current. Reference numeral 41 is a capacitive element, 42 is a resistive element, and 43 is an NMOS transistor. The NMO
The gate 6a of the S transistor 43 serves as an input terminal,
The output signal from the output terminal 5a of the differential amplifier circuit 101 is input, the signal is inverted and amplified, and output from the output terminal 6b. The amplified signal output from the output terminal 6b is input to the control terminal 7a of the current source 7 as a control signal. Two input voltages V1 of the operational amplifier 103,
When V2 is V1> V2, the inverting amplifier 6 is LOW.
A signal is output and the current source 7 increases the output current. On the other hand, when V1 <V2, the inverting amplifier 6 is HIGH.
A signal is output, and the current source 7 reduces the output current. The capacitor 41 and the resistor 42 play a role of phase compensation of the circuit. The configuration of the inverting amplifier 6 is not limited to that shown in FIG. 5, and it is possible to employ any circuit that exhibits an inverting amplification action.
【００５８】前記制御回路１３は、ダイオード素子より
成る。このダイオード素子は、整流作用を実現できる構
成、例えば図６（ａ）〜（ｅ）に示すように、ＰＭＯＳ
トランジスタ２８、ＮＭＯＳトランジスタ２９、ＰＮＰ
トランジスタ３０、ＮＰＮトランジスタ３１をダイオー
ド接続した構成、又はＰＮ接合ダイオード３２を用いた
もの等により構成される。このダイオード素子は、その
陽極が前記基準電圧出力端子１０２out に接続され、そ
の陰極が演算増幅器１０３のオフセット電圧制御端子４
ａに接続される。このダイオード素子は、基準電圧出力
端子１０２out に発生した基準電圧Ｖｏｕｔが演算増幅
器１０３のオフセット電圧制御端子４ａ（換言すれば、
カレントミラー回路１０５の第１の電流入力端子１０５
ａ）の電圧（設定値）Ｖｓ未満（Ｖｏｕｔ＜Ｖｓ）の場
合には、このダイオード素子に電流が流れて、オフセッ
ト電圧制御端子４ａから電流を引き抜き、演算増幅器１
０３への２つの入力電圧Ｖ１、Ｖ２間にオフセット電圧
Ｖｏｆｆを発生させ、一方、Ｖｏｕｔ≧Ｖｓの場合に
は、ダイオード素子が電流を阻止して、前記オフセット
電圧Ｖｏｆｆを無くす。前記設定値Ｖｓは、図８（ｂ）
に示すように、正常動作点での基準電圧（例えば１．１
ｖ）と、誤動作点での基準電圧Ｖｘ（Ｖｘ＜１．１ｖ）
との間の電圧値（例えば０．９ｖ）に設定される。The control circuit 13 is composed of a diode element. This diode element has a structure capable of realizing a rectifying action, for example, as shown in FIGS.
Transistor 28, NMOS transistor 29, PNP
The transistor 30 and the NPN transistor 31 are diode-connected, or the PN junction diode 32 is used. This diode element has its anode connected to the reference voltage output terminal 102out and its cathode connected to the offset voltage control terminal 4 of the operational amplifier 103.
a. In this diode element, the reference voltage Vout generated at the reference voltage output terminal 102out is the offset voltage control terminal 4a (in other words, the offset voltage control terminal 4a) of the operational amplifier 103.
First current input terminal 105 of current mirror circuit 105
When the voltage (setting value) of a) is less than Vs (Vout <Vs), a current flows through this diode element, and the current is drawn from the offset voltage control terminal 4a.
An offset voltage Voff is generated between the two input voltages V1 and V2 to 03, while when Vout ≧ Vs, the diode element blocks the current to eliminate the offset voltage Voff. The set value Vs is as shown in FIG.
As shown in, the reference voltage at the normal operating point (for example, 1.1
v) and the reference voltage Vx at the malfunction point (Vx <1.1v)
It is set to a voltage value (for example, 0.9 v) between and.
【００５９】次に、動作を説明する。本基準電圧源回路
はフィードバック系であって、差動増幅回路１０１の入
力電圧Ｖ１、Ｖ２が一致するように、電流源７の出力電
流が差動増幅回路１０１により制御され、最終的には、
電圧Ｖ１＝Ｖ２となって、基準電圧源回路の直流動作点
は安定する。この際、出力される基準電圧Ｖｏｕｔと電
圧Ｖ１、Ｖ２との関係は図８（ａ）で表される。この場
合に、従来で問題となるのは、既述の通り、直流安定点
が２つ存在することである。即ち、Ｖ１＝Ｖ２＝０ｖの
状態を考えると、演算増幅器１０３の出力はＨＩＧＨ信
号となる。その結果、電流源７がカットオフする。電流
源７がカットオフすると、Ｖ１＝Ｖ２＝０ｖであるの
で、この回路は安定してしまう。更に、同図（ｂ）に示
すように、演算増幅器１０３の特性上２つの入力電圧間
にオフセット電圧Ｖｏｆｆが発生して、Ｖ２−Ｖｏｆｆ
＝Ｖ１の条件で基準電圧源回路が安定する場合には、電
圧Ｖ１、Ｖ２はＶ１＝Ｖ２＝Ｖｘの誤動作点で安定する
ことになり、基準電圧出力端子１０２out の基準電圧Ｖ
ｏｕｔは、正常出力電圧（約１．１ｖ）にまで上昇しな
いことになる。Next, the operation will be described. This reference voltage source circuit is a feedback system, and the output current of the current source 7 is controlled by the differential amplifier circuit 101 so that the input voltages V1 and V2 of the differential amplifier circuit 101 match, and finally,
The voltage becomes V1 = V2, and the DC operating point of the reference voltage source circuit becomes stable. At this time, the relationship between the output reference voltage Vout and the voltages V1 and V2 is shown in FIG. In this case, the conventional problem is that there are two DC stable points as described above. That is, considering the state of V1 = V2 = 0v, the output of the operational amplifier 103 becomes a HIGH signal. As a result, the current source 7 is cut off. When the current source 7 is cut off, V1 = V2 = 0v, so this circuit becomes stable. Further, as shown in FIG. 7B, due to the characteristic of the operational amplifier 103, an offset voltage Voff is generated between two input voltages, and V2-Voff is generated.
= V1, when the reference voltage source circuit is stable, the voltages V1 and V2 are stable at the malfunction point of V1 = V2 = Vx, and the reference voltage Vout of the reference voltage output terminal 102out.
out will not rise to the normal output voltage (about 1.1v).
【００６０】本実施の形態では、前記誤動作点を消去す
るために、同図（ｃ）に示すように、演算増幅器１０３
に故意に逆のオフセット電圧Ｖｏｆｆ（Ｖ１−Ｖｏｆｆ
＝Ｖ２）を与える。従って、誤動作点が消去され、基準
電圧Ｖｏｕｔは必ず正常動作点で安定する。In this embodiment, in order to erase the malfunction point, as shown in FIG.
Intentionally the opposite offset voltage Voff (V1-Voff
= V2) is given. Therefore, the malfunction point is erased, and the reference voltage Vout is always stabilized at the normal operation point.
【００６１】その場合、演算増幅器１０３に定常的にオ
フセット電圧Ｖｏｆｆが与えられると、基準電圧源回路
の出力電圧Ｖｏｕｔに誤差が生じ、更には、電源電圧の
変動や温度変動に対して基準電圧源回路の出力電圧が変
動して、出力電圧の精度が劣化する欠点が新たに生じ
る。In this case, when the operational amplifier 103 is constantly supplied with the offset voltage Voff, an error occurs in the output voltage Vout of the reference voltage source circuit, and further, the reference voltage source with respect to the fluctuation of the power supply voltage and the temperature fluctuation. There is a new defect that the output voltage of the circuit fluctuates and the accuracy of the output voltage deteriorates.
【００６２】そこで、本実施の形態では、この欠点を解
決するために、基準電圧源回路の立ち上がり時には、演
算増幅器１０３にオフセット電圧を持たせ、基準電圧源
回路が一旦立ち上がった後は、前記オフセット電圧を生
じないように演算増幅器１０３を制御する。Therefore, in the present embodiment, in order to solve this drawback, the operational amplifier 103 is provided with an offset voltage at the time of rising of the reference voltage source circuit, and after the reference voltage source circuit once rises, the above-mentioned offset is generated. The operational amplifier 103 is controlled so that no voltage is generated.
【００６３】本実施の形態では、既述の通り、基準電圧
出力端子１０２out と演算増幅器１０３のオフセット電
圧制御端子４ａとを制御回路（ダイオード素子）１３で
接続することにより、オフセット電圧が可変な演算増幅
器１０３が実現される。In the present embodiment, as described above, the reference voltage output terminal 102out and the offset voltage control terminal 4a of the operational amplifier 103 are connected by the control circuit (diode element) 13 so that the offset voltage is variable. The amplifier 103 is realized.
【００６４】以下、その原理を図７を用いて説明する。
先ず、基準電圧源回路が起動する際には、演算増幅器１
０３のオフセット電圧制御端子４ａの電圧、即ちカレン
トミラー回路１０５の第１の電流入力端子１０５ａの電
圧、更に換言すればＮＭＯＳトランジスタ４のドレイン
電圧は、約０．９ｖ程度になる。つまり、ＮＭＯＳトラ
ンジスタ４のドレイン電圧は、そのゲート- ソース間電
圧と同じであり、このゲート- ソース間電圧は、ＮＭＯ
Ｓトランジスタ４の閾値電圧（通常、０．７ｖ程度）よ
りも約０．２ｖ程度高く設定される。基準電圧出力端子
１０２out の基準電圧Ｖｏｕｔはスタートアップ時には
０ｖであるので、同図（ａ）に示すように、ダイオード
素子１３に電流が流れる。差動電流増幅部１０４では、
ＰＭＯＳトランジスタ２は、前記ダイオード素子１３に
電流が流れる分だけ、ＰＭＯＳトランジスタ３に較べて
電流を流す必要があり、従って、ＰＭＯＳトランジスタ
２のゲート電圧はＰＭＯＳトランジスタ３に較べて低く
なる。即ち、オフセット電圧Ｖｏｆｆが発生して、電圧
Ｖ２−Ｖｏｆｆが電圧Ｖ１となる。従って、基準電圧Ｖ
ｏｕｔが上昇すると、電圧Ｖ１は同図（ｃ）のカーブＶ
１に沿い、電圧Ｖ２はカーブＶ２- Ｖｏｆｆに沿って、
上昇する。The principle will be described below with reference to FIG.
First, when the reference voltage source circuit is activated, the operational amplifier 1
The voltage of the offset voltage control terminal 4a of 03, that is, the voltage of the first current input terminal 105a of the current mirror circuit 105, in other words, the drain voltage of the NMOS transistor 4 is about 0.9 v. That is, the drain voltage of the NMOS transistor 4 is the same as its gate-source voltage, and this gate-source voltage is NMO.
The threshold voltage of the S-transistor 4 is set to about 0.2v higher than the threshold voltage (normally about 0.7v). Since the reference voltage Vout of the reference voltage output terminal 102out is 0v at the time of start-up, a current flows through the diode element 13 as shown in FIG. In the differential current amplifier 104,
The PMOS transistor 2 needs to flow a current as compared with the PMOS transistor 3 as much as the current flows through the diode element 13, so that the gate voltage of the PMOS transistor 2 becomes lower than that of the PMOS transistor 3. That is, the offset voltage Voff is generated, and the voltage V2-Voff becomes the voltage V1. Therefore, the reference voltage V
When out increases, the voltage V1 changes to the curve V in FIG.
1, the voltage V2 follows the curve V2-Voff,
To rise.
【００６５】その後、基準電圧Ｖｏｕｔがオフセット電
圧制御端子４ａの電圧（即ち、０．９ｖ）に達すると、
ダイオード素子１３がカットオフして非接続状態とな
り、電流が流れなくなって、前記オフセット電圧Ｖｏｆ
ｆは消滅する。従って、電圧Ｖ２は同図（ｃ）に示すよ
うに、カーブＶ２に遷移し、このカーブＶ２に沿って上
昇する。After that, when the reference voltage Vout reaches the voltage of the offset voltage control terminal 4a (that is, 0.9v),
The diode element 13 is cut off to be in a non-connection state, and no current flows, so that the offset voltage Vof
f disappears. Therefore, the voltage V2 transitions to the curve V2 and rises along the curve V2, as shown in FIG.
【００６６】そして、基準電圧Ｖｏｕｔが約１．１ｖに
なる（出力電圧Ｖｏｕｔは、前記（１）式から計算さ
れ、Ｒ１／Ｒ２＝１０及び、Ｉｓ２／Ｉｓ１＝１０とす
れば、約１．１ｖから１．２ｖの範囲で設定できる）
と、両電圧Ｖ１、Ｖ２は、図１１（ｃ）のカーブＶ１と
カーブＶ２との交点で一致し、基準電圧源回路はこの点
で安定する。この点は基準電圧源回路の正常動作点であ
る。従って、基準電圧源回路はスタートアップして、正
常動作点で安定して動作する。Then, the reference voltage Vout becomes about 1.1v (the output voltage Vout is calculated from the equation (1), and if R1 / R2 = 10 and Is2 / Is1 = 10, the output voltage Vout is about 1.1v. To 1.2v)
Then, the two voltages V1 and V2 coincide with each other at the intersection of the curve V1 and the curve V2 in FIG. 11C, and the reference voltage source circuit becomes stable at this point. This point is the normal operating point of the reference voltage source circuit. Therefore, the reference voltage source circuit starts up and operates stably at the normal operating point.
【００６７】本実施の形態では、ダイオード素子１３の
働きにより、基準電圧源回路のスタートアップ時には、
演算増幅器１０３にオフセット電圧を発生させて、誤動
作点を消滅させ、その後の動作の安定時には、前記オフ
セット電圧を消滅させて、所期値の基準電圧を発生させ
ることができ、高精度な基準電圧源回路を提供すること
ができる。In the present embodiment, due to the function of the diode element 13, when the reference voltage source circuit starts up,
An offset voltage is generated in the operational amplifier 103 to eliminate a malfunction point, and when the subsequent operation is stable, the offset voltage can be eliminated to generate a reference voltage of a desired value, and a highly accurate reference voltage can be obtained. A source circuit can be provided.
【００６８】（第３の実施の形態）次に、本発明の第３
の実施の形態の基準電圧源回路を図３に示す。本実施の
形態では、前記第２の実施の形態に較べて、図２の電流
源７を取り除き、反転増幅器６の出力を直接に基準電圧
出力端子１０２out に供給して、この出力端子１０２ou
t に基準電圧Ｖｏｕｔを発生させている。その他の構成
は、前記第２の実施の形態と同様である。(Third Embodiment) Next, the third embodiment of the present invention will be described.
FIG. 3 shows a reference voltage source circuit according to this embodiment. In the present embodiment, the current source 7 of FIG. 2 is removed and the output of the inverting amplifier 6 is directly supplied to the reference voltage output terminal 102out in comparison with the second embodiment, and this output terminal 102ou
The reference voltage Vout is generated at t. Other configurations are the same as those in the second embodiment.
【００６９】本実施の形態の回路構成であっても、ダイ
オード素子１３は第２の実施の形態で述べたのと全く同
じように働き、演算増幅器１０３のオフセット電圧Ｖｏ
ｆｆは、スタートアップ時には存在し、基準電圧源回路
が安定した後は、消滅するので、本基準電圧源回路は、
誤動作点で安定せずに立ち上がって、正常動作点で安定
すると共に、所期の値の基準電圧を発生して、高精度で
動作する基準電圧源回路が提供される。Even in the circuit configuration of this embodiment, the diode element 13 works exactly as described in the second embodiment, and the offset voltage Vo of the operational amplifier 103 is increased.
ff exists at the time of start-up, and disappears after the reference voltage source circuit stabilizes, so this reference voltage source circuit
Provided is a reference voltage source circuit which rises without being stabilized at a malfunctioning point, stabilizes at a normal operating point, generates a reference voltage having a desired value, and operates with high accuracy.
【００７０】（第４の実施の形態）次に、図１０を用い
て、本発明の第４の実施の形態の基準電圧源回路を説明
する。(Fourth Embodiment) Next, a reference voltage source circuit according to a fourth embodiment of the present invention will be described with reference to FIG.
【００７１】同図では、前記第２の実施の形態の制御回
路（ダイオード素子）１３に代えて、差動コンパレータ
２４を設けると共に、従来と同様の電圧制御スイッチ２
３を配置したものである。前記電圧制御スイッチ２３は
ＯＮ時に高電圧源Ｖｏを基準電圧出力端子１０２out に
接続して、出力される基準電圧Ｖｏｕｔを電源電圧にす
る。その他の構成は、前記第２の実施の形態の図２〜図
４と同一であるので、その説明を省略する。In the figure, a differential comparator 24 is provided in place of the control circuit (diode element) 13 of the second embodiment, and a voltage control switch 2 similar to the conventional one is provided.
3 are arranged. When the voltage control switch 23 is turned on, the high voltage source Vo is connected to the reference voltage output terminal 102out, and the output reference voltage Vout is set to the power supply voltage. The other configurations are the same as those in FIGS. 2 to 4 of the second embodiment, and the description thereof will be omitted.
【００７２】前記差動コンパレータ２４の２つの入力端
子は、基準電圧出力端子１０２out と、演算増幅器１０
３のオフセット電圧制御端子４ａとに各々接続される。
前記演算増幅器１０３のオフセット電圧制御端子４ａの
電圧（即ち、カレントミラー回路１０５の第１の電流入
力端子１０５ａの電圧であって、ＮＭＯＳトランジスタ
４のドレイン電圧である）をＶｓとすると、この電圧Ｖ
ｓはほぼ一定電圧（約０．９ｖ程度）に固定される。基
準電圧出力端子１０２out の基準電圧Ｖｏｕｔは最初０
ｖであり、基準電圧源回路が立ち上がると、約１．１Ｖ
程度に上昇する。従って、差動コンパレータ３４の出力
は基準電圧源回路のスタートアップ時と安定した後とで
は極性が逆になる。基準電圧源回路のスタートアップ時
に差動コンパレータ２４の出力（比較結果信号）によ
り、電圧制御スイッチ２３がＯＮするように構成され
る。The two input terminals of the differential comparator 24 are the reference voltage output terminal 102out and the operational amplifier 10.
3 and offset voltage control terminals 4a.
If the voltage of the offset voltage control terminal 4a of the operational amplifier 103 (that is, the voltage of the first current input terminal 105a of the current mirror circuit 105 and the drain voltage of the NMOS transistor 4) is Vs, this voltage V
s is fixed at a substantially constant voltage (about 0.9 v). The reference voltage Vout of the reference voltage output terminal 102out is initially 0.
v, and when the reference voltage source circuit starts up, about 1.1V
Rise to a degree. Therefore, the polarities of the outputs of the differential comparator 34 are opposite between when the reference voltage source circuit starts up and after it stabilizes. When the reference voltage source circuit starts up, the voltage control switch 23 is turned on by the output (comparison result signal) of the differential comparator 24.
【００７３】図１１は前記差動コンパレータ２４の一構
成例を示す。同図において、４４、４６、５１はＰＭＯ
Ｓトランジスタ、４５は抵抗素子、４７、４８はＰＭＯ
Ｓトランジスタ、４９、５０はＮＭＯＳトランジスタ、
５２はＮＭＯＳトランジスタである。ＰＭＯＳトランジ
スタ４７、４８のゲートが２つの入力端子であり、ＮＭ
ＯＳトランジスタ５２のドレインが出力端子である。図
１１の構成は１つの回路例であって、差動コンパレータ
２４は入力差動電圧を増幅できるものであれば、何れの
構成のものでもよい。FIG. 11 shows an example of the configuration of the differential comparator 24. In the figure, 44, 46 and 51 are PMOs.
S transistor, 45 is a resistance element, 47 and 48 are PMO
S transistors, 49 and 50 are NMOS transistors,
52 is an NMOS transistor. The gates of the PMOS transistors 47 and 48 are two input terminals, and NM
The drain of the OS transistor 52 is the output terminal. The configuration of FIG. 11 is one circuit example, and the differential comparator 24 may have any configuration as long as it can amplify the input differential voltage.
【００７４】従って、基準電圧源回路のスタートアップ
時には、基準電圧出力端子１０２out の基準電圧Ｖｏｕ
ｔは一時的に電源電圧まで瞬時に引き上げられ、その
後、低下して、正常動作点で安定する。従って、回路の
誤動作点で安定せず、先に正常動作点で安定して、確実
に正常動作する。Therefore, at the start-up of the reference voltage source circuit, the reference voltage Vou at the reference voltage output terminal 102out.
t is temporarily raised to the power supply voltage instantaneously, then decreases and stabilizes at the normal operating point. Therefore, the circuit is not stabilized at a malfunctioning point, is stabilized at a normal operating point first, and is sure to operate normally.
【００７５】また、基準電圧源回路が立ち上がった後
は、差動コンパレータ２４の出力極性はスタートアップ
時とは逆になるので、電圧制御スイッチ２３はオフし、
回路動作に影響を与えることはない。即ち、本実施の形
態では、従来のように図１３のインバータ１０４を用い
て電圧制御スイッチ２３を動作させず、差動コンパレー
タ２４を用いて動作させるので、しきい値を考慮する必
要が無く、従って、種々の値の電源電圧を用いた場合で
あっても、基準電圧源回路を誤動作点で安定せずに、常
に正常動作点で安定させることが可能である。After the reference voltage source circuit starts up, the output polarity of the differential comparator 24 is opposite to that at the start-up, so the voltage control switch 23 is turned off,
It does not affect the circuit operation. That is, in the present embodiment, unlike the conventional case, the voltage control switch 23 is not operated by using the inverter 104 of FIG. 13, but is operated by using the differential comparator 24, so that it is not necessary to consider the threshold value. Therefore, even when the power supply voltage having various values is used, the reference voltage source circuit can be stabilized at the normal operating point without being stabilized at the malfunctioning point.
【００７６】（第５の実施の形態）次に、図１２を用い
て、本発明の第５の実施の形態の基準電圧源回路を説明
する。(Fifth Embodiment) Next, a reference voltage source circuit according to a fifth embodiment of the present invention will be described with reference to FIG.
【００７７】本実施の形態では、前記第４の実施の形態
に較べて、図１０の電流源７を取り除き、反転増幅器６
の出力を直接に基準電圧出力端子１０２ｏｕｔに供給し
ている。その他の構成は前記第４の実施の形態と同様で
ある。In this embodiment, the current source 7 of FIG. 10 is removed and the inverting amplifier 6 is different from that of the fourth embodiment.
Is directly supplied to the reference voltage output terminal 102out. Other configurations are the same as in the fourth embodiment.
【００７８】従って、本実施の形態の回路構成であって
も、反転増幅器６の出力を利用して基準電圧出力端子１
０２ｏｕｔに基準電圧Ｖｏｕｔを発生させるので、既述
の差動コンパレータ２４を用いて電圧制御スイッチ２３
を動作させれば、安定に基準電圧源回路を立ち上げるこ
とができる。Therefore, even with the circuit configuration of this embodiment, the output of the inverting amplifier 6 is used to make the reference voltage output terminal 1
Since the reference voltage Vout is generated at 02out, the voltage control switch 23 using the differential comparator 24 described above.
By operating, the reference voltage source circuit can be stably started up.
【００７９】尚、以上の説明では、電圧フィードバック
回路を基準電圧源回路に適用したが、本発明の電圧フィ
ードバック回路はその他の半導体回路に適用してもよい
のは勿論である。Although the voltage feedback circuit is applied to the reference voltage source circuit in the above description, it goes without saying that the voltage feedback circuit of the present invention may be applied to other semiconductor circuits.
【００８０】[0080]
【発明の効果】以上説明したように、請求項１ないし請
求項１１及び請求項２１ないし請求項２４記載の発明の
基準電圧源回路及び電圧フィードバック回路によれば、
動作開始時には、演算増幅器のオフセット電圧でもって
誤動作点を消滅させたので、正常動作点での安定動作を
確保して、スタートアップを良好に行うことができる効
果を奏する。As described above, according to the reference voltage source circuit and the voltage feedback circuit of the invention described in claims 1 to 11 and 21 to 24,
At the start of the operation, since the malfunction point is eliminated by the offset voltage of the operational amplifier, there is an effect that the stable operation at the normal operation point can be ensured and the startup can be favorably performed.
【００８１】特に、請求項３及び請求項２３記載の発明
の基準電圧源回路及び電圧フィードバック回路によれ
ば、正常動作点での安定動作後は、演算増幅器のオフセ
ット電圧を無くしたので、発生する電圧を所期通りの電
圧値に精度良く確保できる。Particularly, according to the reference voltage source circuit and the voltage feedback circuit of the present invention as defined in claims 3 and 23, the offset voltage of the operational amplifier is eliminated after the stable operation at the normal operating point, so that it occurs. The voltage can be secured at the expected voltage value with high accuracy.
【００８２】また、請求項１２ないし請求項２０記載の
発明の基準電圧源回路によれば、基準電圧源回路の動作
開始を、差動コンパレータの出力に基づく電圧制御スイ
ッチの動作でもって行うので、従来のインバータを用い
た場合のようにしきい値を考慮する必要が無くなり、従
って、種々の値の電源電圧を用いても、基準電圧源回路
を、誤動作点で安定せずに、確実に正常動作点で安定さ
せることができる。According to the reference voltage source circuit of the invention described in claims 12 to 20, the operation of the reference voltage source circuit is started by the operation of the voltage control switch based on the output of the differential comparator. It is no longer necessary to consider the threshold value as in the case of using a conventional inverter. Therefore, even if various values of power supply voltage are used, the reference voltage source circuit does not stabilize at a malfunction point and operates normally. Can be stabilized in terms.
【図１】本発明の第１の実施の形態の電圧フィードバッ
ク回路の全体構成を示す図である。FIG. 1 is a diagram showing an overall configuration of a voltage feedback circuit according to a first embodiment of the present invention.
【図２】本発明の第２の実施の形態の基準電圧源回路の
全体構成図である。FIG. 2 is an overall configuration diagram of a reference voltage source circuit according to a second embodiment of the present invention.
【図３】電流源の具体的構成例を示す図である。FIG. 3 is a diagram showing a specific configuration example of a current source.
【図４】差動増幅回路の具体的構成例を示す図である。FIG. 4 is a diagram illustrating a specific configuration example of a differential amplifier circuit.
【図５】反転増幅回路の具体的構成例を示す図である。FIG. 5 is a diagram showing a specific configuration example of an inverting amplifier circuit.
【図６】制御回路を構成するダイオード素子の具体的構
成例を示す図である。FIG. 6 is a diagram showing a specific configuration example of a diode element that constitutes a control circuit.
【図７】（ａ）は本発明の第２の実施の形態の基準電圧
源回路のスタートアップ時のダイオード素子の働きを示
す模式図、（ｂ）は同回路の動作の安定時のダイオード
素子の働きを示す模式図である。FIG. 7A is a schematic diagram showing the action of the diode element at the time of startup of the reference voltage source circuit according to the second embodiment of the present invention, and FIG. 7B is a schematic diagram showing the diode element at the time of stable operation of the circuit. It is a schematic diagram which shows a function.
【図８】（ａ）は誤動作点に説明図、（ｂ）は演算増幅
器にオフセット電圧が存在する場合の誤動作点に説明
図、（ｃ）は本発明において誤動作点を消滅させた場合
の動作説明図である。8A is an explanatory diagram of a malfunction point, FIG. 8B is an explanatory diagram of a malfunction point when an offset voltage exists in an operational amplifier, and FIG. 8C is an operation when the malfunction point is eliminated in the present invention. FIG.
【図９】本発明の第３の実施の形態の基準電圧源回路の
全体構成図である。FIG. 9 is an overall configuration diagram of a reference voltage source circuit according to a third embodiment of the present invention.
【図１０】本発明の第４の実施の形態の基準電圧源回路
の全体構成図である。FIG. 10 is an overall configuration diagram of a reference voltage source circuit according to a fourth embodiment of the present invention.
【図１１】差動コンパレータの具体的構成例を示す図で
ある。FIG. 11 is a diagram showing a specific configuration example of a differential comparator.
【図１２】本発明の第５の実施の形態の基準電圧源回路
の全体構成図である。FIG. 12 is an overall configuration diagram of a reference voltage source circuit according to a fifth embodiment of the present invention.
【図１３】従来例の基準電圧源回路の全体構成を示す図
である。FIG. 13 is a diagram showing an entire configuration of a conventional reference voltage source circuit.
１ 定電流源 ４ａ 第１の電流入力端子（オフセット電圧制
御端子） ４ｂ 第２の電流入力端子 ６ 反転増幅器 ６ａ 出力端子 ７ 電流源 ７ａ 制御端子 ８、９ 抵抗素子 １０ 他の抵抗素子 １１、１２ ダイオード素子 １３ ダイオード素子（制御回路） １４ 内部第１部位 １５ 内部第２部位 Ｖｏ 高電圧源 ２３ 電圧制御スイッチ ２４ 差動コンパレータ ３２ 定電流源 １０１ 差動増幅回路 １０２ａ 第１の基準電圧発生回路 １０２ｂ 第２の基準電圧発生回路 １０２out 基準電圧出力端子 １０３ 演算増幅器 １０４ 差動電流増幅部 １０５ カレントミラー回路 １０５ａ 第１の電流出力端子 １０５ｂ 相２の電流出力端子 １３１ 電流源 １３１ａ フィードバック端子 １３２ 第１の電圧発生回路 １３３ 第２の電圧発生回路 １３４ 制御回路 １３５ 演算増幅器 １３６ 電圧出力端子1 constant current source 4a first current input terminal (offset voltage control terminal) 4b second current input terminal 6 inverting amplifier 6a output terminal 7 current source 7a control terminal 8, 9 resistance element 10 other resistance element 11, 12 diode Element 13 Diode element (control circuit) 14 Internal first part 15 Internal second part Vo High voltage source 23 Voltage control switch 24 Differential comparator 32 Constant current source 101 Differential amplifier circuit 102a First reference voltage generation circuit 102b Second Reference voltage generation circuit 102out reference voltage output terminal 103 operational amplifier 104 differential current amplification unit 105 current mirror circuit 105a first current output terminal 105b phase 2 current output terminal 131 current source 131a feedback terminal 132 first voltage generation circuit 133 second voltage generating circuit 134 control circuit 135 Calculation amplifier 136 the voltage output terminal
フロントページの続き (72)発明者 松下 正寿 大阪府門真市大字門真1006番地 松下電器 産業株式会社内 (72)発明者 望月 浩二 大阪府門真市大字門真1006番地 松下電器 産業株式会社内Front page continuation (72) Inventor Masatoshi Matsushita 1006 Kadoma, Kadoma City, Osaka Prefecture Matsushita Electric Industrial Co., Ltd. (72) Koji Mochizuki, 1006 Kadoma, Kadoma City, Osaka Prefecture Matsushita Electric Industrial Co., Ltd.
Claims (24)
電圧値とが一致する正常動作点及びこの正常動作点以外
の他の安定点で動作が安定する基準電圧源回路であっ
て、 制御端子を有し、この制御端子に入力される制御信号に
応じた値の電流を流す電流源と、 基準電圧出力端子を共有すると共に、前記電流源から電
流を受けて、前記基準電圧出力端子に基準電圧を発生さ
せると共に、前記内部第１部位及び内部第２部位を各々
有し、この各部位に各々電圧を発生させる第１及び第２
の基準電圧発生回路と、 前記第１部位及び第２の部位の両電圧を差動信号として
入力し、この差動信号を増幅し、この増幅差動信号を構
成する２つの信号のうち一方を出力端子から出力し、こ
の出力信号を制御信号として前記電流源の制御端子に与
える演算増幅器と、 基準電圧源回路の動作開始時に、前記第１及び第２の基
準電圧発生回路の基準電圧出力端子に発生する基準電圧
を監視し、この基準電圧が設定値未満の場合には、前記
演算増幅器への２つの入力電圧間にオフセット電圧を発
生させて、前記他の安定点を消滅させる制御回路とを備
えたことを特徴とする基準電圧源回路。1. A reference voltage source circuit, the operation of which is stable at a normal operating point at which the voltage value of the internal first portion and the voltage value of the internal second portion match and at a stable point other than the normal operating point. , A current source that has a control terminal, and which flows a current having a value corresponding to a control signal input to the control terminal, shares a reference voltage output terminal, receives a current from the current source, and outputs the reference voltage output. A first voltage generating unit and a second voltage generating unit that generate a reference voltage at a terminal and have internal first portions and internal second portions respectively.
Of the reference voltage generating circuit, and both of the voltages of the first portion and the second portion are input as a differential signal, the differential signal is amplified, and one of the two signals forming the amplified differential signal is input. An operational amplifier that outputs from the output terminal and applies this output signal as a control signal to the control terminal of the current source; and a reference voltage output terminal of the first and second reference voltage generation circuits when the operation of the reference voltage source circuit is started. A control circuit for monitoring the reference voltage generated in the control circuit and generating an offset voltage between two input voltages to the operational amplifier to eliminate the other stable point when the reference voltage is less than a set value. A reference voltage source circuit comprising:
の基準電圧の値との間の電圧値であることを特徴とする
請求項１記載の基準電圧源回路。2. The set value used in the control circuit is a voltage value between the value of the reference voltage at the normal operating point and the value of the reference voltage at the other stable point. The reference voltage source circuit according to claim 1.
上の場合には演算増幅器への２つの入力電圧間にオフセ
ット電圧を発生させないように、演算増幅器を制御する
ことを特徴とする請求項１記載の基準電圧源回路。3. The operational amplifier, wherein the control circuit does not generate an offset voltage between two input voltages to the operational amplifier when the reference voltages of the first and second reference voltage generation circuits are equal to or higher than a set value. The reference voltage source circuit according to claim 1, wherein
び第２の基準電圧発生回路の内部第１部位及び内部第２
部位の両電圧が差動信号として入力され、この差動信号
を増幅する差動電流増幅部と、 前記差動電位増幅部の増幅差動信号が入力される第１及
び第２の電流入力端子を有し、前記第１の電流入力端子
に入力される信号の値に比例した値で且つこの信号と同
極性の電流を前記第２の電流入力端子から引き抜くカレ
ントミラー回路とを備え、 前記第２の電流入力端子が差動増幅回路の出力端子とな
ることを特徴とする請求項１記載の基準電圧源回路。4. The operational amplifier includes a differential amplifier circuit, wherein the differential amplifier circuit is provided with a constant current source, a current is supplied from the constant current source, and the first and second reference voltages. Internal first portion and internal second portion of the generating circuit
Both voltages of the parts are input as a differential signal, a differential current amplification part for amplifying the differential signal, and first and second current input terminals to which the amplified differential signal of the differential potential amplification part is input. A current mirror circuit for extracting a current having a value proportional to the value of the signal input to the first current input terminal and having the same polarity as this signal from the second current input terminal, 2. The reference voltage source circuit according to claim 1, wherein the second current input terminal serves as an output terminal of the differential amplifier circuit.
電圧を反転増幅することを特徴とする請求項４記載の基
準電圧源回路。5. The operational amplifier further comprises an inverting amplifier, wherein the inverting amplifier has a built-in constant current source and inversely amplifies the voltage at the output terminal of the differential amplifier circuit. Reference voltage source circuit.
し、 前記トランジスタは、その電流制御端子が前記制御端子
として割り当てられることを特徴とする請求項１記載の
基準電圧源回路。6. The reference voltage source circuit according to claim 1, wherein the current source has one transistor, and the current control terminal of the transistor is assigned as the control terminal.
項５記載の基準電圧源回路。7. The reference voltage source circuit according to claim 5, wherein the current source is also used by the inverting amplifier.
に接続されたダイオード素子とを備え、 前記抵抗素子と前記ダイオード素子との接続点が前記内
部第１部位であり、 前記電流源と前記抵抗素子との接続点が前記基準電圧出
力端子であることを特徴とする請求項１記載の基準電圧
源回路。8. The first reference voltage generating circuit includes a resistance element having one end connected to the current source, an anode connected to the other end of the resistance element, and a cathode connected to a low voltage source. A connection point between the resistance element and the diode element is the internal first portion, and a connection point between the current source and the resistance element is the reference voltage output terminal. Item 2. The reference voltage source circuit according to item 1.
と、 前記他の抵抗素子の他端に陽極が接続され、陰極が低電
圧源に接続されたダイオード素子とを備え、 前記抵抗素子と前記他の抵抗素子との接続点が前記内部
第２部位であり、 前記抵抗素子と前記電流源との接続点が前記基準電圧出
力端子であることを特徴とする請求項１記載の基準電圧
源回路。9. The second reference voltage generating circuit includes a resistance element whose one end is connected to the current source, another resistance element whose one end is connected to the other end of the resistance element, and the other resistance. An anode is connected to the other end of the element, and a diode element whose cathode is connected to a low voltage source is provided, and a connection point between the resistance element and the other resistance element is the internal second portion, and the resistance element The reference voltage source circuit according to claim 1, wherein a connection point between the current source and the current source is the reference voltage output terminal.
陽極が前記演算増幅器のカレントミラー回路の第１電流
入力端子に接続され、その陰極が前記第１及び第２の基
準電圧発生回路の基準電圧出力端子に接続されることを
特徴とする請求項３記載の基準電圧源回路。10. The control circuit comprises a diode element, the anode of which is connected to the first current input terminal of the current mirror circuit of the operational amplifier, and the cathode of which is connected to the first and second reference circuits. The reference voltage source circuit according to claim 3, wherein the reference voltage output circuit is connected to a reference voltage output terminal of the voltage generation circuit.
り成ることを特徴とする請求項１０記載の基準電圧源回
路。11. The reference voltage source circuit according to claim 10, wherein the diode element comprises a diode-connected transistor or a junction diode.
の電圧値とが一致する正常動作点及びこの正常動作点以
外の他の安定点で動作が安定する基準電圧源回路であっ
て、 制御端子を有し、この制御端子に入力される制御信号に
応じた値の電流を流す電流源と、 基準電圧出力端子を有すると共に、前記電流源から電流
を受けて、前記基準電圧出力端子に基準電圧を発生させ
ると共に、前記内部第１部位及び内部第２部位を各々有
し、この各部位に各々電圧を発生させる第１及び第２の
基準電圧発生回路と、 前記第１部位及び第２の部位の両電圧を差動信号として
入力し、この差動信号を増幅し、この増幅差動信号を構
成する２つの信号のうち一方を出力端子から出力し、こ
の出力信号を制御信号として前記電流源の制御端子に与
える演算増幅器と、 ２個の入力端子を有し、この両入力端子が、前記演算増
幅器でほぼ一定電圧となる点と、前記第１及び第２の基
準電圧発生回路の基準電圧出力端子とに各々接続され、
前記基準電圧出力端子の基準電圧と前記一定電圧とを比
較する差動コンパレータと、 前記差動コンパレータの比較結果信号を受け、この比較
結果信号に応じて高電圧源を前記第１及び第２の基準電
圧発生回路の基準電圧出力端子に接続する電圧制御スイ
ッチとを備えたことを特徴とする基準電圧源回路。12. A reference voltage source circuit, the operation of which is stable at a normal operating point where the voltage value of the internal first portion and the voltage value of the internal second portion match and at a stable point other than the normal operating point. A current source which has a control terminal and which supplies a current having a value corresponding to a control signal input to the control terminal; and a reference voltage output terminal, which receives a current from the current source and which receives the reference voltage output terminal. A first and a second reference voltage generation circuit for generating a reference voltage and having an internal first portion and an internal second portion, respectively, and generating a voltage at each of the internal portion and the first portion. Both voltages of the two parts are input as a differential signal, this differential signal is amplified, and one of the two signals constituting this amplified differential signal is output from the output terminal, and this output signal is used as the control signal. Operational amplification applied to the control terminal of the current source And two input terminals, both of which are connected to a point where the operational amplifier has a substantially constant voltage and to the reference voltage output terminals of the first and second reference voltage generating circuits, respectively. Is
A differential comparator that compares the reference voltage of the reference voltage output terminal with the constant voltage, and a comparison result signal of the differential comparator, and a high voltage source is connected to the first and second high voltage sources according to the comparison result signal. A reference voltage source circuit, comprising: a voltage control switch connected to a reference voltage output terminal of a reference voltage generation circuit.
び第２の基準電圧発生回路の内部第１部位及び内部第２
部位の両電圧が差動信号として入力され、この差動信号
を増幅する差動電流増幅部と、 前記差動電位増幅部の増幅差動信号が入力される第１及
び第２の電流入力端子を有し、前記第１の電流入力端子
に入力される信号の値に比例した値で且つこの信号と同
極性の電流を前記第２の電流入力端子から引き抜くカレ
ントミラー回路とを備え、 前記第２の電流入力端子が差動増幅回路の出力端子とな
ることを特徴とする請求項１２記載の基準電圧源回路。13. The operational amplifier includes a differential amplifier circuit, wherein the differential amplifier circuit is provided with a constant current source, a current is supplied from the constant current source, and the first and second reference voltages. Internal first portion and internal second portion of the generating circuit
Both voltages of the parts are input as a differential signal, a differential current amplification part for amplifying the differential signal, and first and second current input terminals to which the amplified differential signal of the differential potential amplification part is input. A current mirror circuit for extracting a current having a value proportional to the value of the signal input to the first current input terminal and having the same polarity as this signal from the second current input terminal, 13. The reference voltage source circuit according to claim 12, wherein the current input terminal of 2 serves as an output terminal of the differential amplifier circuit.
点は、 前記カレントミラー回路の第１の電流入力端子であるこ
とを特徴とする請求項１３記載の基準電圧源回路。14. The reference voltage source circuit according to claim 13, wherein the point at which the operational amplifier has a substantially constant voltage is the first current input terminal of the current mirror circuit.
え、 前記反転増幅器は、 定電流源を内蔵すると共に、差動増幅回路の出力端子の
電圧を反転増幅することを特徴とする請求項１３記載の
基準電圧源回路。15. The operational amplifier further comprises an inverting amplifier, wherein the inverting amplifier has a built-in constant current source and inversely amplifies the voltage at the output terminal of the differential amplifier circuit. Reference voltage source circuit.
有し、 前記トランジスタは、その電流制御端子が前記制御端子
として割り当てられることを特徴とする請求項１２記載
の基準電圧源回路。16. The reference voltage source circuit according to claim 12, wherein the current source has one transistor, and the current control terminal of the transistor is assigned as the control terminal.
項１５記載の基準電圧源回路。17. The reference voltage source circuit according to claim 15, wherein the current source is also used by the inverting amplifier.
に接続されたダイオード素子とを備え、 前記抵抗素子と前記ダイオード素子との接続点が前記内
部第１部位であり、 前記電流源と前記抵抗素子との接続点が前記基準電圧出
力端子であることを特徴とする請求項１２記載の基準電
圧源回路。18. The first reference voltage generating circuit comprises a resistance element having one end connected to the current source, a diode connected to the other end of the resistance element, and a cathode connected to a low voltage source. A connection point between the resistance element and the diode element is the internal first portion, and a connection point between the current source and the resistance element is the reference voltage output terminal. Item 12. The reference voltage source circuit according to item 12.
と、 前記他の抵抗素子の他端に陽極が接続され、陰極が低電
圧源に接続されたダイオード素子とを備え、 前記抵抗素子と前記他の抵抗素子との接続点が前記内部
第２部位であり、 前記抵抗素子と前記電流源との接続点が前記基準電圧出
力端子であることを特徴とする請求項１２記載の基準電
圧源回路。19. The second reference voltage generating circuit includes a resistance element whose one end is connected to the current source, another resistance element whose one end is connected to the other end of the resistance element, and the other resistance. An anode is connected to the other end of the element, and a diode element whose cathode is connected to a low voltage source is provided, and a connection point between the resistance element and the other resistance element is the internal second portion, and the resistance element 13. The reference voltage source circuit according to claim 12, wherein a connection point between the current source and the current source is the reference voltage output terminal.
基準電圧発生回路の基準電圧よりも高い時の差動コンパ
レータの比較結果信号を受けて、高電圧源を前記第１及
び第２の基準電圧発生回路の基準電圧出力端子に接続す
ることを特徴とする請求項１２記載の基準電圧源回路。20. The voltage control switch receives a comparison result signal of a differential comparator when the constant voltage at the point of the operational amplifier is higher than the reference voltages of the first and second reference voltage generating circuits. 13. The reference voltage source circuit according to claim 12, wherein a high voltage source is connected to the reference voltage output terminals of the first and second reference voltage generating circuits.
制御する電圧フィードバック回路であって、 電流源と、 フィードバック端子を有し、このフィードバック端子に
入力される制御信号に応じた値の電流を流す電流源と、 電圧出力端子を共有すると共に、前記電流源から電流を
受けて電圧を発生し、この電圧を前記電圧出力端子から
出力すると共に、各々、内部所定部位に参照電圧を発生
させる第１及び第２の電圧発生回路と、 前記第１及び第２の電圧発生回路の前記各参照電圧を差
動信号として入力し、この差動信号を増幅し、この増幅
差動信号を構成する２つの信号のうち一方を出力し、こ
の出力信号を前記制御信号として前記電流源のフィード
バック端子に与える演算増幅器と、 電圧フィードバック回路の動作開始時に、前記第１及び
第２の電圧発生回路の電圧出力端子からの出力電圧を監
視し、この出力電圧が所望電圧値未満の場合には、前記
演算増幅器への２つの入力電圧間にオフセット電圧を発
生させる制御回路とを備えたことを特徴とする電圧フィ
ードバック回路。21. A voltage feedback circuit for performing feedback control of an output voltage to a set voltage, the current source having a current source and a feedback terminal, and flowing a current having a value according to a control signal input to the feedback terminal. A first and a first voltage generator that share a voltage output terminal, generate a voltage by receiving a current from the current source, output the voltage from the voltage output terminal, and generate a reference voltage at an internal predetermined portion. Two voltage generating circuits and the reference voltages of the first and second voltage generating circuits are input as differential signals, the differential signals are amplified, and the two signals constituting the amplified differential signals are input. An operational amplifier that outputs one of them and applies this output signal as the control signal to the feedback terminal of the current source; And a control circuit for monitoring the output voltage from the voltage output terminal of the second voltage generating circuit and generating an offset voltage between the two input voltages to the operational amplifier when the output voltage is less than the desired voltage value. A voltage feedback circuit comprising:
可能であることを特徴とする請求項２１記載の電圧フィ
ードバック回路。22. The voltage feedback circuit according to claim 21, wherein the desired voltage value of the control circuit can be switched to any one of a plurality of preset voltage values.
は、前記演算増幅器への２つの入力電圧間にオフセット
電圧を発生させないように、前記演算増幅器を制御する
ことを特徴とする請求項２１記載の電圧フィードバック
回路。23. The control circuit controls the operational amplifier so as not to generate an offset voltage between two input voltages to the operational amplifier when the output voltage from the voltage output terminal is equal to or higher than a desired voltage value. The voltage feedback circuit according to claim 21, wherein the voltage feedback circuit is controlled.
徴とする請求項２１記載の電圧フィードバック回路。24. The voltage feedback circuit according to claim 21, wherein the voltage feedback circuit constitutes a reference voltage source circuit for generating a reference voltage.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP03656897A JP3181528B2 (en) | 1996-03-07 | 1997-02-20 | Reference voltage source circuit and voltage feedback circuit |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5009196 | 1996-03-07 | ||
| JP8-50091 | 1996-03-07 | ||
| JP03656897A JP3181528B2 (en) | 1996-03-07 | 1997-02-20 | Reference voltage source circuit and voltage feedback circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH09297626A true JPH09297626A (en) | 1997-11-18 |
| JP3181528B2 JP3181528B2 (en) | 2001-07-03 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP03656897A Expired - Fee Related JP3181528B2 (en) | 1996-03-07 | 1997-02-20 | Reference voltage source circuit and voltage feedback circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3181528B2 (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001091361A (en) * | 1999-07-09 | 2001-04-06 | Applied Materials Inc | Methods and apparatus for calibrating temperature measurements and measuring currents |
| JP2001298332A (en) * | 2000-04-13 | 2001-10-26 | Nec Corp | Differential amplifier circuit |
| KR100494346B1 (en) * | 2000-10-09 | 2005-06-13 | 주식회사 하이닉스반도체 | Auto-trimming reference voltage generator |
| JP2009098801A (en) * | 2007-10-15 | 2009-05-07 | Toshiba Corp | Power supply circuit and internal power supply voltage generation method using the same |
| JP2010041020A (en) * | 2008-08-07 | 2010-02-18 | Amazing Microelectronic Corp | Transient noise detection circuit |
| JP2010160682A (en) * | 2009-01-08 | 2010-07-22 | Renesas Electronics Corp | Reference voltage generation circuit |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2018092920A1 (en) | 2016-11-21 | 2018-05-24 | 古河電気工業株式会社 | Composition for glass fiber-reinforced polyolefin resin materials, glass fiber-reinforced polyolefin resin material, method for producing same, and composite body |
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1997
- 1997-02-20 JP JP03656897A patent/JP3181528B2/en not_active Expired - Fee Related
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001091361A (en) * | 1999-07-09 | 2001-04-06 | Applied Materials Inc | Methods and apparatus for calibrating temperature measurements and measuring currents |
| JP4531212B2 (en) * | 1999-07-09 | 2010-08-25 | アプライド マテリアルズ インコーポレイテッド | Temperature measurement calibration and current measurement method and apparatus |
| JP2001298332A (en) * | 2000-04-13 | 2001-10-26 | Nec Corp | Differential amplifier circuit |
| JP4697997B2 (en) * | 2000-04-13 | 2011-06-08 | エルピーダメモリ株式会社 | Internal voltage generation circuit |
| KR100494346B1 (en) * | 2000-10-09 | 2005-06-13 | 주식회사 하이닉스반도체 | Auto-trimming reference voltage generator |
| JP2009098801A (en) * | 2007-10-15 | 2009-05-07 | Toshiba Corp | Power supply circuit and internal power supply voltage generation method using the same |
| JP2010041020A (en) * | 2008-08-07 | 2010-02-18 | Amazing Microelectronic Corp | Transient noise detection circuit |
| JP2010160682A (en) * | 2009-01-08 | 2010-07-22 | Renesas Electronics Corp | Reference voltage generation circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3181528B2 (en) | 2001-07-03 |
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