JPH09270691A - Power supply circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To allow a main circuit to be in operation at a low voltage in the power supply circuit controlling the operating state or a standby state of the main circuit employing a switching transistor(TR) and to reduce both the power consumption in the operating state and the standby state. SOLUTION: A drive power of a control circuit 11 of a stage just before a switching TR1 is supplied from variable power supplies VA1, VA2 other than a main power supply and an output voltage from the variable power supplies VA1, VA2 is made different between the operating state and the standby state of a main circuit A. Thus, the logical level of an input signal to the switching TR1 is increased to realize a low voltage operation of the main circuit A and to realize a low standby current at the same time.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power supply circuit for controlling power supply to various circuits, and more particularly to a power supply circuit effective for a circuit operating at a low voltage.

[0002]

2. Description of the Related Art Conventionally, when various circuits (hereinafter referred to as a main circuit) are operated at a low voltage for the purpose of low power consumption, a threshold value of a MOSFET forming a switch transistor for controlling power supply to the main circuit. It is necessary to reduce the voltage.

In the following description, MOSFET
In the case of expressing the high and low of the threshold voltage in, the nMOS is expressed as high and low in the positive potential direction, and conversely pM
In OS, it is expressed as high or low in the direction of negative potential. That is, the larger the absolute value, the higher the threshold voltage.

However, when the threshold voltage of the MOSFET is lowered as described above, if an attempt is made to secure a sufficient amount of drive current when the power is on (operating), the leakage current when the power is off (standby) is sufficient. There is a problem that the current cannot be cut off and the current consumption during standby increases.

Therefore, as a method for solving this problem,
A method using a power supply circuit PS4 as shown in FIG. 4 has been conventionally proposed (for example, see FIG. 7 of Japanese Patent Application No. 7-127812).

The power supply circuit PS4 has a positive power source VD.
D is a switch transistor TR41 (pMOSFE
T) to the main circuit A, and the input terminal of the switch transistor TR41 has a transistor T
R42 (pMOSFET) and transistor TR43
Inverters I41 and I42 configured by (nMOSFET) are connected to each other in series, and the power supply to the main circuit A can be turned on / off by the control signal SL.

Further, in the power supply circuit PS4, voltages v3 and v4 different from the voltage vDD of the power supply terminal VDD in the main circuit A from the power supply terminals VDD1 and VSS1.
Is given.

With such a configuration, the logical amplitude of the signal input to the switch transistor TR41 can be increased independently of vDD. Therefore, by applying each voltage so as to satisfy the relationship of v3>vDD>0> v4. The power supply to the main circuit A can be cut off and the current consumption can be reduced when the switch transistor TR41 is turned on while keeping the drive current high when the switch transistor TR41 is turned on.

Therefore, the circuit shown in FIG. 4 is used as a power supply circuit capable of operating the main circuit A at a low voltage and simultaneously reducing the standby current in the main circuit A.

[0010]

By the way, when the main circuit is operated by using the power supply circuit having the configuration shown in FIG. 4, the control signal SL input to the power supply circuit is also (v3
-V4) logical amplitude. Therefore,
In order to generate the control signal SL, a circuit for power control is formed by a circuit group having a logical amplitude (v3-v4) completely independently of the main circuit A, or the logical amplitude vvD of the main circuit A is (v3-v4).
It is necessary to provide a circuit for converting to 4).

However, when the power supply circuit and the main circuit are formed independently of each other, the entire circuit becomes complicated,
In addition, there is a problem that power consumption increases in the power supply circuit group operating at a relatively high voltage.

On the other hand, in the case of using the circuit for converting the logical amplitude, since the conversion circuit is always operating, the conversion circuit is not required even when the main circuit A is on standby, although the power supply is unnecessary. There is a problem that wasteful power is consumed for the operation of.

That is, in any case, if an attempt is made to configure a low voltage circuit with the configuration shown in FIG. 4, the power consumption on the power supply circuit side increases, and the main circuit is operated at a low voltage. There is a problem that the advantage of low power consumption is offset.

An object of the present invention is to provide a power supply circuit capable of operating a main circuit at a low voltage and reducing power consumption both during operation and during standby.

[0015]

According to the power supply circuit of the present invention, a switch transistor is provided between a main circuit to be controlled for power supply and a power supply line to the main circuit. In a power supply circuit for controlling an operating state and a standby state of a main circuit, the drive power supply potential of a control circuit of the switch transistor is changed between when the main circuit is operating and when the main circuit is in standby. Is.

That is, the drive power of the control circuit immediately preceding the switch transistor is supplied from a variable power supply different from the main power supply, and the output voltage of this variable power supply is used when the main circuit operates and when it stands by. By changing so, the logic amplitude of the input signal to the switch transistor is increased to realize low voltage operation with sufficient drive current during main circuit operation, and at the same time reduce current consumption during standby. To do.

[0017]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a circuit diagram showing a schematic structure of a power supply circuit PS1 according to a first embodiment of the present invention.

In the figure, the power source for the main circuit A is
Power is supplied from the power supply VDD (voltage value; vDD) through the switch transistor TR1. The output terminal of the inverter I1 is connected to the gate terminal of the switch transistor TR1 (pMOSFET).

The inverter I1 has a transistor TR21.
(PMOSFET) and transistor TR22 (nMOS
FET) and each transistor TR2
1, the gate terminals of TR22 are connected to each other as an input terminal, and the drain terminals of the transistors TR21 and TR22 are connected to each other to be an output terminal. This output terminal is connected to the gate terminal of the switch transistor TR1 described above.

The source terminal of the transistor TR21 is connected to the variable power supply VA1 via the power supply terminal VV1 (voltage value; vv1) and is supplied with power by the variable power supply VA1. Further, the source terminal of the transistor TR22 is connected to the variable power source VA2 via the power source terminal VV2 (voltage value; vv2), and the variable power source VA2 supplies power. The terminals of the variable power supplies VA1 and VA2 opposite to the transistors TR21 and TR22 are grounded.

The input terminal of the inverter I1 is connected to the output terminal of the inverter I2, and the power of the inverter I2 is supplied from VDD. The control signal SL for controlling the power supply circuit is the inverter I2.
Is input to The logical amplitude of the control signal SL is the same as that of the main circuit A.

In the following description, the inverter I1 formed by the two transistors TR21 and TR22 is referred to as a control circuit for the switch transistor TR1.

In the above configuration, when the main circuit A is operating (SL = 0), the output voltages of the variable power supplies VA1 and VA2 are adjusted so that the voltage of the power supply terminals VV1 and VV2 is vDD ≧ vv1>0>. vv2. With this configuration, the output vDD of the inverter I2 is applied to the gates of the transistors TR21 and TR22, the transistor TR21 is turned off, and the transistor TR22 is turned on. As a result, the output of the inverter I1 is vv2 (<
0).

That is, in this case, since the input to the inverter I1 is vDD (≧ vv1), the transistor TR21 (pMOSFET) in the inverter I1 is completely turned off, so that the leakage current (VV
The current between 1 and VV2) is at a negligible level.

On the other hand, when the main circuit A is on standby (SL = vDD)
To adjust the output voltage of the variable power supplies VA1 and VA2, and set the voltage of the power supply terminals VV1 and VV2 to vv1 ≧ vD.
D> vv2 ≧ 0. If you do this,
The output 0V of the inverter I2 is the transistor TR21, T
Applied to the gate of R22, the transistor TR21 is turned on and the transistor TR22 is turned off. This allows
The output of the inverter I1 becomes vv1 (≧ vDD),
The source-drain current in the switch transistor TR1 can be turned off.

That is, in this case, since the input to the inverter I1 is 0 (≦ vv2), the transistor TR22 (nMOSFET) in the inverter I1 is completely turned off, so that the leakage current in the inverter I1 is at a negligible level. .

As described above, in this embodiment, pMOSF is used.
The high potential (vv1 = vDD) and low potential (vv2 = 0) that drive the control circuit (inverter I1) of the switch transistor TR1 by ET are set to the high power supply potential (vD1) and low power supply potential (vD2) of the main circuit A. On the other hand, when the main circuit A is operating, the relationship of vD1 ≧ vv1>vD2> vv2 is satisfied, and when the main circuit A is on standby, vv1 ≧ v
It is changed so as to satisfy the relationship of D1> vv2 ≧ vD2.

When the power supply voltage for the main circuit is lowered by changing the drive power supply potential of the control circuit (inverter I1) of the switch transistor TR1 between the operating time and the standby time of the main circuit A as described above. However, it is possible to reduce the power consumption in the power supply circuit to a negligible level both during standby and during operation.

In this embodiment, by setting the threshold voltage of the pMOSFET, which is a switch transistor, to a high value, it becomes easy to cut off the leak current during standby, and the drive current amount during operation is in accordance with the present invention. With such a function, a sufficiently large vv2 (≠ 0) is applied to increase the drive current amount of the switch transistor. That is, the condition of vv2 during operation is
By setting a sufficiently large value as 0> vv2 instead of 0 ≧ vv2, it is possible to increase the drive current amount by obtaining a sufficient potential difference even for a high threshold voltage. Setting example 1).

However, on the contrary, the threshold voltage of the switch transistor is set to be low, and when the main circuit A operates, vv
D ≧ vv1> 0 ≧ vv2, and when the main circuit A is on standby, vv1>vDD> vv2 ≧ 0.

That is, by setting the threshold voltage of the switch transistor low, it is possible to obtain a sufficient amount of drive current during operation even when vv2 = 0, and regarding the leak current during standby, the function according to the present invention is used. , V large enough
v1 (that is, vv1> vD, not vv1 ≧ vDD
By (D), the switch transistor TR1 can be completely turned off, and the leak current can be cut off (hereinafter, referred to as Setting Example 2).
).

Further, by taking an intermediate value as the threshold voltage of the switch transistor, when the main circuit A is operating, a sufficient drive current amount can be obtained under the condition of vDD ≧ vv1> 0 ≧ vv2, and When waiting,
A sufficient leak current blocking effect can be obtained under the condition of vv1 ≧ vDD> vv2 ≧ 0 (hereinafter referred to as setting example 3).

Further, the description of claim 4 in the claims of the present application is based on the above-mentioned switch transistor T.
This is a collective expression of three conditions based on the threshold setting of R1. That is, the present invention is within the range of the conditions described in claim 4 (at the time of operation; vD1 ≧ vv1> vD2 ≧ vv2, at the time of standby; vv1 ≧ vD1> vv2 ≧ vD2),
Switch transistor thresholds, vD1, vD2, vv
By appropriately selecting the values 1 and vv2, it is possible to prevent the leak current of the switch transistor during standby and to secure the drive current amount during operation. It is included in the invention.

In the configuration shown in FIG. 1, the main circuit A is grounded and the switch transistor is pMOSFET.
Although the positive power supply is turned on / off, the positive power is always connected to the main circuit A, and the connection between the main circuit A and the ground potential is turned on / off by the nMOSFET switch transistor. Good.

In this case, the high potential (vv1) and the low potential (vv2) for driving the control circuit (inverter I1) of the switch transistor of the nMOSFET are set to the high power source potential (vD1) and the low power source potential (vD2) of the main circuit A. On the other hand, when the main circuit A is operating, vv1 ≧ vD1> vv2 ≧
When the relationship of vD2 is satisfied and the main circuit A is on standby,
If the control is changed so as to satisfy the relationship of vD1 ≧ vv1> vD2 ≧ vv2, the same control as in the first embodiment can be obtained.

In this case as well, as in the case of the setting examples 1 to 3, the conditions described in claim 5 (at the time of operation; vv1 ≧ vD1> vv2 ≧ vD2, at the time of standby; vD1) Within the range of ≧ vv1> vD2 ≧ vv2), the condition setting corresponding to the threshold setting of the switch transistor can be set, and each is included in the present invention.

Further, the above-mentioned switch transistor formed by the nMOFET and the switch transistor formed by the pMOSFET are used at the same time, a power supply circuit corresponding to each is provided, and each switch transistor is turned on / off in synchronization. May be Thus, the main circuit A
By controlling the power supply of the control circuit, the reliability of the control operation can be improved, and by turning off the two switch transistors, the main circuit A can be easily separated from other circuit systems, and the circuit operation test can be performed. There are advantages such as being convenient when performing

FIG. 2 is a circuit diagram showing a schematic structure of a power supply circuit PS2 according to the second embodiment of the present invention. In FIG. 2, the elements corresponding to those in FIG. 1 are designated by the same reference numerals and the description thereof will be omitted.

In FIG. 2, the switch transistor TR
The output terminal of the inverter I21 is connected to the input terminal of No. 1, one of the terminals of the power supply of the inverter I21 is connected to the power supply VDD, and the other is connected to the power supply terminal VV3 via the variable resistor R1. The power supply terminal VV3 is connected to a negative fixed power supply (not shown).

In the above structure, the variable resistor R
The resistance value of 1 is set to be low when the main circuit A is operating and high when the main circuit A is on standby.

In this way, when the main circuit A is operating (S
L = 0) includes the transistor TR2 of the inverter I21.
1 is turned off and the transistor TR22 is turned on. As a result, the switch transistor TR1 has vv3 (<0).
Is input, the driving force can be increased.

During standby of the main circuit A (SL = vDD)
Therefore, the transistor TR21 of the inverter I21 is turned on and the transistor TR22 is turned off. This allows
Since vDD is input to the switch transistor TR1, the source-drain current in the switch transistor TR1 can be turned off.

In such a power supply circuit, when the main circuit A is operating, the transistor T in the inverter I21 is
Since R21 (pMOSFET) is completely off,
The current consumption is at a level that can be ignored. On the other hand, when the main circuit A is on standby, the voltage drop in the variable resistor R1 and the transistor TR22 (nMOSFE in the inverter I21).
Although a leak current is generated depending on the current-voltage characteristic of T), the consumption current can be reduced by sufficiently increasing the resistance value of the variable resistor R1.

As described above, when the resistance value of the variable resistor R1 is lowered during the operation of the main circuit A, the main circuit A
While the switching from the standby state to the operating state can be performed at high speed, the switching from the operating state of the main circuit A to the standby state becomes slow.

On the other hand, the variable resistor R1 is connected to the transistor TR.
If the configuration is provided on the side of 21 and the resistance value thereof is high when the main circuit A is operating and is low when the main circuit A is on standby, the same operation as in the second embodiment can be obtained. , In this case, the resistance value of the variable resistor R1 is set to the main circuit A
Since it is increased during the operation of, the switching from the operating state of the main circuit A to the standby state can be performed at high speed, but
The switching of the main circuit A from the standby state to the operating state becomes slow. Therefore, which configuration is to be adopted may be determined according to the required characteristics of the main circuit A.

The potential of the power supply terminal vv3 is -vDD.
Then, realization becomes easy. That is, two types of potentials of ± vDD can be supplied by using two batteries of the same type when using a battery as a power source, or by supplying two cells of the same type in one housing. By making it possible to make a battery having two types of voltage outputs of ± vDD, it can be easily realized. In addition, the power supply for supplying the -vDD potential is the inverter I21.
Need only have a power capacity enough to drive the power supply, and the scale of the power supply can be made smaller than that of the vDD for the main power supply.
The increase in volume due to the addition of the vDD power supply can be made negligible.

In the power supply circuit PS2 described above, the variable power supplies VA1 and VA2 provided in the power supply circuit PS1 are unnecessary, so that there is an effect that the cost of parts can be reduced and the cost of the device can be reduced.

FIG. 3 is a circuit diagram showing a schematic configuration of a power supply circuit PS3 according to the third embodiment of the present invention. Note that, in FIG. 3, elements corresponding to those in FIG.

In FIG. 3, the switch transistor TR
The transistor TR21 (pMOSF
ET) and transistor TR22 (nMOSFET)
The output of the inverter I31 composed of is connected,
The source terminal of the transistor TR21 is connected to the power supply VDD, and the source terminal of the transistor TR22 is connected to the power supply terminal VV4.

The power supply VDD is connected to the positive output terminal of the solar cell S1, and the power supply terminal VV4 is connected to the negative output terminal of the solar cell S2. In this case, most of the light receiving area of the solar cell may be used for VDD and a very small area may be used for VV4. Since the positive power supply terminal VDD and the negative power supply terminal VV4 are provided by a single solar cell (electromotive force during operation is about 0.4V), the logic amplitude in the main circuit A and the inverter I2 is about 0.4V. Become.

In the power supply circuit having the above structure, when the solar cell is receiving light and the main circuit A is operated, +0.4 V is input to the terminal SL, the transistor TR21 (pMOSFET) is turned off, and the transistor TR21 (pMOSFET) is turned off. TR22 (nMOSFET) is turned on.

As a result, the switch transistor TR1
The potential of the negative power supply terminal VV4 is input to. This time,
The current supplied by the solar cell S2 is only the leak current of the transistor TR21 that is completely off, and is very small. Therefore, the potential of VV4 becomes a value close to the open end voltage of the solar cell, −0.6V. . That is, the transistor T
The input of R1 is about -0.6V. As a result, the current driving force of the transistor TR1 can be significantly increased (for example, 10 times or more) as compared with the case where the input is 0V.

On the other hand, although the solar cell receives light, the main circuit A
When you want to put into standby state, 0 is input to SL terminal,
The transistor TR21 is turned on and the transistor TR22 is turned off. However, the gate of the transistor TR22
Since the source-to-source voltage is (0-VV4), it is not in a completely off state.

Here, the potential of VV4 is determined so as to satisfy the current-voltage characteristic of the solar cell S2 and the current-voltage characteristic of the transistor TR22. Therefore, by making the current capacity of the solar cell S2 extremely small, the potential of VV4 becomes zero.
It can be made to rise to around V (-0.2 V in the example shown).

At this time, if the on-current in the transistor TR21 is set to be sufficiently larger than the current in the transistor TR22, the transistor TR is turned on.
The drain-source voltage drop of 22 can be almost zero. Therefore, +0.4 V is input to the transistor TR1, which can be surely turned off, and the standby current of the main circuit A can be kept low. At the same time, the amount of electricity generated by the solar cell S1 may be used for charging the secondary battery.

When the solar cell is not receiving light, 0 is input to SL to stop the circuit.

As described above, by adjusting the power capacity of the solar cell S2 so that the off current of the transistor TR21 can be sufficiently supplied, but the supply current is sufficiently lower than the on current of the transistor TR22. The above effect can be realized. In addition, the fact that the open circuit voltage of the solar cell is higher than the operating voltage also effectively works in the circuit having the above configuration.

According to the power supply circuit SP3 described above, since power is obtained from the solar cell, it can be widely applied as a power supply circuit for the main circuit A in various portable devices.

Not limited to the solar cell, the above effect can be realized as long as the power source has the same output current-voltage characteristics as the solar cell. Further, in the configuration shown in FIG. 3, the power source is entirely supplied by the solar cell, but the same effect can be obtained even if the solar cell S1 is changed to another power source.

[0060]

As described above, according to the present invention,
By changing the drive power supply potential of the control circuit of the switch transistor between the operating time and the standby time of the main circuit, the main circuit can be operated at a low voltage, and the power supply circuit has low power consumption during both the operating time and the standby time. There is an effect that can be realized.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a power supply circuit according to a first embodiment of the present invention.

FIG. 2 is a circuit diagram showing a power supply circuit according to a second embodiment of the present invention.

FIG. 3 is a circuit diagram showing a power supply circuit according to a third embodiment of the present invention.

FIG. 4 is a circuit diagram showing a conventional power supply circuit.

[Explanation of symbols]

 A ... Main circuit, SP1 to SP3 ... Power supply circuit, TR1 ... Switch transistor, TR21, TR22 ... TR1 driving transistor, I1, I2, I21, I31 ... Inverter, R1 ... Variable resistor, VDD ... Main circuit power supply, VA1, VA2 ... I1 variable power supply, VV1, VV2 ... I1 power supply terminal, VV3 ... Fixed power supply terminal, VV4 ... Negative power supply terminal, S1, S2 ... Solar cell.

Claims (6)

[Claims] 1. A switch transistor is provided between a main circuit subject to power supply control and a power supply line to the main circuit, and the switch transistor controls an operating state and a standby state of the main circuit. In the power supply circuit, the drive power supply potential of the control circuit for the switch transistor is changed between the operation of the main circuit and the standby time. 2. The drive power supply for the control circuit according to claim 1, wherein a variable voltage source is connected to either or both of a high potential power supply terminal and a low potential power supply terminal of the control circuit of the switch transistor. A power supply circuit characterized by changing an electric potential. 3. The variable voltage control circuit according to claim 1, wherein one or both of a high-potential power supply terminal and a low-potential power supply terminal of the control circuit for the switch transistor is connected to a fixed voltage source via a variable resistor, A power supply circuit, wherein a drive power supply potential of the control circuit is changed by a voltage drop in a resistor. 4. The switch transistor according to claim 1, wherein the switch transistor is a pMOS.
The high potential (vv1) and the low potential (vv2) for driving the MOS control circuit are compared with the high power supply potential (vD1) and the low power supply potential (vD2) of the main circuit when the main circuit operates, vD1 ≧ vv1> satisfy the relationship of vD2 ≧ vv2,
Further, when the main circuit is on standby, vv1 ≧ vD1> vv
A power supply circuit, characterized in that the power supply circuit is changed so as to satisfy the relationship of 2 ≧ vD2. 5. The switch transistor according to claim 1, wherein the switch transistor is composed of an nMOS.
The high potential (vv1) and the low potential (vv2) for driving the MOS control circuit are compared with the high power supply potential (vD1) and the low power supply potential (vD2) of the main circuit when the main circuit is operating, vv1 ≧ vD1> satisfy the relationship of vv2 ≧ vD2,
Further, when the main circuit is on standby, vD1 ≧ vv1> vD
A power supply circuit characterized by changing so as to satisfy the relationship of 2 ≧ vv2. 6. The solar cell is used as a power source for driving the control circuit of the switch transistor according to claim 1, and the output of the solar cell during standby of the main circuit is utilized by utilizing a current-voltage characteristic of the solar cell. A power supply circuit characterized in that a voltage becomes smaller than an output voltage when the main circuit operates.