JPH09270505A - Solid state image pickup device and manufacturing method therefor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a solid state image pickup device having a high performance which can reduce a step difference by electrodes and can minimize it. SOLUTION: This device is provided with a channel layer 4 formed in a belt shape at a surface part in a semiconductor substrate 1, a photodiode part 16 formed in the substrate 1 and adjoining the channel layer 4, an insulating film 2 formed on the substrate 1, first electrodes 13 and 15 so formed on the insulating film 2 as being insulated from each other at the rectangular direction of the channel layer 4 and as adjoining each other and a wiring layer which junctions the diode part 16 with the electrodes 12∼15. Parts of the electrodes 12∼15 on the photodiode part 16 are eliminated. In this case the first electrodes 13 and 15 and the second ones 12 and 14 on the channel layer 4 are so comprised as being duplicated in a part and upper surfaces of the electrodes 13 and 15 and ones of the electrodes 12 and 14 being made to be a common plane and a part of the first electrodes 13 and 15 of the wiring layer and a part of the second electrodes 12 and 14 are so comprised as being perfectly duplicated.

Description

Detailed Description of the Invention

[0001]

The present invention relates to a charge coupled device (Ch
The present invention relates to a solid-state imaging device using an arge coupled device (CCD) and a method for manufacturing the same.

[0002]

2. Description of the Related Art A CCD is, for example, a 0.1 channel layer formed on a semiconductor channel layer formed in a semiconductor substrate via a gate insulating film.
Has a structure in which a plurality of phases of charge transfer electrodes electrically separated from each other by an insulating film of about 0.2 μm are formed, and a pulse voltage is applied to each of the plurality of phases of charge transfer electrodes to form a channel below the electrodes. This is a semiconductor device which transfers a charge signal by changing the potential of a layer.

FIG. 17 is a top view showing the structure of a pixel portion of a conventional CCD solid-state image pickup device, and FIGS. 18 (a) and 18 (b) are sectional views taken along lines AA 'and BB' of FIG. 17, respectively. is there.

As shown in FIG. 17, the image portion of the CCD solid-state image pickup device comprises a photodiode 16 which constitutes a light receiving portion formed in a matrix arrangement, and this photodiode 16
, For example, four-phase charge transfer electrodes 12 formed in the row direction
And 15. No electrode is formed on the photodiode 16. A channel layer 4 is formed in the semiconductor substrate 1 (shown in FIG. 18) between the photodiodes 16, for example, in the column direction, and the gate insulating film 2 (shown in FIG. 18) is formed on the channel layer 4. The charge transfer electrodes 12 to 15 are formed via the above to form a charge transfer region. The charge transfer electrodes 12 to 15 formed in, for example, the row direction region between the photodiodes 16 form a wiring region for supplying a voltage to the charge transfer electrodes 12 to 15 in the charge transfer region. Further, a light shielding layer 17 is formed using a metal material such as Al or MoSi on a region except a part of the light receiving portion, and a protective film 20 is formed on the entire surface.

FIG. 18A shows a sectional structure of the charge transfer region of the CCD solid-state image pickup device. A channel layer 4 is formed in the surface layer portion of the p well 3 formed in the semiconductor substrate 1, and the channel layer 4 is formed on the channel layer 4 with the gate insulating film 2 interposed therebetween.
The phase charge transfer electrodes 12 to 15 are formed. These charge transfer electrodes 12 to 15 are formed adjacent to each other with the insulating film 8 interposed therebetween so as to partially overlap each other. Each electrode 1
A light shielding layer 17 is formed on the layers 2 to 15 with an interlayer insulating film 18 interposed therebetween.

FIG. 18B shows the sectional structure of the light receiving region and the wiring region of the CCD solid-state image pickup device. Part of the charge transfer electrodes 12 to 15 and part of the light shielding layer 17 are removed to form the light receiving region 16. Here, the charge transfer electrodes 12 to 15 remaining between the light receiving regions 16 are configured as wirings for supplying a pulse voltage to the charge transfer electrodes 12 to 15 in the charge transfer region as described above.

Conventionally, the charge transfer electrodes 12 to 15 of such a CCD solid-state image pickup device are formed as follows. That is, the first-layer electrode material is deposited on the gate insulating film 2 formed on the surface of the semiconductor substrate 1, and the four-phase charge transfer electrodes among the four-phase charge transfer electrodes are formed by an ordinary lithography method and etching technique. Odd phase electrodes 13 and 15
To form Next, an insulating film 8 such as an oxide film (SiO2) is formed by, for example, thermal oxidation so as to cover the electrodes 13 and 15 of the odd phase. After that, the electrode material of the second layer is deposited, and the remaining even-numbered electrodes 12 and 14 of the four-phase charge transfer electrodes are formed by an ordinary lithography method using an etching technique. In this way, four-phase electrodes can be formed adjacent to each other on the gate insulating film 2 on the channel layer 4 with the thin insulating film 8 interposed therebetween.

However, in such a conventional electrode structure and manufacturing method, in consideration of misalignment between the patterning of the first layer electrode material and the patterning of the second layer electrode material, the adjacent electrodes are They need to be formed so as to overlap each other. Therefore, the step between the portion where the first layer electrode and the second layer electrode are stacked and the portion where the electrode is not formed becomes very large. If such a step difference due to the electrode increases, it becomes necessary to increase the film thickness of the light shielding layer 17 in order to sufficiently cover the electrode with the light shielding layer 17, and for example, in the peripheral circuit region other than the pixel region of the semiconductor device, etching is performed. Therefore, when removing the light shielding layer 17, there is a problem that the light shielding layer 17 remains in a portion having a large step and cannot be completely removed.

As a method for solving such a problem, a solid-state image pickup device having a structure as shown in FIGS. 19 and 20 has been proposed. Figure 19 shows the proposed CCD
20A and 20B are cross-sectional views taken along the lines AA ′ and BB ′ of FIG. 19, respectively, showing the structure of the pixel region of the solid-state imaging device.

As shown in these figures, in this method,
Since the adjacent charge transfer electrodes are not stacked, the step difference due to the electrodes is reduced. However, in this case, as shown in FIG. 20B, in the wiring portion of the charge transfer electrode, adjacent electrodes (for example, electrodes 12 and 13 or electrodes 14 and 1) are connected.
Since 5) are formed side by side on the same plane, if the area used as the wiring portion is the same as the conventional one, there is no portion where the electrodes overlap, so the wiring width of each electrode becomes thin and the wiring resistance increases. Resulting in. On the other hand, in order to sufficiently reduce the resistance by using such a structure, it is necessary to widen the wiring width, which goes against the miniaturization of the wiring due to high integration.

Further, due to the misalignment between the patterning of the charge transfer electrode and the patterning of the light receiving portion 16, there is a difference in the width of two adjacent electrodes, so that the wiring resistances of these two electrodes vary. In order to sufficiently reduce the resistance in consideration of such variations in the wiring resistance, it is necessary to further increase the wiring width of the electrode, which makes it difficult to miniaturize the wiring.

[0012]

As described above, in the conventional solid-state image pickup device having the laminated electrode structure, there is a problem that it is difficult to process the light shielding layer due to a large step in the laminated portion of the charge transfer electrodes. there were. Further, in the conventional solid-state imaging device having the single-layer electrode structure proposed to reduce the step, there is a problem that miniaturization is difficult to prevent an increase in wiring resistance. An object of the present invention is to provide a high-performance solid-state imaging device capable of reducing a step due to an electrode and miniaturizing the same, and a manufacturing method thereof.

[0013]

In order to solve the above-mentioned problems and achieve the object, a solid-state image pickup device according to the present invention has a channel layer formed in a strip shape on a surface portion of a semiconductor substrate and adjacent to the channel region. Then, the photodiode portion formed in the semiconductor substrate, the first insulating film formed on the semiconductor substrate, and the first insulating film are insulated from each other in a direction perpendicular to the channel layer and alternated. A first charge transfer electrode and a second charge transfer electrode formed so as to be adjacent to each other, a part of the first and second charge transfer electrodes, and the photodiode section and the first and second charge transfer electrodes. A solid-state imaging device comprising: a wiring layer connecting to a charge transfer electrode, wherein the first and second charge transfer electrodes on the photodiode section are removed, and the first charge on the channel layer. Feeding electrode and the overlap portion and the second charge transfer electrodes, said those first charge transfer electrode and the second
The upper surfaces of the charge transfer electrodes are formed so as to be a common plane, and a part of the first charge transfer electrode and a part of the second charge transfer electrode of the wiring layer are completely overlapped with each other. It is characterized by being configured.

The solid-state imaging device manufacturing method according to the present invention further includes a step of forming a first electrode material layer on a semiconductor substrate via a first insulating film, and processing the first electrode material layer. Forming a strip-shaped first charge transfer electrode having a two-step staircase shape, forming a second insulating film so as to cover the first charge transfer electrode, and the first charge transfer Forming a conductive material so that the space between the electrodes is completely filled, and forming a second charge transfer electrode by planarizing the surface until the second insulating film is exposed,
Part of the second charge transfer electrode, the insulating film, and the first charge transfer electrode are etched to form an opening exposing the first insulating film, and the first and second electrodes are arranged in parallel. And a step of forming a transfer electrode.

As described above, in the solid-state imaging device according to the present invention, the upper surface of the first charge transfer electrode and the upper surface of the second charge transfer electrode form a common plane. The step difference can be reduced.

Further, since the part of the first electrode and the part of the second electrode forming the wiring layer are completely overlapped with each other, the wiring region can be miniaturized. Further, in the method for manufacturing a solid-state image pickup device according to the present invention,
After the conductive material is formed so that the space between the electrodes is completely filled, the surface is planarized until the second insulating film is exposed to form the second electrode.
The upper surface of the electrode layer composed of the electrodes can be made flat, and the step due to the electrodes can be reduced.

Further, in the method for manufacturing a solid-state image pickup device according to the present invention, after the first electrode is processed so as to have a two-step staircase shape, a conductive material is embedded in the space between the first electrodes. Since the second electrode is formed, it is possible to form the first electrode and the second electrode that partially overlap and partially have a single-layer structure. In this way, the first electrode and the second electrode are formed so as to partially overlap each other,
By using the region in which the two electrodes are overlapped as the wiring region, the area of the wiring region can be reduced and miniaturized as compared with the case where the two electrodes are adjacent to each other to form the wiring region.

[0018]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows a CC according to the present invention.
FIG. 2A is a top view showing the structure of a pixel portion of the D solid-state imaging device, and FIGS. 2A and 2B are AA ′ and B of FIG.
It is -B 'sectional drawing.

As shown in FIG. 1, C according to the present embodiment
The image portion of the CD solid-state image pickup device is, as in the conventional case, a photodiode 1 that constitutes a light receiving portion formed in a matrix arrangement.
6 and four-phase charge transfer electrodes 12 to 15 formed in the row direction of the photodiode 16, for example. No electrode is formed on the photodiode 16.
In the region between the photodiodes 16 in the column direction, for example, the channel region 4 is formed in the semiconductor substrate 1 (shown in FIG. 2).
Is formed, and the gate insulating film 2 is formed on the channel region 4.
The charge transfer electrodes 12 to 15 are formed through (shown in FIG. 2) to form a charge transfer region. Photodiode 16
The charge transfer electrodes 12 to 15 formed in, for example, the row direction region between the charge transfer electrodes 12 to 15 in the charge transfer region.
A wiring region for supplying voltage to 15 is formed. Further, for example, Al, Mo is formed on the region excluding a part of the light receiving portion.
The light shielding layer 17 is formed using a metal material such as Si, and the protective film 20 is formed on the entire surface.

FIG. 2A shows a CC according to this embodiment.
3 illustrates a cross-sectional structure of the charge transfer region of the D solid-state imaging device. As in the conventional case, the channel region 4 is formed in the surface layer portion of the p well 3 formed in the semiconductor substrate 1, and the four-phase charge transfer electrodes 12 to 15 are formed on the channel region 4 via the gate insulating film 2. Has been formed.

However, unlike the conventional CCD solid-state image pickup device shown in FIG. 18, these charge transfer electrodes 12 to 15 are
It is configured so that there is no step on its surface, and FIG.
Unlike the conventional CCD solid-state image pickup device shown in FIG. 0, these charge transfer electrodes 12 to 15 are configured so as to partially overlap each other. That is, as shown in FIG.
For example, the odd-phase electrodes 13 and 15 formed of the first-layer electrode material are processed into a stepped shape, and the even-phase electrodes 12 and 14 formed of the second-layer electrode material are Electrodes 13 and 15 in the stepped portion
Are formed adjacent to each other so as to overlap with. Also, the upper surfaces of the even-phase electrodes 12 and 14 and the odd-phase electrodes 13 and 1
The upper surface of 5 is formed to have the same height. Further, these electrodes 12 to 15 are insulated from each other by the insulating film 8 so that adjacent electrodes are insulated from each other.
A light shielding layer 17 is formed on 15 via an interlayer insulating film 18.

FIG. 2B shows the CC according to this embodiment.
3 illustrates a cross-sectional structure of a light receiving region and a wiring region of the D solid-state imaging device. As in the conventional case, part of the charge transfer electrodes 12 to 15 and part of the light shielding layer 17 are removed to form the light receiving region 16, and the charge transfer electrode 12 remaining between the light receiving regions 16 is formed.
To 15 are configured as wirings for supplying a pulse voltage to the charge transfer electrodes 12 to 15 in the charge transfer region. However, unlike the conventional CCD solid-state imaging device shown in FIG. 18 and FIG. 20, in the CCD solid-state imaging device according to the present embodiment, for example, odd-numbered phase electrodes 13 and 15 formed of the electrode material of the first layer are used. The even-phase electrodes 12 and 14 made of the electrode material of the second layer are formed so as to completely overlap with each other.

As described above, in the CCD solid-state image pickup device according to this embodiment, as shown in FIG. 2A, the charge transfer electrodes 12 to 15 are formed so as not to cause a step on the surface. It is a feature. In the conventional solid-state imaging device, as shown in FIG. 18, since the charge transfer electrodes 12 to 15 have a step on the surface, it is difficult to etch the light shielding layer 17 when processing the light shielding layer 17, and thus the light shielding layer 17 is formed. However, in the present embodiment, the charge transfer electrodes 12 to 15 remain.
Since there is no step on the surface of the light shielding layer 17, the light shielding layer 17 can be easily processed.

Further, in the CCD solid-state image pickup device according to the present embodiment, as shown in FIG. 2B, for example, even-phase electrodes 12 and 14 are arranged on odd-phase electrodes 13 and 15 in the wiring region. The feature is that they are completely overlapped. Therefore, as shown in (b) of FIG. 18 or (b) of FIG.
When the width of the wiring region is the same as that of the conventional solid-state imaging device in which the two are formed so as to be adjacent to each other, the wiring resistance can be reduced, and thus it is possible to achieve further miniaturization. Become.

Further, as shown in FIG. 2B, in the wiring region, the electrode 12 and the electrode 13 or the electrode 14 and the electrode 15 are separated in the vertical direction through the insulating film 8. As shown in (b) or (b) of FIG. 20, the width of the wiring region is equal to the width of the insulating film 8 for separation, as compared with the conventional solid-state imaging device in which adjacent electrodes are laterally separated. Can be reduced.

In the wiring region having such a laminated structure, it is desirable that the electrode 12 and the electrode 13 or the electrode 14 and the electrode 15 have the same film thickness. Since the widths of these electrodes in the wiring region are the same, the wiring resistances of these electrodes can be made equal to each other by making the film thicknesses equal. Therefore, the wiring resistance of the two stacked electrodes can be configured to have the minimum width and the minimum film thickness that are both within the allowable range. In this way, a step difference between the electrodes 12 to 15 and the semiconductor substrate 1 can be reduced, and a solid-state imaging device having a small wiring area can be configured.

Next, a manufacturing method for realizing the above CCD solid-state image pickup device will be described with reference to FIGS. 3 to 8 show a method of manufacturing the solid-state imaging device according to the first embodiment of the present invention, in which (a) is a top view and (b) is BB 'in FIG. 3 (a).
It is sectional drawing. The top view shown in FIGS. 3 to 8A is rotated by 90 degrees with respect to the top view shown in FIG.

First, as in the conventional case, the channel region 4 is formed in a part of the semiconductor substrate 1 in which the p well 3 is formed,
Further, a first electrode material 5 such as a polycrystalline silicon film having a film thickness of about 600 nm is deposited on the surface of the semiconductor substrate 1 via the gate insulating film 2 (FIG. 3).

Next, a resist film 2 having a pattern as shown in FIG. 4A is formed by using, for example, a lithography method.
Form one. Further, the first electrode material 5 is etched using the resist film 21 as a mask by using an anisotropic etching technique such as RIE (reactive ion etching). At this time, as shown in FIG.
No electrode material is etched, preferably only half of the deposited film thickness is etched and half of the film thickness remains.

After that, the resist film 21 is removed, and further, as shown in FIG. 5A, a resist film 22 having a pattern shifted with respect to the step formed on the first electrode material is formed. . Further, the first electrode material 5 is etched by using the resist film 22 as a mask by using an anisotropic etching technique such as RIE method. At this time,
As shown in FIG. 5B, the first electrode material is etched until the insulating film 2 is exposed to form the charge transfer electrodes 13 and 15.

Next, the resist film 22 is removed, and the insulating film 8 is formed by thermal oxidation, for example, so as to cover the charge transfer electrodes 13 and 15. After that, a second electrode material 6 such as a polycrystalline silicon film is deposited (FIG. 6). At this time, the space between the charge transfer electrodes 13 and 15 is at least as high as the upper surface of these electrodes 13 or 15 in the second space.
The deposited film thickness is appropriately set so that the electrode material 6 of FIG.

Further, for example, by using a polishing method,
The second electrode material 6 is etched. At this time, as shown in FIG. 7B, etching is performed until the insulating film 8 on the uppermost surfaces of the charge transfer electrodes 13 and 15 is exposed, so that a second gap is formed between the charge transfer electrodes 13 and 15. Then, the charge transfer electrodes 12 and 14 are formed by burying the electrode material 6 of FIG.

Thereafter, as shown in FIG. 8A, the resist film 23 having the light receiving portion 16 opened so as to be patterned in the portion where the charge transfer electrodes 12 and 13 or 14 and 15 are laminated. To form. Further, using the resist film 23 as a mask, the electrode 12 or 14, the insulating film 8 and the electrode 13 or 15 are etched by using an anisotropic etching technique such as RIE method, and the charge transfer electrodes 12 to 15 wiring regions are formed.

After that, the resist film 23 is removed, the interlayer insulating film 18 is formed, and the light shielding layer 17 is formed on the region excluding the light receiving portion 16 using a metal material such as Al or MoSi. Further, a protective film 20 is formed on the entire surface, and
And the CCD solid-state imaging device as shown in FIG. 2 is completed.

Next, a method of manufacturing the solid-state image pickup device according to the second embodiment of the present invention will be described with reference to FIGS. In the present embodiment, the method of forming the first electrode material 5 in a stepwise shape is different from that of the above-described first embodiment.

First, similarly to the first embodiment, the channel region 4 is formed in a part of the semiconductor substrate 1 in which the p well 3 is formed, and the insulating film 2 is formed on the semiconductor substrate 1. A first-layer first electrode material 5 having a film thickness of, for example, 300 nm, such as a polycrystalline silicon film, is deposited (FIG. 9).

Next, a resist film 21 having a pattern as shown in FIG.
The first electrode material 5 of the first layer is etched by using 1 as a mask. Here, unlike the first embodiment, in the present embodiment, the first electrode material 5 of the first layer is etched until the insulating film 2 is exposed.

After that, a second electrode material 5'of the second layer such as a polycrystalline silicon film having the same film thickness as the first electrode material of the first layer is deposited (FIG. 11). For example, when a polycrystalline silicon film is formed by using, for example, a low pressure CVD (chemical vapor deposition) method, the polycrystalline silicon film grows uniformly in all directions in the upward direction and the lateral direction. Thus, the first electrode material having a shape similar to that of FIG. 4B is formed.

Thereafter, a resist film 22 having a pattern as shown in FIG. 12A is formed in the same manner as in the first embodiment described above, and this resist film 22 is used as a mask to form an electrode material. The first electrode material composed of 5 and the electrode material 5'is etched to form the charge transfer electrodes 13 and 15 ((b) of FIG. 12).

Further, similar to the first embodiment, the charge transfer electrodes 12 and 14 are formed by using the second electrode material such as a polycrystalline silicon film, and the light receiving section 1 is formed.
6 is opened to complete the solid-state imaging device.

Next, a method of manufacturing the solid-state image pickup device according to the third embodiment of the present invention will be described with reference to FIGS. In the present embodiment, as in the second embodiment, the first electrode material is deposited twice to form the first electrode material.
The electrode material 5 of step 1 has a stepwise shape, but differs from the above-described second embodiment in that an etching stopper is provided between the two layers of the first electrode material.

First, similarly to the second embodiment, the channel region 4 is formed in a part of the semiconductor substrate 1 in which the p well 3 is formed, and the insulating film 2 is formed on the semiconductor substrate 1. A first-layer first electrode material 5 having a film thickness of, for example, 300 nm, such as a polycrystalline silicon film, is deposited (FIG. 13). FIG. 13 shows a state similar to that of FIG.

Next, unlike the second embodiment, a stopper film 7 such as an oxide film is deposited on the first electrode material 5 of the first layer. Further, a resist film 21 having a pattern as shown in FIG. 14A is formed, and the oxide film 7 is etched by using the resist film 21 as a mask (FIG. 14B).

After that, the resist film 21 is removed, and a second-layer first electrode material 5 ′ such as a polycrystalline silicon film having a film thickness similar to that of the first-layer first electrode material 5 is formed. Deposit (FIG. 15).

Next, a resist film 22 having a pattern as shown in FIG.
The first electrode materials 5 and 5 ′ are etched using 2 as a mask. At this time, the etching conditions are set so that the etching rate of the stopper film 7 is slower than the etching rate of the first electrode material, so that the stopper film 7 is used as an etching stopper as shown in FIG. Thus, the first electrode material 5 under the stopper film 7 can be left.

Thus, the two layers of the first electrode material 5 are formed.
And 5 ', the stepwise charge transfer electrodes 13 and 1
5 can be formed. After this, similarly to the first or second embodiment described above, the insulating film 8 is formed by, for example, thermal oxidation, the second electrode material is deposited, and the CCD solid-state imaging device is subjected to the above-described steps. Is completed.

Here, in order to prevent the insulating film 2 from being etched and the semiconductor substrate 1 from being etched by over-etching when etching the first electrode materials 5 and 5 ′, this first electrode material is generally used. The etching conditions are set so that the etching rates of the electrode materials 5 and 5'are higher than the etching rate of the insulating film 2. Therefore, it is desirable that the stopper film 7 is made of the same material as the insulating film 2 because the etching conditions can be easily set.

Furthermore, the film thickness of the stopper film 7 is set so that the stopper film 7 is not completely removed and remains by the etching of the first electrode materials 5 and 5 '.
It is appropriately set depending on the film thickness of the first electrode materials 5 and 5 '.

In the first to third embodiments described above, the polycrystalline silicon film deposited as the first and second electrode materials is appropriately doped with impurities by, for example, phosphorus diffusion or ion implantation. It is possible to add, and it is also possible to add impurities at the same time when the polycrystalline silicon film is deposited.

As described above, in the above-described first to third embodiments, the charge transfer is performed by embedding the second electrode material between the charge transfer electrodes 13 and 15 formed of the first electrode material. The electrodes 12 and 14 are formed. Therefore, it is possible to easily form a structure having no steps on the upper surfaces of the charge transfer electrodes 12 to 15.

For this reason, it becomes possible to prevent the etching from becoming difficult at the step portion and to easily process the light shielding layer 17. Further, after the first electrode material is processed into a step-like shape, the second electrode material is embedded to form the electrodes 13 and 15 formed of the first electrode material and the second electrode material. A structure in which the formed electrodes 12 and 14 are partially laminated can be formed. Further, by patterning the region in which the two electrodes are laminated in this way and etching the light receiving portion 16, the wiring regions of the electrodes 12 to 15 can be easily formed into a laminated structure.

Therefore, the area of the wiring region can be reduced without reducing the width of the wiring. Furthermore, for example, two stacked electrodes such as the electrode 12 and the electrode 13 or the electrode 14 and the electrode 15 are simultaneously processed by the same pattern, so that the resistance values of the two electrodes are affected by the misalignment of the patterning. There is no variation. Therefore, in order to reduce the resistance value to a certain reference value or less, it is not necessary to increase the wiring width in consideration of the increase in resistance due to misalignment, so that the wiring region can be further miniaturized.

Further, as described above, when the electrodes 12 and 13 and the electrodes 14 and 15 having the laminated structure have the same film thickness in the wiring region, the wiring resistances of the two laminated electrodes are equal to each other. As a result, in order to realize the wiring resistance within the allowable range, it becomes possible to configure the finest solid-state imaging device with the smallest step. Here, according to the second or third embodiment of the present invention, such a structure can be easily realized with good controllability, as compared with the first embodiment of the present invention.

That is, in the above-described second or third embodiment, particularly, the first electrode material 5 of the first layer and the first electrode material 5'of the second layer have the same film thickness. The thick portion of the electrode 13 or 15 made of the first electrode material is twice as thick as the thin portion by depositing on the first electrode material. Further, when the second electrode material is embedded so that the surface height of the second electrode material is equal to the surface height of the first electrode material, the film thickness of the first electrode material 5 and the second electrode material 5 are formed in the laminated portion. The film thickness of the material 6 can be made equal.

As described above, in the second or third embodiment of the present invention, the first electrode material is deposited in two steps,
By controlling the thickness of each deposited film, it is possible to control the film thickness of each electrode forming the laminated structure. Therefore, the etching of the first electrode material is stopped halfway to form a stepwise electrode. As compared with the first embodiment in which the film thickness of each electrode forming the laminated structure is controlled by this etching amount, it becomes possible to easily and accurately control these film thicknesses.

Furthermore, in the third embodiment of the present invention,
First layer first electrode material 5 and second layer first electrode material 5
By forming the stopper layer 7 between the resist film 21 and 22 ', patterning of the resist films 21 and 22 can be facilitated.

That is, as shown in FIG. 11, in the second embodiment, the first electrode material 5 ′ of the second layer also extends vertically around the first electrode material 5 of the first layer. It is deposited so as to have a substantially similar film thickness in the lateral direction. Therefore, as shown in FIG. 10, it is necessary to make the width of the first electrode material of the first layer extremely small with respect to the width of the thick region in the stepwise first electrode material. The patterning of the resist film 21 may be difficult.

On the other hand, in the third embodiment, since the resist film 22 having the same width as the width of the thick region in the step-shaped first electrode material may be patterned, the patterning is performed. Can be facilitated.

Further, in the first embodiment, since the first electrode material is processed into a stepwise shape by etching,
The first electrode material is deposited only once. When depositing, for example, a polycrystalline silicon film as an electrode material, in practice, an impurity is added to the polycrystalline silicon film, or the polycrystalline silicon film deposited on the back surface of the semiconductor substrate is removed. A process is required. Therefore, the number of steps can be greatly reduced in the first embodiment as compared with the second or third embodiment in which the first electrode material layer is formed by two deposition steps.

Although the polishing method is used in the step of burying the second electrode material in the above-described first to third embodiments, another burying method such as a resist etch back method may be used. It is possible.

[0061]

As described above, in the solid-state image pickup device according to the present invention, since the step due to the electrode is reduced and the wiring portion has a two-layer structure, a sufficient width can be given and the resistance can be increased without increasing the resistance. Can be converted.

Further, according to the method of manufacturing a solid-state image pickup device of the present invention, it is possible to easily manufacture a high-performance solid-state image pickup device which can reduce a step due to such an electrode and miniaturize it.

[Brief description of drawings]

FIG. 1 is a top view showing the structure of a solid-state imaging device according to the present invention.

FIG. 2 is a sectional view showing the structure of a solid-state imaging device according to the present invention.

3A and 3B are a top view and a cross-sectional view showing the method of manufacturing the solid-state imaging device according to the first embodiment of the invention.

4A and 4B are a top view and a cross-sectional view showing the method of manufacturing the solid-state imaging device according to the first embodiment of the invention.

5A and 5B are a top view and a cross-sectional view showing the method of manufacturing the solid-state imaging device according to the first embodiment of the invention.

6A and 6B are a top view and a cross-sectional view showing the method of manufacturing the solid-state imaging device according to the first embodiment of the invention.

7A and 7B are a top view and a cross-sectional view showing the method of manufacturing the solid-state imaging device according to the first embodiment of the invention.

8A and 8B are a top view and a cross-sectional view showing the method of manufacturing the solid-state imaging device according to the first embodiment of the invention.

9A and 9B are a top view and a cross-sectional view showing the method of manufacturing the solid-state imaging device according to the second embodiment of the invention.

10A and 10B are a top view and a cross-sectional view showing the method of manufacturing the solid-state imaging device according to the second embodiment of the invention.

11A and 11B are a top view and a cross-sectional view showing the method of manufacturing the solid-state imaging device according to the second embodiment of the invention.

12A and 12B are a top view and a cross-sectional view showing the method of manufacturing the solid-state imaging device according to the second embodiment of the invention.

13A and 13B are a top view and a cross-sectional view showing the method of manufacturing the solid-state imaging device according to the third embodiment of the invention.

14A and 14B are a top view and a cross-sectional view showing a method of manufacturing a solid-state imaging device according to a third embodiment of the invention.

15A and 15B are a top view and a cross-sectional view showing the method of manufacturing the solid-state imaging device according to the third embodiment of the invention.

16A and 16B are a top view and a cross-sectional view showing the method of manufacturing the solid-state imaging device according to the third embodiment of the invention.

FIG. 17 is a top view showing the structure of a conventional solid-state imaging device.

FIG. 18 is a sectional view showing the structure of a conventional solid-state imaging device.

FIG. 19 is a top view showing the structure of a conventional solid-state imaging device.

FIG. 20 is a sectional view showing the structure of a conventional solid-state imaging device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Semiconductor substrate, 2, 8, 18 ... Insulating film, 3 ... Well, 4 ... Channel region, 5 5 '... 1st electrode material, 6 ... 2nd electrode material, 7 ... Stopper layer, 12, 13 , 14, 15 ... Charge transfer electrodes, 17 ... Light shielding layer, 20 ... Protective film, 21, 22, 23 ... Resist film

Claims (7)

[Claims] 1. A channel layer formed in a strip shape on a surface portion of a semiconductor substrate, a photodiode portion formed in the semiconductor substrate adjacent to the channel region, and a first portion formed on the semiconductor substrate. An insulating film, a first charge transfer electrode and a second charge transfer electrode formed on the first insulating film so as to be insulated from each other in a direction perpendicular to the channel layer and alternately adjacent to each other; A wiring layer which is formed of a part of the first and second charge transfer electrodes and connects the photodiode section and the first and second charge transfer electrodes to each other; In the solid-state imaging device in which the second charge transfer electrode is removed, the first charge transfer electrode and the second charge transfer electrode on the channel layer partially overlap with each other, and the first charge transfer electrode And the above The upper surfaces of the second charge transfer electrodes are configured to be a common plane, and a part of the first charge transfer electrode and a part of the second charge transfer electrode of the wiring layer completely overlap with each other. A solid-state image pickup device comprising: 2. The solid-state imaging device according to claim 1, wherein the film thickness of the first charge transfer electrode and the film thickness of the second charge transfer electrode in the wiring region are equal to each other. 3. A step of forming a first electrode material layer on a semiconductor substrate with a first insulating film interposed therebetween, and a step of processing the first electrode material layer to form a strip-shaped first step. A step of forming a first charge transfer electrode, a step of forming a second insulating film so as to cover the first charge transfer electrode, and a space between the first charge transfer electrodes being completely filled. Forming a conductive material on the substrate, forming a second charge transfer electrode by flattening the surface until the second insulating film is exposed, the second charge transfer electrode, the insulating film, and the second charge transfer electrode. Etching a part of the first charge transfer electrode to form an opening in which the first insulating film is exposed to form first and second transfer electrodes arranged in parallel. And a method for manufacturing a solid-state imaging device. 4. The first charge transfer electrode comprises: forming an electrode material layer on the first insulating film; forming a strip-shaped first resist film on the electrode material layer; The step of partially etching the electrode material using the first resist film as a mask, the step of removing the first resist film, and the pattern of the first resist film partially overlapping 4. The method of manufacturing a solid-state imaging device according to claim 3, wherein the step of etching the electrode material until the first insulating film is exposed using a second resist film having a strip-shaped pattern as a mask is formed stepwise. 5. The first charge transfer electrode comprises a step of forming a first electrode material layer on the first insulating film, and a strip-shaped first resist film on the first electrode material layer. And a step of etching the first electrode material layer by using the first resist film as a mask to expose the first insulating film, and the exposed first insulating film and the remaining portion. First
A step of depositing a second electrode material on the second electrode material layer to form a second electrode material layer having band-shaped irregularities on the surface, and a step of forming the second band-shaped convex portion on the second electrode material layer. Forming a second resist film having a striped pattern in which portions overlap, and exposing the first insulating film by etching at least the second electrode material layer using the second resist film as a mask The method for manufacturing a solid-state imaging device according to claim 3, wherein the solid-state imaging device is formed stepwise by and. 6. The first charge transfer electrode comprises: a step of forming a first electrode material layer on the first insulating film; and a step of forming a stopper layer on the first electrode material layer. A step of etching the stopper layer to expose the first electrode material layer using the strip-shaped first resist film formed on the stopper layer as a mask, and the exposed first electrode material layer and the remaining Forming a second electrode material layer on the stopper layer, and forming a second resist film on the second electrode material layer having a band-shaped pattern partially overlapping the pattern of the stopper layer. Process, and using the second resist film as a mask, the second electrode material layer and the first electrode material layer
4. The method for manufacturing a solid-state imaging device according to claim 3, wherein the step is formed by etching the electrode material layer and the step of exposing the first insulating film. 7. The film thickness of the first charge transfer electrode and the film thickness of the first charge transfer electrode in a region where the first charge transfer electrode and the second charge transfer electrode have a laminated structure with the second insulating film interposed therebetween. 7. The method for manufacturing a solid-state imaging device according to claim 3, wherein the second charge transfer electrodes have the same film thickness.