JPH09266402A - Manufacture of conductor imbeded dielectric filter - Google Patents

Manufacture of conductor imbeded dielectric filter

Info

Publication number
JPH09266402A
JPH09266402A JP9768496A JP9768496A JPH09266402A JP H09266402 A JPH09266402 A JP H09266402A JP 9768496 A JP9768496 A JP 9768496A JP 9768496 A JP9768496 A JP 9768496A JP H09266402 A JPH09266402 A JP H09266402A
Authority
JP
Japan
Prior art keywords
conductor
dielectric
embedded
primary substrate
primary
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9768496A
Other languages
Japanese (ja)
Inventor
Yuji Matsushita
祐二 松下
Kazuhisa Yamazaki
和久 山崎
Tomohiko Tsugai
智彦 番
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
FDK Corp
Original Assignee
FDK Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by FDK Corp filed Critical FDK Corp
Priority to JP9768496A priority Critical patent/JPH09266402A/en
Publication of JPH09266402A publication Critical patent/JPH09266402A/en
Pending legal-status Critical Current

Links

Landscapes

  • Control Of Motors That Do Not Use Commutators (AREA)

Abstract

PROBLEM TO BE SOLVED: To reduce the electric resistance of the imbeded conductor, to allow gaps to be hardly caused in the vicinity of the conductor part at lamination and to avoid production of exfoliation at baking by punching a primary board made of a dielectric material into a conductor shape to be imbeded and filling in conductor paste to punched holes. SOLUTION: A required number of dielectric sheets 30 are laminated and pressed lightly. Then a primary board 32 is obtained. The primary board 32 are punched into a conductor shape to be imbeded. Furthermore, a conductor paste 36 is put on an upper face of the primary board 32 and the paste is filled in punched holes 34 formed on the primary board 32. Then an uppermost layer of dielectric sheet 30a is exfoliated. Then the conductor imbeded primary board 38 is obtained. Since the laminated dielectric sheets 30 are lightly pressed, only the uppermost layer of dielectric sheet 30a is easily exfoliated. Then the conductor paste 36 adhered to the upper face of the dielectric sheet 30a is also removed at the same time.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は、誘電体チップの内
部に内部導体を設け、外側に外導体と入出力電極とを設
ける構造の誘電体フィルタを製造する方法に関するもの
である。更に詳しく述べると本発明は、誘電体からなる
一次基板を、各種の埋設すべき導体形状に打ち抜き、そ
の打抜き穴に導電ペーストを充填し、得られる一次基板
を積層一体化し焼成することにより導体埋設型の誘電体
フィルタを製造する方法に関するものである。この方法
により製造した誘電体フィルタは、例えばマイクロ波帯
で用いる各種移動体通信機器等に使用される。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a dielectric filter having a structure in which an inner conductor is provided inside a dielectric chip and an outer conductor and an input / output electrode are provided outside. More specifically, according to the present invention, a primary substrate made of a dielectric material is punched into various conductor shapes to be embedded, the punched holes are filled with a conductive paste, and the obtained primary substrates are laminated and integrated to form a conductor-embedded conductor. Type dielectric filter. The dielectric filter manufactured by this method is used, for example, in various mobile communication devices used in the microwave band.

【0002】[0002]

【従来の技術】誘電体材料を使用するマイクロ波用フィ
ルタは多種多様である。その一つに共振器をストリップ
線路で構成する形式がある。例えば1/4波長共振器の
場合には、誘電体材料の内部にストリップ線路型の共振
器内導体を設けて、その一端が開放端となり、他端が誘
電体材料の外表面の外導体(アース導体)に短絡される
ように構成する。基本的には、誘電体材料の内部におい
て、共振波長の1/4の奇数倍の長さに設定した共振器
内導体を複数個、適当な結合度となるように所定の間隔
で並設することによって帯域通過フィルタ特性が得られ
る。
2. Description of the Related Art There are many types of microwave filters that use dielectric materials. One of them is a type in which the resonator is composed of a strip line. For example, in the case of a quarter wavelength resonator, a stripline type resonator internal conductor is provided inside the dielectric material, one end of which is an open end, and the other end is an outer conductor of the outer surface of the dielectric material ( Ground conductor). Basically, a plurality of in-resonator conductors set to have a length that is an odd multiple of 1/4 of the resonance wavelength are arranged in parallel inside the dielectric material at a predetermined interval so as to have an appropriate degree of coupling. As a result, a bandpass filter characteristic is obtained.

【0003】近年の通信機器の小型化に伴い、誘電体フ
ィルタも一層の小型化が要求され、それに対応すべく一
部で積層構造が採用されている。これは、多数の未焼結
の誘電体シート(グリーンシート)を積層し、必要な内
部導体パターンを印刷した誘電体シートが内部で挾まれ
るように組み入れ、最外層に外導体パターンを有する誘
電体シートを配置して圧着一体化し、チップ側面に必要
な導電材料を付着して側面外導体を形成し、焼結するこ
とによって製造する方法である。
[0003] With the recent miniaturization of communication equipment, dielectric filters have been required to be further miniaturized, and in order to cope with this, a laminated structure has been partially adopted. This is because a dielectric sheet with a large number of unsintered dielectric sheets (green sheets) laminated and the necessary internal conductor pattern printed is sandwiched internally, and the outermost layer has an outer conductor pattern. In this method, a body sheet is arranged, pressure-bonded and integrated, a necessary conductive material is attached to the side surface of the chip to form an outer conductor on the side surface, and sintering is performed.

【0004】例えば2段インターデジタル型積層誘電体
フィルタの一例を図12に示す。単なる誘電体シート
(導体パターンを形成していない誘電体シート)10の
他に、導電ペーストを用いてスクリーン印刷法により表
面に共振器内導体パターンを印刷した誘電体シート12
と、全面に外導体パターンを印刷した誘電体シート14
と、H型の外導体パターン15aとそれとは絶縁されて
いる2個の矩形状の入出力電極パターン15bの両方を
印刷した誘電体シート16を用意する。ここで共振器内
導体パターンは、直線状の導体パターンを2本平行に配
置したパターンになっている。
An example of a two-stage interdigital type laminated dielectric filter is shown in FIG. In addition to a simple dielectric sheet (dielectric sheet not having a conductor pattern) 10, a dielectric sheet 12 having a resonator conductor pattern printed on its surface by screen printing using a conductive paste
And a dielectric sheet 14 having an outer conductor pattern printed on the entire surface
Then, the dielectric sheet 16 on which both the H-shaped outer conductor pattern 15a and the two rectangular input / output electrode patterns 15b insulated from it are prepared. Here, the conductor pattern in the resonator is a pattern in which two linear conductor patterns are arranged in parallel.

【0005】共振器内導体パターンを印刷した誘電体シ
ート12を中央に配置し、両側に単なる誘電体シート1
0を必要枚数積層し、最上面には外導体パターンを形成
した誘電体シート14を、最下層には外導体パターンと
入出力電極パターンを形成した誘電体シート16を配置
し、加熱加圧することにより圧着一体化する。なお最下
層の誘電体シート16は、外側面(図12では下面)に
外導体パターンと入出力電極パターンが現れる向きで積
層する。その後、チップの側面に導電ペーストを塗布し
て外導体20と入出力電極22となる側面導体を形成
し、焼成することによって積層誘電体フィルタ24が得
られる。
A dielectric sheet 12 on which an in-resonator conductor pattern is printed is arranged in the center, and simple dielectric sheets 1 are provided on both sides.
0 is laminated in the required number, the dielectric sheet 14 with the outer conductor pattern formed on the uppermost surface, and the dielectric sheet 16 with the outer conductor pattern and the input / output electrode pattern formed on the lowermost layer are heated and pressed. By press-bonding to integrate. The lowermost dielectric sheet 16 is laminated so that the outer conductor pattern and the input / output electrode pattern appear on the outer surface (lower surface in FIG. 12). After that, a conductive paste is applied to the side surface of the chip to form side conductors that will become the outer conductor 20 and the input / output electrodes 22, and the firing is performed, whereby the laminated dielectric filter 24 is obtained.

【0006】通常、このような製法においては多数個取
りが出来るように、大きな面積の誘電体シートを使用
し、それに必要なパターンが縦横に規則的に配列される
ように印刷し、圧着一体化した後に、縦横に切断して一
個一個のチップに分離する方法が採用されている。
Usually, in such a manufacturing method, a dielectric sheet having a large area is used so that a large number of pieces can be taken, and printing is carried out so that necessary patterns are regularly arranged in the vertical and horizontal directions, and pressure bonding and integration are performed. After that, a method is adopted in which the chips are cut vertically and horizontally and separated into individual chips.

【0007】導体パターンの印刷は、銀系の導電ペース
トを用いて、誘電体シート上にスクリーン印刷すること
により行っている。従って、誘電体シート上に導体パタ
ーンが載った状態となる。誘電体シートは、マイクロ波
用誘電体セラミックス粉末を有機バインダで結合してシ
ート化したものであり、数十μm程度の厚さである。そ
の上に形成する導体パターンは、電気抵抗を少なくする
ためになるべく厚く、十数〜数十μm程度にしている。
このような導体パターンを印刷した誘電体シートを中に
挾み込むように、多数の誘電体シートを所定の順序で積
層して加熱プレスによって圧着一体化を図っている。
The conductor pattern is printed by screen-printing on a dielectric sheet using a silver-based conductive paste. Therefore, the conductor pattern is placed on the dielectric sheet. The dielectric sheet is a sheet obtained by bonding dielectric ceramic powder for microwaves with an organic binder and has a thickness of about several tens of μm. The conductor pattern formed thereon is as thick as possible in order to reduce electric resistance, and has a thickness of about ten and several tens of μm.
A large number of dielectric sheets are laminated in a predetermined order so as to sandwich the dielectric sheet having such a conductor pattern printed therein, and they are pressed and integrated by a heat press.

【0008】[0008]

【発明が解決しようとする課題】誘電体シートは、前述
のように未焼成の状態(セラミックス粉末が有機バイン
ダで結合されている状態)であり且つ数十μmという薄
いものであるために、導電ペーストを用いて印刷した時
に導電ペーストに含まれているビヒクルが原因となって
シートアタックと呼ばれる現象が生じる。シートアタッ
クとは、ビヒクルの付着によってシートに皺ができるよ
うに変形する現象のことである。そのように変形したシ
ートを用いて積層一体化すると、内部の導体パターンと
外部の導体パターンがずれて特性のばらつきが大きくな
る。シートアタックを防止するためには、誘電体シート
と相性の良いビヒクルを含む導電ペーストを使用するし
か方法は無い。しかし一般に相性の良い導電ペーストは
急速に乾燥する性質を有するものであり、そのような導
電ペーストを用いると2〜3回印刷すれば乾いてしま
う。そのためスクリーンを清浄化して次の印刷を行う必
要が生じ、作業性が極めて悪い。つまり従来技術では、
使用可能な導電ペーストに大きな制約があり、印刷作業
性の良好なビヒクルを含む導電ペーストが使用できない
問題がある。
As described above, the dielectric sheet is in a non-fired state (state in which the ceramic powder is bound with the organic binder) and is as thin as several tens of μm, so that the conductive sheet When printing is performed using the paste, the phenomenon called sheet attack occurs due to the vehicle contained in the conductive paste. Sheet attack is a phenomenon in which a vehicle is deformed so as to be wrinkled by the adhesion of a vehicle. When the sheets thus deformed are laminated and integrated, the inner conductor pattern and the outer conductor pattern are displaced from each other, resulting in large variations in characteristics. The only way to prevent sheet attack is to use a conductive paste containing a vehicle that is compatible with the dielectric sheet. However, in general, a conductive paste having a good compatibility has a property of being dried rapidly, and if such a conductive paste is used, it will be dried if printed 2-3 times. Therefore, it is necessary to clean the screen and perform the next printing, and the workability is extremely poor. In other words, in the prior art,
There is a large limitation on the conductive paste that can be used, and there is a problem that a conductive paste containing a vehicle with good printing workability cannot be used.

【0009】また導体パターンを印刷した誘電体シート
を積層し加圧して圧着一体化する工程を経るが、導体パ
ターンの端部近傍で誘電体シート間に隙間が発生しやす
い。これは、比較的厚い導体パターンが印刷されて表面
に載っている凹凸のある誘電体シートと何も印刷されて
いない平坦な誘電体シートとが重なり合うために、加圧
の際に圧力が不均一となり、導体パターンの端部近傍で
充分な圧力がかかり難いためである。これは積層ブロッ
クで凹凸ができる原因となるばかりでなく、このような
隙間が発生すると、隙間は空気層であるので周囲の誘電
体材料よりも比誘電率が非常に小さく、Qが低下する原
因となる。また隙間は誘電体シート同士が十分に圧着さ
れていない状態であるため、焼成時の剥離の原因とな
る。
Further, although a process of laminating dielectric sheets printed with conductor patterns and pressurizing and integrating them is performed, a gap is apt to occur between the dielectric sheets in the vicinity of the end portions of the conductor patterns. This is because the dielectric sheet with unevenness on which a comparatively thick conductor pattern is printed and which is placed on the surface overlaps with the flat dielectric sheet with nothing printed on it, so the pressure is not uniform during pressurization. This is because it is difficult to apply sufficient pressure near the end of the conductor pattern. This not only causes unevenness in the laminated block, but when such a gap occurs, the gap is an air layer, so the relative dielectric constant is much smaller than that of the surrounding dielectric material, and the cause of deterioration of Q Becomes Further, the gap is a state in which the dielectric sheets are not sufficiently pressure-bonded to each other, which causes separation during firing.

【0010】更に従来技術では積層したブロックを縦横
に切断してチップ化し、その後で側面に外導体の印刷を
行う必要がある。そのため作業効率が悪く、時間がかか
り、側面角部でのパターン切れも起こり易い。
Further, in the prior art, it is necessary to cut the stacked blocks vertically and horizontally into chips, and then print the outer conductor on the side surfaces. As a result, work efficiency is low, it takes time, and pattern breakage easily occurs at the side corners.

【0011】本発明の目的は、各種の内部に埋設すべき
導体を厚くできるために、導体の電気抵抗を著しく小さ
くでき、しかも積層時に導体部分の近傍で隙間が生じ難
く、そのため特性が良好で焼成時に剥がれなども生じな
いような誘電体フィルタの製造方法を提供することであ
る。また本発明の目的は、積層を行うだけで側面導体も
同時に形成でき、それ故、切断後の導電ペースト塗布作
業が不要となるなど工程を大幅に簡素化でき、生産効率
を高めることのできる誘電体フィルタの製造方法を提供
することである。
The object of the present invention is to make the conductors to be embedded inside various kinds thicker, so that the electric resistance of the conductors can be remarkably reduced, and moreover, gaps are less likely to occur in the vicinity of the conductor portions during lamination, and therefore the characteristics are good. It is an object of the present invention to provide a method for manufacturing a dielectric filter that does not peel off during firing. Another object of the present invention is to make it possible to simultaneously form the side conductors only by stacking layers, and therefore, it is possible to greatly simplify the process, such as eliminating the need to apply the conductive paste after cutting, and to improve the production efficiency. A method of manufacturing a body filter is provided.

【0012】[0012]

【課題を解決するための手段】本発明は、誘電体の内部
に内部導体を設け、外側に外導体と入出力電極とを設け
る構造の誘電体フィルタを製造する方法である。本発明
の特徴は、誘電体からなる一次基板を各種の埋設すべき
導体形状に打ち抜き、その打抜き穴に導電ペーストを充
填し、それらの導体埋設一次基板を積層一体化し、焼成
することで導体埋設型誘電体フィルタを製造する方法で
ある。
The present invention is a method for producing a dielectric filter having a structure in which an inner conductor is provided inside a dielectric and an outer conductor and an input / output electrode are provided outside. A feature of the present invention is that a primary substrate made of a dielectric material is punched into various conductor shapes to be embedded, the punching holes are filled with a conductive paste, and the conductor-embedded primary substrates are laminated and integrated, and the conductor is embedded by firing. A method for manufacturing a dielectric filter.

【0013】ここで一次基板は、1枚の誘電体シートに
より構成してもよいが、通常、複数枚の誘電体シートを
積層したものが望ましい。例えば、厚さ数十μmの誘電
体シートを数〜十数枚積層して一次基板とする。最も好
ましい構成は、外導体と入出力電極を埋設した第1の一
次基板と、入出力電極と外導体のための側面導体を埋設
した第2の一次基板と、共振器内導体と共に入出力電極
と外導体のための側面導体を埋設した第3の一次基板
と、外導体のための側面導体を埋設した第4の一次基板
と、外導体を埋設した第5の一次基板とを、その順序で
積層一体化し、側面導体の位置で切断してチップ化し、
焼成する方法がある。
Here, the primary substrate may be composed of one dielectric sheet, but it is usually desirable to laminate a plurality of dielectric sheets. For example, several to several tens of dielectric sheets having a thickness of several tens of μm are laminated to form a primary substrate. The most preferable configuration is a first primary substrate in which an outer conductor and an input / output electrode are embedded, a second primary substrate in which side conductors for the input / output electrode and the outer conductor are embedded, and an input / output electrode together with a resonator inner conductor. And a third primary substrate in which side conductors for the outer conductor are embedded, a fourth primary substrate in which side conductors for the outer conductor are embedded, and a fifth primary substrate in which the outer conductor is embedded, in that order. Laminated and integrated with, and cut at the position of the side conductor to make a chip,
There is a firing method.

【0014】なお一次基板として単一の誘電体シートを
用いる場合には、同一形状の導体埋設一次基板を複数枚
積層することで、導体厚さを厚くし、電気抵抗を十分に
小さくした積層基板を構成することもできる。
When a single dielectric sheet is used as the primary substrate, a plurality of conductor-embedded primary substrates having the same shape are laminated to increase the conductor thickness and sufficiently reduce the electric resistance. Can also be configured.

【0015】[0015]

【発明の実施の形態】複数枚の誘電体シートからなる一
次基板を、各種の埋設すべき導体形状に合わせて打ち抜
き、その打抜き穴に導電ペーストを充填することによ
り、内部導体を十分に厚く形成することが可能となる。
また側面導体も一次基板とほぼ同じ厚さとなるために、
上下の一次基板間での電気的な接続が可能となる。従っ
て、所定形状の導体を含む一次基板を積層一体化するこ
とにより、その時点で側面導体が電気的に接続された状
態となるために、積層ブロックを切断した後は焼成する
だけでよく、後工程での側面の導電ペースト塗布作業は
不要となる。また一次基板は複数枚の誘電体シートを積
層した状態であるために、一度に打ち抜けば打抜き穴、
ひいてはその打抜き穴に充填される導体のずれは生じ
ず、精度のよい誘電体フィルタが得られることになる。
BEST MODE FOR CARRYING OUT THE INVENTION A primary substrate composed of a plurality of dielectric sheets is punched out according to various conductor shapes to be buried, and the punching holes are filled with a conductive paste to form a sufficiently thick inner conductor. It becomes possible to do.
Also, since the side conductors have almost the same thickness as the primary substrate,
Electrical connection between the upper and lower primary substrates becomes possible. Therefore, by laminating and integrating the primary substrates including the conductors of a predetermined shape, the side surface conductors are electrically connected at that point, so it is only necessary to fire after cutting the laminated block. It is not necessary to apply the conductive paste on the side surface in the process. Further, since the primary substrate is a state in which a plurality of dielectric sheets are laminated, punching holes if punched at a time,
As a result, the conductors filling the punched holes are not displaced, and a highly accurate dielectric filter can be obtained.

【0016】[0016]

【実施例】図1は本発明に係る誘電体フィルタの製造方
法の一実施例を示すフローシートである。誘電体シート
はマイクロ波用誘電体セラミックス粉末を有機バインダ
で結合してシート化したものであり、厚さは50〜80
μm程度である。これを複数枚(数〜十数枚)積層し、
軽く圧接することで一次基板を作製する。これが一次積
層工程である。一次基板は厚さ450〜720μm程度
とする。この一次基板を、各種の埋設すべき導体形状に
合わせて打ち抜き(打抜き工程)、その打抜き穴に導電
ペーストを充填して(導電ペースト充填工程)、導体埋
設一次基板を作製する。導電ペースト充填工程では、誘
電体シート積層体の最上層の誘電体シートをマスクとし
て導電ペーストを塗り込み、その後にその最上層の誘電
体シートを剥がす。これにより、第2層以下の誘電体シ
ート積層体の打抜き穴に、綺麗に導電ペーストを充填す
ることができる。勿論、一次基板の上面にフィルムを載
置しておき、そのフィルムと一緒に一次基板を打ち抜
き、該フィルム上から導電ペーストを塗り込んだ後、フ
ィルムを剥がすようにしてもよい。マスクとなるフィル
ムとしては、例えばポリエステルフィルム(商品名:マ
イラー)のように剥離性が良好で且つ強靱な薄いフィル
ムが望ましい。次に、各種の導体埋設一次基板を所定の
順序で積層する(本積層工程)。そして熱と圧力を加え
て全体を完全に接合し、積層ブロックとする。この積層
ブロックを側面導体の位置で切断して一個一個のチップ
に分離し、その後、焼成を行うことで完成品(誘電体フ
ィルタ)が得られる。
EXAMPLE FIG. 1 is a flow sheet showing an example of a method for manufacturing a dielectric filter according to the present invention. The dielectric sheet is a sheet obtained by binding dielectric ceramic powder for microwaves with an organic binder and has a thickness of 50 to 80.
It is about μm. Laminate a plurality of these (several to dozens),
A primary substrate is manufactured by lightly pressing. This is the primary stacking process. The thickness of the primary substrate is about 450 to 720 μm. This primary substrate is punched (punching step) according to various conductor shapes to be buried, and the punching hole is filled with a conductive paste (conductive paste filling step) to produce a conductor-embedded primary substrate. In the conductive paste filling step, the conductive paste is applied using the uppermost dielectric sheet of the dielectric sheet laminate as a mask, and then the uppermost dielectric sheet is peeled off. As a result, the punching holes of the dielectric sheet laminated body of the second layer or lower can be filled with the conductive paste cleanly. Of course, the film may be placed on the upper surface of the primary substrate, the primary substrate may be punched out together with the film, the conductive paste may be applied onto the film, and then the film may be peeled off. As the mask film, a thin film having good peelability and toughness, such as a polyester film (trade name: Mylar), is desirable. Next, various conductor-embedded primary substrates are laminated in a predetermined order (main lamination process). Then, heat and pressure are applied to completely bond the whole to form a laminated block. This laminated block is cut at the position of the side surface conductors to be separated into individual chips, and then baked to obtain a finished product (dielectric filter).

【0017】図2は、打抜き・充填工程を示す工程説明
図である。前記のように、誘電体シート30を必要枚数
積層し(A参照)軽く圧接する。これによって一次基板
が得られる。次にBに示すように、その一次基板32
を、各種の埋設すべき導体形状に合わせて打ち抜く。打
抜き穴を符号34で示す。ここでは図面を分かり易くす
るために、単なる短冊状の打抜き穴34を例にとって説
明しているが、この打抜き穴の形状には特に意味はな
い。更にCに示すように、一次基板32の上面に導電ペ
ースト36を盛り、それを一次基板32に形成した打抜
き穴34に充填する(塗り込む)。そしてDに示すよう
に、最上層の誘電体シート30aを剥がす。これにより
導体埋設一次基板38が得られる。積層した誘電体シー
トは軽く圧着されているだけであるから、容易に最上層
の誘電体シートのみを剥がすことができる。それと同時
に最上層の誘電体シートの上面に付着している導電ペー
ストも除去できる。従って、得られた一次基板には、打
抜き穴に埋設された導電ペーストのみが残ることにな
る。この状態では、埋設した導体の厚さは、一次基板の
厚さとほぼ同じとなる。
FIG. 2 is a process explanatory view showing a punching / filling process. As described above, the required number of dielectric sheets 30 are laminated (see A) and lightly pressed. This gives the primary substrate. Next, as shown in B, the primary substrate 32
Are punched out according to various conductor shapes to be buried. The punched holes are shown at 34. Here, in order to make the drawings easy to understand, a simple strip-shaped punching hole 34 is described as an example, but the shape of the punching hole has no particular meaning. Further, as shown in C, a conductive paste 36 is laid on the upper surface of the primary substrate 32, and the punched holes 34 formed in the primary substrate 32 are filled (painted) with the conductive paste 36. Then, as shown in D, the uppermost dielectric sheet 30a is peeled off. As a result, the conductor-embedded primary substrate 38 is obtained. Since the laminated dielectric sheets are only lightly pressure-bonded, only the uppermost dielectric sheet can be easily peeled off. At the same time, the conductive paste attached to the upper surface of the uppermost dielectric sheet can be removed. Therefore, only the conductive paste embedded in the punched holes remains on the obtained primary substrate. In this state, the thickness of the buried conductor is almost the same as the thickness of the primary substrate.

【0018】図3は一次基板の一例を示す説明図であ
る。第1の一次基板40aは、外導体と入出力電極に対
応する形状に打ち抜かれ、その打抜き穴42aにH型の
外導体となる部分45とその窪みに位置する矩形状の入
出力電極となる部分46からなる導体44aを埋設した
構造である。図3では、説明を分かり易くするために、
一次基板と導体とを別々に描いてあり、且つ導体も2個
のみ描いてある。しかし実際には、図4に示すように、
1枚の一次基板40aに、縦横に多数個の導体44aを
規則正しく配列する。
FIG. 3 is an explanatory view showing an example of the primary substrate. The first primary substrate 40a is punched into a shape corresponding to the outer conductor and the input / output electrode, and the punched hole 42a serves as the H-shaped outer conductor portion 45 and the rectangular input / output electrode located in the recess. This is a structure in which the conductor 44a including the portion 46 is embedded. In FIG. 3, in order to make the explanation easy to understand,
The primary substrate and the conductor are drawn separately, and only two conductors are drawn. However, in reality, as shown in FIG.
A large number of conductors 44a are regularly arranged vertically and horizontally on one primary substrate 40a.

【0019】図5〜図8は一次基板の他の例を示す説明
図である。図5に示す第2の一次基板40bは、入出力
電極と外導体のための側面導体に対応する打抜き穴42
bを形成し、それに入出力電極の一部47と外導体の一
部48となる側面導体44bを埋設した構造である。図
6に示す第3の一次基板40cは、共振器内導体と共に
入出力電極と外導体のための側面導体に対応する打抜き
穴42cを形成し、それに共振器内導体49及び入出力
電極の一部51と外導体の一部50となる側面導体44
cを埋設した構造である。図7は第4の一次基板40d
であり、外導体のための側面導体に対応する形状の打抜
き穴42dを形成し、その打抜き穴42dに外導体の一
部53となる側面導体44dを埋設した構造である。図
8は第5の一次基板40eであり、全面外導体となる形
状の打抜き穴42eに、外導体の一部54となる導体部
44eを埋設した構造である。
5 to 8 are explanatory views showing other examples of the primary substrate. The second primary substrate 40b shown in FIG. 5 has punched holes 42 corresponding to side conductors for the input / output electrodes and outer conductors.
b is formed, and a side surface conductor 44b to be a part 47 of the input / output electrode and a part 48 of the outer conductor is embedded therein. The third primary substrate 40c shown in FIG. 6 is formed with punched holes 42c corresponding to the side conductors for the input / output electrodes and the outer conductor together with the intra-cavity conductor, and the intra-cavity conductor 49 and one of the input / output electrodes are formed therein. Side portion 44 which is the part 51 and a part 50 of the outer conductor
It is a structure in which c is embedded. FIG. 7 shows a fourth primary substrate 40d
In this structure, a punching hole 42d having a shape corresponding to the side conductor for the outer conductor is formed, and a side conductor 44d, which is a part 53 of the outer conductor, is embedded in the punching hole 42d. FIG. 8 shows a fifth primary substrate 40e, which has a structure in which a conductor portion 44e, which is a part 54 of the outer conductor, is embedded in a punching hole 42e shaped to be the outer conductor on the entire surface.

【0020】これら第1の一次基板40a〜第5の一次
基板40eを、その順序で積層し加熱加圧して完全に圧
着一体化して積層ブロックとする。そして、その積層ブ
ロックを、側面導体の位置で縦横に切断してチップ化す
る。チップ化した状態を分かり易くするために、図9に
各一次基板に相当する部分に分解した斜視図を示す。符
号aは第1の一次基板に相当し、符号bは第2の一次基
板に相当する。以下、符号c〜eはそれぞれ第3の一次
基板〜第5の一次基板に相当する。このように縦横の切
断は、側面導体が露出するような位置で行う。
The first primary substrate 40a to the fifth primary substrate 40e are laminated in that order, heated and pressed, and completely pressure-bonded to form a laminated block. Then, the laminated block is cut vertically and horizontally at the position of the side surface conductor to form a chip. In order to make it easier to understand the chipped state, FIG. 9 shows an exploded perspective view of a portion corresponding to each primary substrate. The symbol a corresponds to the first primary substrate, and the symbol b corresponds to the second primary substrate. Hereinafter, symbols c to e correspond to the third primary substrate to the fifth primary substrate, respectively. Thus, the vertical and horizontal cutting is performed at a position where the side surface conductor is exposed.

【0021】チップ化した後に焼成することで、誘電体
フィルタが得られる。完成した誘電体フィルタの斜視図
を図10に示す。図10において、Aは実装面側(入出
力電極形成面)を上に向けた状態での斜視図であり、B
は反対に実装面を下に向けた状態での斜視図である。
A dielectric filter is obtained by firing after chip formation. A perspective view of the completed dielectric filter is shown in FIG. In FIG. 10, A is a perspective view with the mounting surface side (input / output electrode formation surface) facing upward, and B
On the contrary, it is a perspective view with the mounting surface facing downward.

【0022】以上の説明は、2段インターデジタル型フ
ィルタの場合である。つまり共振器パターンは、図11
のAに示すように、2本の平行に配列された共振器内導
体を有し、一方の共振器内導体と他方の共振器内導体
は、開放端(側面導体に電気的に接続されていない端
部)と短絡端(側面導体に電気的に接続されている端
部)が交互に逆方向に配列される構成である。それに対
して本発明は、図11のBに示すように、開放端と短絡
端が同じ方向に配列される構成のコムライン型誘電体フ
ィルタを製造する場合にも適用できる。それには、外導
体の一部となる側面導体の位置及び形状を適宜変更すれ
ばよい。
The above description is for a two-stage interdigital filter. That is, the resonator pattern is as shown in FIG.
As shown in A of FIG. 1, it has two in-resonator conductors arranged in parallel, and one in-resonator conductor and the other in-resonator conductor are open ends (electrically connected to the side conductors. In this configuration, the non-exposed end) and the short-circuited end (the end electrically connected to the side surface conductor) are alternately arranged in the opposite direction. On the other hand, the present invention can be applied to the case of manufacturing a combline type dielectric filter having a configuration in which the open end and the short-circuited end are arranged in the same direction as shown in FIG. 11B. For that purpose, the position and shape of the side surface conductor which is a part of the outer conductor may be appropriately changed.

【0023】本発明は1段もしくは3段以上の誘電体フ
ィルタの製造に適用できることは言うまでもない。また
本発明は、誘電体の内部に共振器内導体に近接して内部
導体として負荷容量導体を配置するような構造にも適用
できる。
It goes without saying that the present invention can be applied to the production of a dielectric filter having one or more stages. The present invention can also be applied to a structure in which a load capacitance conductor is arranged as an inner conductor in the vicinity of the in-resonator conductor inside the dielectric.

【0024】本発明においては、打抜き穴の内部に充填
された導電ペーストは、打抜き穴の側壁で支持される。
従って、導電ペーストの性状と充填する量に応じた一次
基板の厚さ(側壁の面積)が必要となる。接触面積を多
くするために、一次基板はある程度厚い方が好ましい
が、導電ペーストの性状(例えば、粘性など)や打抜き
穴の形状、充填量によっては、1枚の誘電体シートによ
って一次基板を構成することも可能である。導体の厚さ
が必要な場合は、複数枚の同じ一次基板を積層する構造
も可能である。しかし、通常は複数枚の誘電体シートを
積層して一次基板を形成し、それに打抜き穴を形成し導
電ペーストを充填する上記実施例の構成が望ましい。
In the present invention, the conductive paste filled in the punched hole is supported by the side wall of the punched hole.
Therefore, the thickness (sidewall area) of the primary substrate is required according to the property of the conductive paste and the filling amount. In order to increase the contact area, it is preferable that the primary substrate is thick to some extent, but depending on the properties of the conductive paste (such as viscosity), the shape of punched holes, and the filling amount, a single dielectric sheet constitutes the primary substrate. It is also possible to do so. When the thickness of the conductor is required, a structure in which a plurality of the same primary substrates are laminated is also possible. However, it is usually desirable to form the primary substrate by laminating a plurality of dielectric sheets, form punched holes in the primary substrate, and fill the conductive paste with the conductive paste.

【0025】[0025]

【発明の効果】本発明は上記のように、一次基板に形成
した打抜き穴に導電ペーストを充填することによって導
体埋設一次基板を形成し、それを積層する方法であるか
ら、内部導体を十分に厚くすることができ、電気抵抗が
小さくなるためにQが向上する他、挿入損失が小さくな
り、フィルタ特性の向上を図ることができる。
As described above, the present invention is a method of forming a conductor-embedded primary substrate by filling a punching hole formed in the primary substrate with a conductive paste and stacking the conductor-embedded primary substrate. Since the thickness can be increased and the electric resistance is reduced, the Q is improved, the insertion loss is reduced, and the filter characteristics can be improved.

【0026】また本発明方法では、導体は一次基板の内
部に埋設された状態となるために、積層時に一次基板同
士で隙間が生じず、そのため圧着一体化する際に均一に
圧力をかけることができる。隙間の発生は空気層の存在
を意味し、誘電率の低下をもたらすために特性(Q)が
低下するが、本発明はそのような問題も生じない。更に
焼成時に剥離する恐れも無くなる。
Further, according to the method of the present invention, since the conductor is embedded in the inside of the primary substrate, no gap is created between the primary substrates during the stacking, and therefore a uniform pressure can be applied during the pressure bonding and integration. it can. The generation of the gap means the existence of the air layer, and the dielectric constant is lowered, so that the characteristic (Q) is lowered, but the present invention does not cause such a problem. Further, there is no fear of peeling during firing.

【0027】更に本発明では、ある程度の厚みの一次基
板を使用するために、誘電体シートのたわみ等によるパ
ターンずれが生じず、導電ペーストによるシートアタッ
クの問題も生じない。つまり、誘電体シートが変形する
ことがないために、導電ペーストとの相性を考慮する必
要がなく、最適な導電ペーストを用いて容易に製造で
き、材料選択の自由度も拡大する。特に誘電体シートを
複数枚積層して打ち抜く方式では、導体の形成精度が非
常に良好となり、特性のばらつきを抑えることができ
る。
Further, in the present invention, since the primary substrate having a certain thickness is used, the pattern displacement due to the bending of the dielectric sheet does not occur and the problem of the sheet attack due to the conductive paste does not occur. In other words, since the dielectric sheet is not deformed, compatibility with the conductive paste does not have to be taken into consideration, it can be easily manufactured using the optimum conductive paste, and the degree of freedom in selecting materials is expanded. In particular, in a method in which a plurality of dielectric sheets are laminated and punched out, the conductor forming accuracy becomes very good, and variations in characteristics can be suppressed.

【0028】また本発明では、本積層時に側面導体が連
続するために、チップに切断した後に側面外導体の印刷
を行う必要がない。本発明では、縦横に切断しチップ化
した時点で全ての導体の形成が完了しているため、作業
効率は著しく向上する。また印刷と異なり導体が厚いた
めに、側面角部でのパターン切れの発生を防止すること
も可能となる。
Further, in the present invention, since the side conductors are continuous during the main lamination, it is not necessary to print the side outer conductors after cutting into chips. In the present invention, since the formation of all conductors is completed when the chips are cut vertically and horizontally to form chips, the working efficiency is significantly improved. Further, unlike the printing, since the conductor is thick, it is possible to prevent the occurrence of pattern breakage at the side corners.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明に係る誘電体フィルタの製造工程の一実
施例を示す工程説明図。
FIG. 1 is a process explanatory view showing an example of a process of manufacturing a dielectric filter according to the present invention.

【図2】一次基板の打抜き工程と導電ペースト充填工程
を示す説明図。
FIG. 2 is an explanatory view showing a punching process of a primary substrate and a conductive paste filling process.

【図3】第1の一次基板の説明図。FIG. 3 is an explanatory diagram of a first primary substrate.

【図4】一次基板での導体の配列状態を示す説明図。FIG. 4 is an explanatory diagram showing an arrangement state of conductors on a primary substrate.

【図5】第2の一次基板の説明図。FIG. 5 is an explanatory diagram of a second primary substrate.

【図6】第3の一次基板の説明図。FIG. 6 is an explanatory diagram of a third primary substrate.

【図7】第4の一次基板の説明図。FIG. 7 is an explanatory diagram of a fourth primary substrate.

【図8】第5の一次基板の説明図。FIG. 8 is an explanatory diagram of a fifth primary substrate.

【図9】導体埋設型誘電体フィルタの一例を示す分解斜
視図。
FIG. 9 is an exploded perspective view showing an example of a conductor-embedded dielectric filter.

【図10】導体埋設型誘電体フィルタの一例を示す完成
品の斜視図。
FIG. 10 is a perspective view of a completed product showing an example of a conductor-embedded dielectric filter.

【図11】共振器内導体と入出力電極及び外導体となる
側面導体とを示す説明図。
FIG. 11 is an explanatory diagram showing an in-resonator conductor and a side conductor serving as an input / output electrode and an outer conductor.

【図12】従来の積層型誘電体フィルタの構造を示す説
明図。
FIG. 12 is an explanatory view showing the structure of a conventional laminated dielectric filter.

【符号の説明】[Explanation of symbols]

30 誘電体シート 32 一次基板 34 打抜き穴 36 導電ペースト 38 導体埋設一次基板 30 Dielectric Sheet 32 Primary Substrate 34 Punching Hole 36 Conductive Paste 38 Conductor-Embedded Primary Substrate

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 誘電体チップの内部に内部導体を設け、
外側に外導体と入出力電極とを設ける構造の誘電体フィ
ルタを製造する方法において、 誘電体からなる一次基板を各種の埋設すべき導体形状に
打ち抜き、その打抜き穴に導電ペーストを充填し、それ
らの導体埋設一次基板を積層一体化し焼成することを特
徴とする導体埋設型誘電体フィルタの製造方法。
1. An internal conductor is provided inside a dielectric chip,
In a method of manufacturing a dielectric filter having a structure in which an outer conductor and an input / output electrode are provided on the outer side, a primary substrate made of a dielectric material is punched into various conductor shapes to be embedded, and the punched holes are filled with a conductive paste. 2. A method of manufacturing a conductor-embedded dielectric filter, comprising: integrally laminating and firing the conductor-embedded primary substrate.
【請求項2】 一次基板が、厚さ数十μmの誘電体シー
トを数〜十数枚積層したものである請求項1記載の導体
埋設型誘電体フィルタの製造方法。
2. The method for manufacturing a conductor-embedded dielectric filter according to claim 1, wherein the primary substrate is formed by laminating several to several tens of dielectric sheets having a thickness of several tens of μm.
【請求項3】 外導体と入出力電極を埋設した第1の一
次基板と、入出力電極と外導体のための側面導体を埋設
した第2の一次基板と、共振器内導体と共に入出力電極
と外導体のための側面導体を埋設した第3の一次基板
と、外導体のための側面導体を埋設した第4の一次基板
と、外導体を埋設した第5の一次基板とを、その順序で
積層一体化し、側面導体の位置で切断してチップ化し、
焼成する請求項2記載の導体埋設型誘電体フィルタの製
造方法。
3. A first primary substrate in which an outer conductor and an input / output electrode are embedded, a second primary substrate in which side conductors for the input / output electrode and the outer conductor are embedded, and an input / output electrode together with a resonator inner conductor. A third primary substrate in which a side conductor for the outer conductor is embedded, a fourth primary substrate in which a side conductor for the outer conductor is embedded, and a fifth primary substrate in which the outer conductor is embedded, in that order. Laminated and integrated with, and cut at the position of the side conductor to make a chip,
The method for manufacturing a conductor-embedded dielectric filter according to claim 2, which comprises firing.
【請求項4】 一次基板は単一の誘電体シートからな
り、同一形状の導体埋設一次基板を複数枚積層すること
で導体厚さを厚くする請求項1記載の導体埋設型誘電体
フィルタの製造方法。
4. The conductor-embedded dielectric filter according to claim 1, wherein the primary substrate is made of a single dielectric sheet, and the conductor thickness is increased by laminating a plurality of conductor-embedded primary substrates having the same shape. Method.
JP9768496A 1996-03-27 1996-03-27 Manufacture of conductor imbeded dielectric filter Pending JPH09266402A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9768496A JPH09266402A (en) 1996-03-27 1996-03-27 Manufacture of conductor imbeded dielectric filter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9768496A JPH09266402A (en) 1996-03-27 1996-03-27 Manufacture of conductor imbeded dielectric filter

Publications (1)

Publication Number Publication Date
JPH09266402A true JPH09266402A (en) 1997-10-07

Family

ID=14198812

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9768496A Pending JPH09266402A (en) 1996-03-27 1996-03-27 Manufacture of conductor imbeded dielectric filter

Country Status (1)

Country Link
JP (1) JPH09266402A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008093459A1 (en) * 2007-02-01 2008-08-07 Murata Manufacturing Co., Ltd. Resonance element and method for manufacturing the same

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008093459A1 (en) * 2007-02-01 2008-08-07 Murata Manufacturing Co., Ltd. Resonance element and method for manufacturing the same
JPWO2008093459A1 (en) * 2007-02-01 2010-05-20 株式会社村田製作所 Resonant element and manufacturing method thereof

Similar Documents

Publication Publication Date Title
US6470545B1 (en) Method of making an embedded green multi-layer ceramic chip capacitor in a low-temperature co-fired ceramic (LTCC) substrate
JPH09129476A (en) Ceramic electronic part
KR100489820B1 (en) Ceramic Multilayer Substrate and its Manufacturing Process
US7209362B2 (en) Multilayer ceramic substrate with a cavity
JP3264037B2 (en) Capacitor array
WO1995023438A1 (en) Multilayer dielectric resonator and filter
JP3658350B2 (en) Manufacturing method of multilayer chip balun element
US5682674A (en) Dielectric filter and method of manufacturing the same
JPH09266402A (en) Manufacture of conductor imbeded dielectric filter
JP2001313230A (en) Capacitor array
JP2620840B2 (en) Manufacturing method of coaxial laminated dielectric filter
JP2817890B2 (en) Ceramic multilayer substrate and method of manufacturing the same
JPH10117104A (en) Laminated dielectric filter
JP4501291B2 (en) Dielectric filter and antenna duplexer and communication device using the same
JP2936887B2 (en) Manufacturing method of ceramic laminated device
JPH09326329A (en) Ceramic multilayer device member and manufacture thereof
KR20060108908A (en) Method of manufacturing layer-built type ceramic substrate
JP2006237166A (en) Method for manufacturing glass ceramic substrate
JPH11111551A (en) Production of laminated electrical component
JP3684290B2 (en) Multilayer electronic component and manufacturing method thereof
KR100513348B1 (en) Chip component having air electrode pattern and the process
JP2002260931A (en) Stacked chip balun element and its manufacturing method
JP2000114827A (en) Dielectric resonator, dielectric filter and production of dielectric laminate element
JP3001062U (en) Multilayer circuit components
JP2001267467A (en) Multilayer ceramic substrate, its manufacturing method and electronic device