JPH09261061A - Analog/digital conversion circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce time necessary for A/D conversion processing without requiring the setting of a voltage changing width by means of software by equipping a mechanism part executing the setting of the voltage changing width by means of a switching circuit controlled by a successive approximating register and a means executing judgment in the range of an A/D conversion voltage. SOLUTION: A comparator part 7 executes the comparison of the voltage values of an analog voltage line 14 inputted from an analog voltage converter 10 and a Vref voltage line 6 inputted from a switch tree part 4 with each other. An A/D converting logic controls the successive approximating register 8 depending on the result of the comparator part 7. The switching circuit 12 consists of a switch circuit controlled by the voltage changing width control signal of the register 8, and a voltage changing width setting voltage line 13 is selected by this switching circuit 12, inputted to the converter 10 to execute voltage changing operation.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a microcomputer (microcomputer) incorporating an A / D conversion circuit, and more particularly to improvement of its A / D conversion system.

[0002]

2. Description of the Related Art In the prior art, for example, Japanese Patent Laid-Open No. 3-27 is used.
As described in Japanese Patent No. 426, by providing a voltage conversion width setting register that can arbitrarily select an analog voltage width to be converted when performing A / D conversion, A / D conversion is performed.
The D conversion block is the same as the conventional one, and there is a technique for increasing the conversion accuracy while eliminating the range limitation of the analog voltage capable of performing A / D conversion.

An example of the prior art will be described with reference to FIG.

FIG. 1 is composed of the following functional parts.

That is, VREF voltage input line 1, VSS voltage input line 2, ladder resistor 3, switch tree 4, D / A converter block 5, Vref voltage line 6, comparator 7, successive approximation register 8, analog voltage input line 9 , An analog voltage conversion device 10, a voltage transformation width setting register 11, a switching circuit 12, a voltage transformation width setting voltage line 13, and an analog voltage line 14 after transformation. Based on these configurations,
This will be described below.

In FIG. 1, in a microcomputer with a built-in A / D conversion circuit, a successive approximation type A / D conversion circuit is provided with an analog voltage conversion device 10 on an analog voltage input line 9, and
In order to be able to arbitrarily set the analog voltage transformation width, a transformation width setting register 11 capable of selecting a transformation width setting voltage input from a plurality of input terminals, and a switching circuit 12 switching corresponding thereto are provided. .

The analog voltage in the prior art is VRE.
The A / D conversion execution (A / D conversion operation other than the transform width setting operation) when the F voltage is not exceeded will be described below.

When the A / D conversion is started, the successive approximation register 8 is set to 00H. After that, 1 is set to the most significant bit of the successive approximation register 8. According to the value of the successive approximation register 8, the ladder resistance 3 and the switch tree 4
VREF voltage input from the VREF voltage input line 1 from the A / D converter 5 and the VSS voltage input line 2
A comparison voltage obtained by resistance-dividing the voltage width between the VSS voltages input from is output to the comparator 7 via the Vref voltage line 6.

The comparator 7 uses the comparison voltage (Vref
The voltage line 6) is compared with the analog voltage input from the analog voltage input line 14. If the analog voltage is smaller, 0 is set in the most significant bit of the successive approximation register 8 and the analog voltage is larger. If it remains 1, Then, the next bit is set to 1, the comparison voltage obtained from the value of the successive approximation register 8 is compared with the analog voltage, the result is set to the successive approximation register 8, and the next bit is set to 1. .

Thereafter, this operation is similarly repeated until the least significant bit is executed and the A / D conversion is completed. The value of the successive approximation register 8 at this time becomes the A / D conversion result.

The A / D conversion operation when the analog voltage exceeds the VREF voltage, that is, the transformation width setting operation will be described below.

In the prior art, the analog voltage is V
When the REF voltage is exceeded, A / D conversion is executed.
An analog voltage transformer 10 is provided on the analog voltage input line 9, and a transformer width setting register 11 capable of selecting a transformer width setting voltage 13 input from a plurality of input terminals so that the analog voltage transformer width can be arbitrarily set. , A switching circuit 12 that switches in accordance with it.

When the analog voltage exceeds the VREF voltage, if the analog voltage is not transformed, the A / D conversion result becomes the maximum value, and the actual analog voltage cannot be judged from the A / D conversion result. Input the transformer width setting voltage from the outside in advance so that the voltage obtained by subtracting the transformer width setting voltage input from one of the transformer width setting voltage lines 13 from the analog voltage is between VSS voltage 2 and VREF voltage 1. Then, the transformer width setting register 11 is set so that the transformer width setting voltage line 13 is selected by the switching circuit 12.

As a result, the analog voltage transformer 1
0 outputs a voltage obtained by subtracting the transformer width setting voltage from the analog voltage to the analog voltage line 14 after transformation.

After that, by executing A / D conversion, the actual analog voltage is converted into the selected voltage range setting voltage by A / D conversion.
It is possible to make a judgment such as the voltage added with the / D conversion result.

Next, the conversion width setting according to the prior art and the analog voltage range capable of A / D conversion with respect to the setting width are
2 will be described as an example.

FIG. 2 shows that the voltage of the transformer width setting voltage line 13 is 7.5.
Input 4 kinds of voltage, V, 5V, 2.5V, 0V,
An example is shown in which 5 V is input to the REF voltage 1 and 0 V is input to the VSS voltage 2.

The voltage range shown by A in FIG. 2 is the voltage range of the analog input voltage 9 that can be A / D converted when the voltage range setting is not performed (the voltage value of 0 V is selected from the voltage range setting voltage line 13). Shows that the A / D conversion result can be obtained in the range of 5V to 0V.

The voltage range indicated by B is the voltage range setting voltage line 1
The figure shows the voltage width of the analog input voltage 9 that can be A / D converted when a voltage value of 3 to 2.5 V is selected.
It shows that the A / D conversion result is obtained in the range of 5V to 2.5V.

The voltage range indicated by C is the voltage-width setting voltage line 1
Indicates the voltage range of analog input voltage 9 that can be A / D converted when a voltage value of 3 to 5 V is selected.
It shows that the A / D conversion result is obtained in the range of up to 5V.

The voltage range indicated by D is the voltage-width setting voltage line 1
It shows the voltage range of analog input voltage 9 that can be A / D converted when a voltage value of 3 to 7.5 V is selected.
It shows that the A / D conversion result can be obtained in the range of 2.5V to 7.5V.

As described above, in FIG. 2, four types of transformation width settings are described as an example. The transformation width setting for setting the analog voltage value for A / D conversion in the area where A / D conversion is possible is performed by selecting the transformation width setting voltage line 13, and the voltage between the area voltages (VREF) where A / D conversion can be performed is performed. ~ VS
S) is performed as set.

[0023]

In the prior art, since the transformation width is set in the transformation width setting register, the analog voltage value input before the A / D conversion is performed is estimated and the transformation is performed. After the width is set by software, A / D conversion is executed.

When an unknown analog voltage is input, it is impossible to estimate the input voltage and set the voltage conversion width within the voltage range in which A / D conversion is possible. As described above, the converted data cannot be obtained by the A / D conversion unless the voltage is within the convertible voltage range.

Therefore, the method is carried out by sequentially changing the transformation width setting from the maximum setting and determining whether or not it is within the range each time. In this case, there is a drawback in that a long processing time is required each time the transformation width is set.

Therefore, as a conventional technique in FIG.
A description will be given with reference to a flow chart for setting the voltage conversion width and performing A / D conversion when an unknown analog voltage is input.

When an unknown analog voltage is input, the voltage conversion width setting is set to the maximum value, and after it is judged whether or not the analog voltage input 9 is within the voltage range capable of A / D conversion, A / D The conversion is performed. The judgment at this time is evaluated by whether or not the conversion result is obtained (whether it is 00H or not),
If the conversion result is not obtained, the voltage conversion width is set to the next voltage by software, A / D conversion is executed again, and A
It is determined whether the voltage is within the voltage range capable of D / D conversion.
Similarly, the setting of the transformation width is sequentially changed until the A / D conversion result is obtained, the A / D conversion is executed, and the determination is performed.

As described above, in the conventional technique, the setting of the voltage transformation width and the judgment as to whether or not the voltage range is within the voltage range capable of A / D conversion are all performed according to the software. Further, here, since the setting of the transformation width is sequentially changed until the A / D conversion result is obtained and the A / D conversion is executed, it takes a lot of processing time to obtain the A / D conversion data. Will occur.

Next, in the prior art, when an unknown analog voltage is input, the maximum transformation width is sequentially set, and the transformation width setting when performing A / D conversion and A
How the voltage range capable of D / D conversion changes will be described with reference to FIG.

FIG. 4 shows that the voltage range setting voltage line 13 is 7.5.
Input 4 kinds of voltage, V, 5V, 2.5V, 0V,
An example is shown in which 5 V is input to the REF voltage 1 and 0 V is input to the VSS voltage 2. Here, an indefinite analog voltage is input, and the width of the A / D conversion is set from the maximum value.
It indicates that the / D conversion is executed.

A of the figure shows a case where the maximum voltage change width setting is set. When the voltage change width setting is 7.5 V, A
The analog voltage value for performing the D / D conversion is 12.5V to 7.
It shows that it is 5V. In this case, assuming that the input analog voltage value is around 1V, the conversion data is 00H when A / D conversion is performed when the conversion width is maximum (7.5V), and the conversion result cannot be obtained. , Change the width of voltage transformation.

Next, FIG. 6B shows the state when the transformation width is set from the maximum to the next transformation width. It shows that when the voltage width setting is 5V, the analog voltage value for performing A / D conversion is 10V to 5V. in this case,
Since the input analog voltage value is around 1V and the transformation width setting is 5V, the transformation data is 00H when A / D conversion is performed, and the transformation result cannot be obtained, so the transformation width is also changed. .

Similarly, FIG. 6C shows the case where the transformation width is set to the next transformation width. Transform width setting is 2.
At 5V, the analog voltage value for A / D conversion is 7.5
It has shown that it is V-2.5V. In this case, the input analog voltage value is around 1V and the transformation width setting is 2.5V. Therefore, if A / D conversion is performed, the conversion data will be 00H, and the conversion result cannot be obtained. Change the width.

D in the figure is a diagram showing a case in which the transformer width is set to be without transformer. It shows that when the voltage width setting is 0V, the analog voltage value for performing A / D conversion is 5V to 0V. In this case, the input analog voltage value is 1
It is near V, and when A / D conversion is performed, a result is obtained in the converted data.

In this way, the unknown analog voltage A
When performing A / D conversion, it is necessary to sequentially change the setting of the voltage conversion width and perform A / D conversion each time.
The conversion result determines the change of the conversion width.

In the example shown in FIG. 4, the transformation width setting is performed from the maximum setting, but even when the setting is performed from the minimum setting, the same processing is performed when the input analog voltage value is unknown. Needless to say, is necessary.

The A / D conversion data measured by the voltage conversion width setting becomes an actual analog voltage value by applying the voltage conversion width setting voltage. Therefore, the A / D obtained by the transformation width setting
The conversion data requires correction processing of the data corresponding to the transformation width set voltage by software.

[0038]

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems, and the switching width can be set by a switching circuit which is controlled by the successive approximation register configured in the A / D conversion logic. Mechanism part and A / D
By providing the means for determining the conversion voltage range, it is not necessary to set the conversion width by software, so that the time required for the A / D conversion processing can be greatly shortened.
An A / D conversion circuit can be provided.

Further, by providing the mechanism for performing the correction operation according to the transformation width to the successive approximation register at the time of executing the A / D conversion, it is possible to perform the correction without setting the transformation width by software. An A / D conversion circuit can be provided.

[0040]

BEST MODE FOR CARRYING OUT THE INVENTION

(First Embodiment of the Invention) FIG. 5 shows a block diagram of an A / D conversion circuit according to the present invention. FIG. 5 is composed of the following mechanical parts.

That is, VREF voltage input line 1, VSS voltage input line 2, ladder resistor 3, switch tree 4, D / A converter block 5, Vref voltage line 6, comparator 7, successive approximation register 8, analog voltage input line 9 , Analog voltage conversion device 10, switching circuit 12, transformation width setting voltage line 13, analog voltage line 14 after transformation, control line 15 of switching circuit by successive approximation register, and conversion result 16. Hereinafter, each mechanism will be described.

FIG. 6 shows an embodiment of the successive approximation register 8. The successive approximation register 8 is a register unit controlled by the A / D conversion logic, and includes a switch tree control signal unit and a transformation width control signal unit for controlling the transformation width. In the conventional technique, the successive approximation register has only a switch tree control signal portion for controlling the switch tree portion, and a successive approximation having a transform width control signal portion for controlling the transform width in the present invention. It is a register. The successive approximation register performs the transformation width setting in the present invention by the successive approximation register in addition to the operation in the conventional technique described above.

The switch tree unit 4 is composed of switch elements controlled by the switch tree control signal of the successive approximation register 8. The switch tree section 4 is the ladder resistance section 3
A voltage value to be output to the Vref voltage line 6 is selected from a plurality of voltage values obtained by dividing the voltage width between the VREF-VSS voltages generated by the above. An example of the switch tree unit 4 is shown in FIG.

The ladder resistor section 3 is connected to the VREF voltage and the VSS.
It is composed of a plurality of resistance elements connected in series between voltages. The voltage obtained by resistance division of the voltage width between the VREF voltage input from the VREF voltage input line 1 and the VSS voltage input from the VSS voltage input line 2 is connected to the switch tree unit. The voltage selected by 4 is output to the comparator unit 7 via the Vref voltage line 6. Further, an embodiment of the ladder resistance section 3 is shown in FIG.

The comparator section 7 compares the voltage values of the analog voltage line 14 input from the analog voltage conversion device 10 and the Vref voltage line 6 input from the switch tree section 4. The A / D conversion logic controls the successive approximation register 8 according to the result of the comparator unit 7.
The switching circuit 12 is composed of a switch circuit which is controlled by the voltage conversion width control signal of the successive approximation register 8. Transform width setting voltage line 1 by switching circuit 12
3 is selected and input to the analog voltage converter 10,
The transformation operation is performed. Here, FIG. 9 shows an embodiment of the switching circuit 12.

The analog voltage conversion device 10 is a differential amplifier circuit composed of an amplifier circuit, and carries out a voltage value transformation operation for the inputted analog voltage input line 9 through the transformation width setting voltage line 13. To do. The analog voltage 14 after the transformation operation is input to the comparator 7, and the voltage value is compared with the Vref voltage line 6 input from the switch tree unit 4. An example of the analog voltage converter 10 is shown in FIG.

In the differential amplifier circuit of the analog voltage converter 10 shown in FIG. 10, when the resistance values (R1, R1 ', Rf) are all the same value, analog voltage EO = (analog voltage input-voltage range set voltage) The output voltage of is obtained.

The present invention will be further described in detail.

In the prior art, in order to arbitrarily set the analog voltage transformer width, the transformer width setting voltage input from a plurality of input terminals can be set in the successive approximation type A / D converter circuit of the microcomputer with a built-in A / D converter circuit. It is provided with a selectable transformer width setting register 11 and a switching circuit 12 that switches correspondingly, and the setting of the transformer width and the analog voltage input after the transformer width setting are within the A / D convertible voltage range. It is provided with a means for making a judgment, and is entirely implemented by hardware.

Next, the transformation width setting operation in the present invention will be described.

FIG. 11 shows the operation of the successive approximation register 8 when the transformation width is set. In the A / D conversion circuit of the present invention, A
When the / D conversion is started, first, in the transforming width control signal portion of the successive approximation register 8, the bit for which the transforming width setting voltage line 13 having the largest transforming width with respect to the switching circuit 12 is selected is set to 1. It The analog voltage converter 10 has a transformer width setting voltage 13 that maximizes the transformer width.
Is input, and the analog voltage 14 that has been transformed
Is input to the comparator 7.

As shown in FIG. 11A, in the switch tree control signal section of the successive approximation register 8, the least significant bit is set to 1, the minimum comparison voltage is input to the comparator 7, and the maximum transformation width is set. The comparison with the analog voltage 14 carried out is carried out.

After setting the transformer width, the analog voltage input is A /
In order to determine whether or not the voltage is within the D-convertible voltage range, the switch tree control signal portion of the successive approximation register is set to the minimum value, and the comparator 7 compares the analog voltage after the transformation, and as a result, the minimum comparison voltage. If the analog voltage is smaller than 6, it is determined that the transformer width setting is too large, and the setting is changed to the next transformer width. If it is determined that the transformer width setting is too large, in the transformer width control signal portion of the successive approximation register 8, the bit that selects the transformer width setting voltage line 13 having the next largest transformer width with respect to the switching circuit 12 is 1 Is set to.

The analog voltage converter 10 is supplied with a transformer width setting voltage 13 having the next largest transformer width, and the analog voltage 14 subjected to the transformer operation is input to the comparator 7.

As shown in FIG. 11B, in the switch tree control signal section of the successive approximation register 8, the least significant bit is set to 1, the minimum comparison voltage is input to the comparator 7, and the next transformation width is set. The comparison with the analog voltage 14 is performed. As a result, if the analog voltage is smaller than the comparison voltage 6, it is determined that the transformer width setting is too large, and the setting is changed to the next transformer width.

In the same manner, the transformation width setting is sequentially changed to a smaller value, and only the smallest bit of the switch tree control signal portion is compared with the smallest comparison voltage value by setting 1 for each change. It is carried out until the result of the analog voltage becomes larger (indicated by a dotted arrow in FIG. 11).

When it is determined that the analog voltage is larger in the comparison operation in the above-described voltage transformation width setting, the successive approximation register 8 holds the bit of the voltage transformation control signal section as it is, and the highest level of the switch tree control section is set to 1. And the successive approximation operation is performed.

Next, for the transformation width setting and the setting width,
An example showing an analog voltage range that can be A / D converted is shown in FIG.
It will be explained in 2.

FIG. 12 shows that the voltage range setting voltage line 13 is changed to 7.5.
Input 4 kinds of voltage, V, 5V, 2.5V, 0V,
An example is shown in which 5 V is input to the REF voltage 1 and 0 V is input to the VSS voltage 2.

The voltage range indicated by A in FIG. 12 is a voltage value (7.5) having the maximum voltage range from the voltage range setting voltage line 13.
This shows the voltage width of the analog voltage input 9 capable of A / D conversion when V) is selected, and shows that the A / D conversion result can be obtained in the range of 12.5V to 7.5V.

After setting the transformation width shown in A, only the minimum bit of the switch tree control signal portion is compared with the minimum comparison voltage value by setting 1 to judge whether or not the transformed analog voltage is within this range. If it is determined that the analog voltage is higher, the analog voltage after transformation is determined to be within this range, and the successive comparison operation by the switch tree control signal unit is performed. If it is determined that the analog voltage is smaller, the transformation width is changed.

The voltage range indicated by B shows the voltage range in which the analog voltage is judged to be smaller in the voltage range A and when the next transformation width is set. The voltage width of the analog voltage input 9 that can be A / D converted by changing the voltage value from the voltage setting width line 13 to 5 V is shown as 1
It shows that the A / D conversion result can be obtained in the range of 0V to 5V.

After the transformation width shown in B is changed, it is determined whether or not the transformed analog voltage is within this range as in the case of setting A above, and it is determined that the analog voltage is larger. For example, it is determined that the analog voltage after transformation is in this range, and the successive comparison operation by the switch tree control signal unit is performed. If it is determined that the analog voltage is smaller,
Change the transformation width.

The voltage range indicated by C indicates the voltage range when the analog voltage is judged to be smaller in the voltage ranges A and B and the next voltage transformation range is set.
Change the voltage value from the voltage range setting voltage line 13 to 2.5V,
It shows the voltage width of the analog voltage input 9 capable of A / D conversion, and shows that the A / D conversion result can be obtained in the range of 7.5V to 2.5V.

After the transformation width shown in C is changed, it is determined whether or not the transformed analog voltage is within this range as in the case of setting A and B, and it is determined that the analog voltage is larger. If so, the analog voltage after transformation is determined to be in this range, and the successive comparison operation by the switch tree control signal unit is performed. If it is determined that the analog voltage is smaller, the transformation width is changed.

The voltage range indicated by D is the above voltage range A, B.
In C and C, when the analog voltage is determined to be smaller and the voltage width setting voltage line 13 is not used for voltage conversion width setting (at this time, the voltage value of 0V is selected from the voltage conversion width setting voltage line 13) A / D It shows the voltage width of the analog voltage input 9 that can be converted, and shows that the A / D conversion result can be obtained in the range of 5V to 0V.

It is determined that the analog voltage input by changing the transformation width shown in A, B, and C is in the range of D, and only the minimum bit of the switch tree control signal portion has the minimum comparison voltage value set to 1. It is not necessary to perform the comparison with the above, and the successive approximation operation by the switch tree control unit of the successive approximation register 8 is immediately performed after the change of the transformation width.

As described above, in FIG. 12, four types of transformation width settings are described as an example.

The analog voltage value to be A / D converted is A / D
For the transformation width setting in the conversion possible area, the transformation width setting voltage line 13 is selected by the transformation width control signal section of the successive approximation register 8, and the analog voltage after transformation is only the minimum bit of the switch tree control signal section. By the comparison with the minimum comparison voltage value set by 1, the judgment is made as to whether or not it is in the range between the region voltages (VREF to VSS) in which the A / D conversion can be performed.

Next, problems to be solved by the present invention will be described.

In the prior art, when an unknown analog voltage is input, it is necessary to perform data processing by software as described above, so that it takes a lot of processing time to obtain A / D converted data. There was a drawback that required.

On the other hand, referring to FIG. 13, a flow chart of A / D conversion when an unknown analog voltage is input according to the present invention will be shown and described.

In the present invention, unlike the prior art, the setting of the voltage transformation width and the determination of whether or not the analog voltage after the voltage transformation is set within the voltage range in which the A / D conversion can be executed are performed by hardware. .

In the present invention, when an unknown analog voltage value is input, the setting of the transformation width is performed from the maximum value, and it is judged whether or not the analog voltage input is set in the voltage range in which A / D conversion is possible. Is performed by comparison with the minimum voltage value 01H in the comparator, there is no need to perform the successive approximation operation after setting the transformation width as in the conventional technique.

Further, if it is determined that the analog voltage after the transformation is not set within the voltage range in which the A / D conversion can be performed after the transformation width is set, the transformation width is changed and the A / D conversion can be performed again. It is determined whether the analog voltage after transformation is set to a voltage range in which A / D conversion can be performed, and then the successive approximation operation is performed. .

Therefore, when there is an unknown analog input, the present invention is a device having a transformation width setting function, which does not require judgment and processing by software as in the prior art. Further, in the conventional technique, since the successive approximation operation is performed after setting the transformation width, there is a drawback that it takes a lot of time for the conversion operation, but in the present invention, the minimum data 01H is set by the comparator when the transformation width is set. Since the judgment is made only by making the comparison, the transformation width can be determined in a processing time much shorter than the conventional one.

Next, FIG. 14 shows an example showing the voltage conversion width setting and the analog voltage range that can be A / D converted in the present invention when the input analog voltage value is unknown.

FIG. 14 shows that the voltage range setting voltage line 13 is changed to 7.5.
Input 4 kinds of voltage, V, 5V, 2.5V, 0V,
An example is shown in which 5 V is input to the REF voltage 1 and 0 V is input to the VSS voltage 2.

A is a diagram showing a case where the voltage conversion width is set to the maximum value, and the analog voltage for performing the A / D conversion is 12.5V to 7.5V when the voltage conversion width is set to 7.5V. It is shown that. Assuming that the analog voltage value input here is in the vicinity of 1 V, the voltage conversion width is maximum (7.
5V), the comparison with the minimum comparison voltage value is performed, it is determined that the analog voltage value is smaller, and the setting of the transformation level is changed.

B shows the voltage value when the voltage conversion width setting is lowered by one level after the above A. When the voltage width setting is 5V, the analog voltage value for A / D conversion is 1
It shows that it is 0V to 5V. Assuming that the analog voltage value input here is around 1V, when the transformation width is 5V, a comparison with the minimum Vref voltage value is performed, and it is determined that the Vref voltage value is larger, The level setting will be changed.

C shows the case where the voltage conversion width setting is similarly set to the next level. When the voltage width setting is 2.5V, the analog voltage value for A / D conversion is 7.5.
It has shown that it is V-2.5V. Assuming that the analog voltage value input here is around 1 V, when the transformation width is 2.5 V, a comparison with the minimum Vref voltage value is performed, and it is determined that the Vref voltage value is larger. , The transformation level setting will be changed.

D is a diagram showing a case in which the transformation width is set to one without transformation. When the transformer width setting is 0V, A /
It shows that the analog voltage value for performing D conversion is 5V to 0V. Assuming that the analog voltage value input here is around 1 V, the analog voltage input is judged to be in this range from the process of setting the voltage conversion width, and A / D conversion is performed. The conversion result is obtained.

In this way, when carrying out A / D conversion of an unknown voltage value, the setting of the transformation width is sequentially changed to obtain the minimum V
When it is determined that the Vref voltage value is larger than the ref voltage value, the setting of the transformation level is changed, so there is no need to perform A / D conversion after setting the transformation width as in the conventional technique. Processing time can be greatly reduced. Further, from the setting of the transformation width to the execution of the A / D conversion, since the operation is performed by the A / D conversion control logic, the processing is executed without any software.

In the present invention, the successive approximation operation by the switch tree control signal unit of the successive approximation register unit after setting the transformation width will be described. In the successive approximation operation, after the transformation width is changed in the transformation width setting operation, it is judged whether or not the voltage range is set so that the A / D conversion is possible, and the analog voltage after the transformation is A / D conversion executed. It is executed after determining whether the voltage is set within the possible voltage range.

FIG. 15 shows the operation of the successive approximation register 8.

After the transformation width is set, 1 is set in the most significant bit of the switch tree control signal of the successive approximation register 8. According to the value of the successive approximation register 8, the VREF input from the VREF voltage input line 1 from the D / A converter 5 including the ladder resistor 3 and the switch tree 4.
The comparison voltage obtained by resistance-dividing the voltage width between the voltage and the VSS voltage input from the VSS voltage input line 2 is
It is output to the comparator 7 via the Vref voltage line 6.

The comparator 7 compares the comparison voltage with the analog voltage input from the analog voltage input line. If the analog voltage is smaller, the most significant bit of the switch tree control signal of the successive approximation register 8 is compared. Is set to 0, and remains 1 when the analog voltage is larger. Then, the next bit is set to 1, the comparison voltage obtained by the value of the successive approximation register 8 is compared with the analog voltage, the result is set to the successive approximation register 8, and the next bit is set to 1. To do.

This operation is repeated in the same manner, and the A / D conversion is completed by executing the operation up to the least significant bit. At this time, the value of the switch tree control signal of the successive approximation register 8 is
The result is an A / D conversion result having a transformation width. Therefore, the actual A /
The D conversion result is a value obtained by correcting the voltage value of the transformation width setting unit on the data of the switch tree control unit of the successive approximation register.

(Embodiment 2 of the Invention) Next, in addition to what has been described in the embodiment of the present invention, the A / D converted value is corrected on the basis of the voltage value determined by the transformation width. FIG. 16 shows an example of a transformation width data correction circuit that implements the above. FIG. 16 is composed of the following functional parts.

Reference numerals 1 to 16 are the same as or similar to those in the configuration of FIG.

Reference numeral 17 is a select circuit, 18 is transformation width data, and 19 is an addition circuit.

Explaining these operations, first, like the switching circuit 12, the selection circuit 17 uses the signal output from the voltage conversion width control signal section of the successive approximation register 8 during the voltage conversion width setting operation to output the voltage conversion width data 18. Make a selection. In this case, the conversion width setting operation and the A / D conversion operation are
Since it is already described in the present embodiment, detailed description will be omitted.

After the A / D conversion is performed in this manner, the adder circuit 19 corrects the transformation width data. That is, the data of the switch tree control signal portion of the successive approximation register 8 is corrected by the transformation width data 18 selected by the selection circuit 17, and the A / D conversion result 16 is obtained.

Therefore, it is not necessary to carry out the calculation processing of the voltage value by the software after the A / D conversion is carried out.
An A / D conversion circuit can be provided.

In the embodiment of the present invention shown in FIG. 16, since the process is started without defining the voltage range setting voltage, the voltage range data for correcting the voltage value is required. It is necessary to prepare the data. At this time, if a predetermined voltage is used as the transformation width setting voltage, it is not necessary to set this data, and the addition circuit can already be configured with the addition data.

If the voltage transform width setting is a multiple of the VREF voltage, the adder circuit is not required, and the sum of the voltage transform width control signal portion data and the bit data of the switch tree control signal portion is A It is obtained as a / D conversion result.

[0097]

According to the present invention, in the A / D conversion, the conversion width of the analog voltage is set by the hardware configured in the A / D conversion logic. In the conventional technique, when setting the voltage conversion width, it is necessary to perform the A / D conversion operation for each step by software to determine whether or not the voltage range is within the A / D conversion possible voltage range. On the other hand, according to the present invention, when the voltage conversion width is set, the comparison voltage (Vref voltage) of the comparator is set to the minimum (01H) to determine whether or not the voltage is within the voltage range in which A / D conversion can be performed. Since it is performed by comparing with the voltage, it is possible to provide an A / D conversion circuit in which the processing time required for the judgment is significantly shortened as compared with the related art.

Furthermore, an A / D conversion circuit capable of correcting the voltage conversion width can be provided by the voltage conversion width data correction circuit configured in the A / D conversion logic.

[Brief description of drawings]

FIG. 1 is a diagram showing an example of a configuration in a conventional technique.

FIG. 2 is a diagram showing an example of setting a voltage conversion width of an analog voltage and a voltage range in which A / D conversion can be performed in a conventional technique.

FIG. 3 is a diagram showing an example of a flow chart showing analog voltage transformation width setting and A / D conversion implementation in the prior art.

FIG. 4 is a diagram showing a voltage conversion range setting and a voltage range in which A / D conversion can be performed when an unknown analog voltage is input in the conventional technique.

FIG. 5 is a diagram showing an example of a case where the present invention has a transformation width setting function.

FIG. 6 is a diagram showing an embodiment of a successive approximation register 8 according to the present invention.

FIG. 7 is a diagram showing an example of a switching circuit 12.

FIG. 8 is a diagram showing an example of a ladder resistor 3;

9 is a diagram showing another embodiment of the switching circuit 12. FIG.

10 is a diagram showing an embodiment of the analog voltage transformer 10. FIG.

FIG. 11 is a diagram showing an operation of a successive approximation register according to the present invention.

FIG. 12 is a diagram showing an example showing an analog voltage transformation width setting and an A / D convertible voltage range in the present invention.

FIG. 13 is a flowchart showing a transformation width setting operation and a successive approximation operation when an analog voltage is input according to the present invention.

FIG. 14 is a diagram showing a voltage conversion width setting and an A / D convertible voltage range when an unknown analog voltage is input according to the present invention.

FIG. 15 is a diagram showing a successive approximation operation in the present invention.

FIG. 16 is a diagram showing a case where the A / D conversion result according to the present invention is corrected by transforming width data.

[Explanation of symbols]

1 VREF voltage input line 2 VSS voltage input line 3 ladder resistance 4 switch tree 5 D / A converter block 6 Vref voltage line 7 comparator 8 successive approximation register 9 analog voltage input line 10 analog voltage conversion device 11 voltage width setting register 12 switching circuit 13 Transform width setting voltage line 14 Analog voltage line after transform 15 Control line of switching circuit by successive approximation register 16 Conversion result 17 Select circuit 18 Transform width data 19 Adder circuit

Claims (3)

[Claims] 1. When converting an analog voltage into a digital signal, the width of transformation of the analog voltage is changed by a register means that sequentially operates autonomously.
/ D conversion circuit. 2. The A according to claim 1, which is built in the one-chip microcomputer and operates independently of a program of the one-chip microcomputer.
/ D conversion circuit. 3. The A / D conversion circuit according to claim 1, wherein the transformation width of the analog voltage is set by the register means having transformation width control data.