JPH09260786A - Semiconductor light emitting element and its manufacture - Google Patents

Semiconductor light emitting element and its manufacture

Info

Publication number
JPH09260786A
JPH09260786A JP6577096A JP6577096A JPH09260786A JP H09260786 A JPH09260786 A JP H09260786A JP 6577096 A JP6577096 A JP 6577096A JP 6577096 A JP6577096 A JP 6577096A JP H09260786 A JPH09260786 A JP H09260786A
Authority
JP
Japan
Prior art keywords
group
layer
compound semiconductor
light emitting
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6577096A
Other languages
Japanese (ja)
Inventor
Akira Oya
彰 大家
Masahiko Kawada
雅彦 河田
Masayuki Momose
正之 百瀬
Jun Goto
順 後藤
Shinichi Nakatsuka
慎一 中塚
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP6577096A priority Critical patent/JPH09260786A/en
Publication of JPH09260786A publication Critical patent/JPH09260786A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To restrict lamination defects and give longer life by forming a defect restricting layer by one atomic layer or more, having a group II element and a group V element at the interface between a III-V compound semiconductor substrate and a II-VI compound semiconductor crystal. SOLUTION: At the interface between a III-V compound semiconductor substrate 11 and II-VI semiconductor crystals 12 to 20, a defect restricting layer 12 crystallized in a group II element and a group V element is formed. Here, as the group II element, it is desired to be either Zn, Cd, Be or Mg, and as the V group element, it is desired to be one among N, P, As and Sb. The II-VI compound semiconductor crystals 12 to 22 produced on the defect restricting layer 12 are ready to form a secondary growth from an early stage of growth, and the occurrence of lamination defect can be restricted. This defect restricting layer 12 is formed by simultaneous or alternating supply of the raw material of group II element and the raw material of group V element. At this time, it is desirable that the top surface of the III-V semiconductor compound substrate 11 become a stabilized surface or an excessive surface of the group V element.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は、青色ないし緑色領
域の発光ダイオード、半導体レーザなどの半導体発光素
子およびそれらの製造方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor light emitting device such as a light emitting diode in the blue to green region, a semiconductor laser and the like, and a manufacturing method thereof.

【0002】[0002]

【従来の技術】ディジタルビデオディスク(DVD)な
どの光ディスクの高密度化のためには、その光源として
用いる半導体レーザの短波長化が必要不可欠である。近
年、II−VI族化合物半導体であるZnSe系材料に
より、室温連続発振する青緑色領域の半導体レーザが実
現されている。その構造は、基板にIII−V族化合物
半導体であるGaAsを用い、クラッド層にZnMgS
Se、活性層にZnCdSeを用いたものである(例え
ば、文献 エレクトロニクス レターズ/Electronics
Letters 29 (1993) p1488)。
2. Description of the Related Art In order to increase the density of optical discs such as digital video discs (DVDs), it is essential to shorten the wavelength of the semiconductor laser used as the light source. In recent years, a ZnSe-based material that is a II-VI group compound semiconductor has realized a semiconductor laser in the blue-green region that continuously oscillates at room temperature. The structure uses GaAs which is a III-V group compound semiconductor for the substrate and ZnMgS for the cladding layer.
Se, ZnCdSe is used for the active layer (see, for example, Literature Electronics Letters / Electronics
Letters 29 (1993) p1488).

【0003】しかし、これらのII−VI族化合物半導
体を用いた半導体レーザでは、その素子寿命は数時間程
度であり、光ディスク装置を実用に供する為には、寿命
を数千時間まで改善する必要があった。
However, the semiconductor laser using these II-VI group compound semiconductors has a device lifetime of several hours, and it is necessary to improve the lifetime to several thousand hours in order to put the optical disk device into practical use. there were.

【0004】[0004]

【発明が解決しようとする課題】これらのZnSe系I
I−VI族化合物半導体レーザの寿命を制限している原
因は、次のように考えられている。GaAsなどのII
I−V族化合物半導体基板とZnSe系II−VI族化
合物半導体結晶の界面においては、通常GaとSeの結
合が形成されることによりGa2Se3化合物が生成す
る。このGa2Se3化合物上ではZnSe系結晶が3次
元成長することになり、この結果、基板との界面からI
I−VI族化合物半導体結晶中へ積層欠陥が発生する。
レーザ動作中に、この積層欠陥がレーザ構造の活性層を
貫通する点において暗点と呼ばれる欠陥が発生し、ここ
からレーザ素子の劣化が生じている。従来、II−VI
族化合物半導体結晶中に発生する積層欠陥の密度は10
4cm-2以上であり、半導体レーザの寿命を数千時間にす
るためには、この欠陥密度を102cm-2以下にすること
が必要である。
DISCLOSURE OF THE INVENTION Problems to be Solved by the Invention
The cause of limiting the life of the I-VI group compound semiconductor laser is considered as follows. II such as GaAs
At the interface between the IV compound semiconductor substrate and the ZnSe-based II-VI compound semiconductor crystal, a Ga 2 Se 3 compound is usually formed by the formation of a bond between Ga and Se. ZnSe-based crystals grow three-dimensionally on this Ga 2 Se 3 compound, and as a result, I
Stacking faults occur in the I-VI group compound semiconductor crystal.
During the laser operation, a defect called a dark spot is generated at the point where the stacking fault penetrates the active layer of the laser structure, and from this, the laser element is deteriorated. Conventionally, II-VI
The density of stacking faults generated in a group compound semiconductor crystal is 10
4 cm- 2 or more, in order to make the semiconductor laser lifetime thousands hours are necessary to the defect density in the 10 2 cm- 2 or less.

【0005】従って、本発明の目的は、III−V族化
合物半導体基板とII−VI族化合物半導体結晶の界面
から発生する積層欠陥を抑制することにより、長寿命な
半導体レーザなどの半導体発光素子を実現することであ
る。
Therefore, an object of the present invention is to provide a semiconductor light emitting device such as a semiconductor laser having a long life by suppressing stacking faults generated from the interface between the III-V group compound semiconductor substrate and the II-VI group compound semiconductor crystal. It is to be realized.

【0006】[0006]

【課題を解決するための手段】本発明では、GaAsな
どのIII−V族化合物半導体基板とII−VI族化合
物半導体結晶の界面に、II族元素とV族元素からなる
結晶による欠陥抑制層を形成する。ここで、II族元素
としては、Zn,Cd,Be,Mgのいずれか、V族元
素としては、N,P,As,Sbのいずれかであること
が好ましい。この欠陥抑制層上に作製するII−VI族
化合物半導体結晶は成長の初期段階から2次元成長が可
能となり、積層欠陥の発生が抑制される。この欠陥抑制
層は、II族元素原料とV族元素原料の同時または交互
供給を行うことにより形成する。この際、単結晶である
GaSe化合物の生成を抑制するために、III−V族
化合物半導体基板の最表面がV族元素の安定化面もしく
は過剰面となっていることが望ましい。ここで、欠陥抑
制層の厚さは、1原子層(0.5nm)以上、10nm
以下であることが望ましく、特に好ましくは1〜5nm
の範囲である。層の厚みが厚くなると格子欠陥が生成す
る。又、電気抵抗も増大し好ましくない。
According to the present invention, a defect suppressing layer made of a crystal composed of a group II element and a group V element is provided at the interface between a group III-V compound semiconductor substrate such as GaAs and a group II-VI compound semiconductor crystal. Form. Here, the group II element is preferably Zn, Cd, Be or Mg, and the group V element is preferably N, P, As or Sb. The II-VI group compound semiconductor crystal produced on this defect suppression layer can be two-dimensionally grown from the initial stage of growth, and the occurrence of stacking faults is suppressed. This defect suppression layer is formed by supplying the group II element raw material and the group V element raw material simultaneously or alternately. At this time, it is desirable that the outermost surface of the III-V compound semiconductor substrate be a stabilizing surface or an excess surface of the V group element in order to suppress the generation of the GaSe compound that is a single crystal. Here, the thickness of the defect suppression layer is 1 atomic layer (0.5 nm) or more and 10 nm.
The following is desirable, and particularly preferably 1 to 5 nm
Range. As the layer becomes thicker, lattice defects are generated. Moreover, the electric resistance also increases, which is not preferable.

【0007】また、これらの欠陥抑制層の形成を基板温
度を400℃以上で行った場合には、III−V族化合
物半導体基板とII−VI族化合物半導体結晶の各構成
元素が相互に拡散することにより、作製した半導体発光
素子において基板界面で電気特性が低下する。従って、
欠陥抑制層の形成は、基板温度100〜400℃の低温
で行うことが必要である。
When these defect suppressing layers are formed at a substrate temperature of 400 ° C. or higher, the constituent elements of the III-V group compound semiconductor substrate and the II-VI group compound semiconductor crystal mutually diffuse. As a result, the electrical characteristics of the manufactured semiconductor light emitting device deteriorate at the substrate interface. Therefore,
The defect suppression layer needs to be formed at a low substrate temperature of 100 to 400 ° C.

【0008】これらの欠陥抑制層の形成において、II
族元素原料またはV族元素原料の少なくとも一方と同時
に、原子状水素または水素ラジカルを供給することによ
り、基板温度100〜400℃の低温において結晶性の
良好な欠陥抑制層を形成することが可能となる。また、
V族元素原料として窒素ラジカルを用いた場合には、原
子状水素または水素ラジカルを導入せずに、基板温度1
00〜400℃の低温において良好な欠陥抑制層を形成
することが可能である。
In forming these defect suppressing layers, II
By supplying atomic hydrogen or hydrogen radicals at the same time as at least one of the group element raw material and the group V element raw material, it is possible to form a defect suppression layer having good crystallinity at a low substrate temperature of 100 to 400 ° C. Become. Also,
When a nitrogen radical is used as the group V element raw material, the substrate temperature is set to 1 without introducing atomic hydrogen or hydrogen radical.
It is possible to form a good defect suppressing layer at a low temperature of 00 to 400 ° C.

【0009】[0009]

【発明の実施の形態】以下に、本発明の実施例を詳細に
説明する。
Embodiments of the present invention will be described in detail below.

【0010】図1に本発明の第一の実施例の半導体レー
ザ構造を示す。本構造は、GaAs基板上に分子線エピ
タキシ(MBE)法により成長した。まず、MBE装置
の基板前処理室内で、As分子線照射下においてn型G
aAs基板11を600℃に加熱して酸化膜を除去し
た。この後、基板温度を300℃まで下げ、As分子線
の供給を停止した。このとき、反射高速電子線回折(R
HEED)によりGaAs基板11の表面はAs過剰面
となっていることが確認された。
FIG. 1 shows a semiconductor laser structure of a first embodiment of the present invention. This structure was grown on a GaAs substrate by the molecular beam epitaxy (MBE) method. First, in the substrate pretreatment chamber of the MBE apparatus, n-type G
The aAs substrate 11 was heated to 600 ° C. to remove the oxide film. After that, the substrate temperature was lowered to 300 ° C. and the supply of As molecular beam was stopped. At this time, reflection high-energy electron diffraction (R
It was confirmed by HEED) that the surface of the GaAs substrate 11 was an As-excessive surface.

【0011】次に、基板温度300℃において基板表面
へ水素ラジカルを1分間照射した。水素ラジカルは、E
CR(電子サイクロトロン共鳴)方式の活性化セルに水
素ガスを導入し、ECR電力を印加することにより発生
させた。このときの条件は、成長室圧力1×10-3
a、ECR電力100Wであった。さらに、水素ラジカ
ルを照射したまま、As分子線とZn分子線の交互供給
(各10秒)を3周期行った。X線光電子分光(XP
S)測定を行った結果、このようにして前処理を行った
GaAs基板表面には、GaとSeの結合は存在せず、
AsとZnの化合物からなる数原子層の欠陥抑制層12
の形成が確認された。
Next, the substrate surface was irradiated with hydrogen radicals at a substrate temperature of 300 ° C. for 1 minute. Hydrogen radical is E
It was generated by introducing hydrogen gas into a CR (electron cyclotron resonance) type activation cell and applying ECR power. The conditions at this time are as follows: growth chamber pressure 1 × 10 −3 P
a, ECR power was 100W. Further, the As molecular beam and the Zn molecular beam were alternately supplied (each 10 seconds) for 3 cycles while irradiating with hydrogen radicals. X-ray photoelectron spectroscopy (XP
S) As a result of the measurement, there is no bond between Ga and Se on the GaAs substrate surface thus pretreated,
Defect suppression layer 12 composed of a compound of As and Zn and having a few atomic layers
The formation of was confirmed.

【0012】この後、基板をMBE装置内のII−VI
族半導体結晶成長室へ移動し、基板温度300℃におい
て、n型ZnSeバッファ層(50nm)13、n型Z
nMgSSeクラッド層(1.5μm)14、n型Zn
SSe光ガイド層(80nm)15、ZnCdSe活性
層(7nm)16、p型ZnSSe光ガイド層(80n
m)17、p型ZnMgSSeクラッド層(1.0μ
m)18、p型ZnSe層(100nm)19、p型Z
nSeTeコンタクト層(100nm)20を順次積層
した。n型のドナーとしては塩素をドーピングした。ま
た、p型のドーピングには活性化セルにより生成した窒
素ラジカルを用いた。ここで、14、15、17、18
の各層の格子定数はGaAs基板と一致している。クラ
ッド層14、18のバンドギャップは室温で約2.9e
V、活性層16のバンドギャップは約2.4eVであ
る。また、コンタクト層20は、そのSe組成が基板側
から表面へ向けて1から0へと変化している。
After that, the substrate is mounted on the II-VI in the MBE device.
After moving to the group-semiconductor crystal growth chamber and at a substrate temperature of 300 ° C., an n-type ZnSe buffer layer (50 nm) 13, an n-type Z
nMgSSe clad layer (1.5 μm) 14, n-type Zn
SSe light guide layer (80 nm) 15, ZnCdSe active layer (7 nm) 16, p-type ZnSSe light guide layer (80 n
m) 17, p-type ZnMgSSe cladding layer (1.0 μm
m) 18, p-type ZnSe layer (100 nm) 19, p-type Z
The nSeTe contact layer (100 nm) 20 was sequentially laminated. Chlorine was doped as the n-type donor. Further, nitrogen radicals generated by the activation cell were used for p-type doping. Where 14, 15, 17, 18
The lattice constant of each layer is the same as that of the GaAs substrate. The band gaps of the cladding layers 14 and 18 are about 2.9e at room temperature.
V, the bandgap of the active layer 16 is about 2.4 eV. The Se composition of the contact layer 20 changes from 1 to 0 from the substrate side toward the surface.

【0013】作製した結晶をMBE装置から取り出し、
コンタクト層20の上部に通常のCVD技術によりSi
2膜21を形成した後、フォトリソグラフ技術により
約20μmのストライプ孔を形成し、真空蒸着法により
p電極としてAu/Pt/Ti/Ni電極22を形成し
た。さらに裏面にn電極としてAu/Ge/Ni電極2
3を形成した後、長さ約1mmにへき開した。このよう
にして作製した半導体レーザは、活性層内における欠陥
密度が102cm-2以下に低減されており、室温連続発振
動作での寿命は3000時間以上であった。
The produced crystal was taken out from the MBE apparatus,
Si is formed on the contact layer 20 by an ordinary CVD technique.
After forming the O 2 film 21, a stripe hole of about 20 μm was formed by the photolithography technique, and the Au / Pt / Ti / Ni electrode 22 was formed as the p electrode by the vacuum evaporation method. Further, an Au / Ge / Ni electrode 2 is formed on the back surface as an n electrode.
After forming No. 3, it was cleaved to a length of about 1 mm. The semiconductor laser thus produced has a defect density in the active layer are reduced to 10 2 cm- 2 or less, the life at room temperature continuous oscillation operation was not less than 3000 hours.

【0014】図2に本発明の第二の実施例の半導体レー
ザ構造を示す。本構造は、GaAs基板上に分子線エピ
タキシ(MBE)法により成長した。まず、MBE装置
の基板前処理室内で、As分子線照射下においてn型G
aAs基板11を600℃に加熱して酸化膜を除去し
た。この後、基板温度を300℃まで下げ、As分子線
の供給を停止した。このとき、反射高速電子線回折(R
HEED)によりGaAs基板31の表面はAs過剰面
となっていることが確認された。
FIG. 2 shows a semiconductor laser structure according to the second embodiment of the present invention. This structure was grown on a GaAs substrate by the molecular beam epitaxy (MBE) method. First, in the substrate pretreatment chamber of the MBE apparatus, n-type G
The aAs substrate 11 was heated to 600 ° C. to remove the oxide film. After that, the substrate temperature was lowered to 300 ° C. and the supply of As molecular beam was stopped. At this time, reflection high-energy electron diffraction (R
It was confirmed by HEED) that the surface of the GaAs substrate 31 was an As-excessive surface.

【0015】次に、基板をMBE装置内のII−VI族
半導体結晶成長室へ移動し、基板温度300℃におい
て、窒素ラジカルとZn分子線の交互供給(各10秒)
を3周期行った。窒素ラジカルは、ECR(電子サイク
ロトロン共鳴)方式の活性化セルに窒素ガスを導入し、
ECR電力を印加することにより発生させた。このとき
の条件は、成長室圧力1×10-3Pa、ECR電力10
0Wであった。X線光電子分光(XPS)測定を行った
結果、このようにして前処理を行ったGaAs基板表面
には、GaとSeの結合は存在せず、NとZnの化合物
からなる数原子層の欠陥抑制層24の形成が確認され
た。
Next, the substrate is moved to a II-VI group semiconductor crystal growth chamber in the MBE apparatus, and at a substrate temperature of 300 ° C., nitrogen radicals and Zn molecular beams are alternately supplied (each 10 seconds).
Was carried out for 3 cycles. Nitrogen radicals are produced by introducing nitrogen gas into an ECR (electron cyclotron resonance) type activation cell,
It was generated by applying ECR power. The conditions at this time are as follows: growth chamber pressure 1 × 10 −3 Pa, ECR power 10
It was 0W. As a result of X-ray photoelectron spectroscopy (XPS) measurement, on the surface of the GaAs substrate thus pretreated, there is no bond between Ga and Se, and defects in several atomic layers made of a compound of N and Zn. The formation of the suppression layer 24 was confirmed.

【0016】この後、基板温度300℃において、n型
ZnSeバッファ層(50nm)13、n型ZnMgS
Seクラッド層14(1.5μm)、n型ZnSSe光
ガイド層(80nm)15、ZnCdSe活性層16
(7nm)、p型ZnSSe光ガイド層(80nm)1
7、p型ZnMgSSeクラッド層(1.0μm)1
8、p型ZnSe層(100nm)19、p型ZnSe
Teコンタクト層(100nm)20を順次積層した。
n型のドナーとしては塩素をドーピングした。また、p
型のドーピングには活性化セルにより生成した窒素ラジ
カルを用いた。ここで、14、15、17、18の各層
の格子定数はGaAs基板と一致している。クラッド層
14、18のバンドギャップは室温で約2.9eV、活
性層16のバンドギャップは約2.4eVである。ま
た、コンタクト層20は、そのSe組成が基板側から表
面へ向けて1から0へと変化している。
After that, at a substrate temperature of 300 ° C., the n-type ZnSe buffer layer (50 nm) 13 and the n-type ZnMgS are formed.
Se clad layer 14 (1.5 μm), n-type ZnSSe optical guide layer (80 nm) 15, ZnCdSe active layer 16
(7 nm), p-type ZnSSe optical guide layer (80 nm) 1
7, p-type ZnMgSSe clad layer (1.0 μm) 1
8, p-type ZnSe layer (100 nm) 19, p-type ZnSe
Te contact layers (100 nm) 20 were sequentially stacked.
Chlorine was doped as the n-type donor. Also, p
Nitrogen radicals generated by the activation cell were used for the type doping. Here, the lattice constants of the layers 14, 15, 17, and 18 are the same as those of the GaAs substrate. The band gaps of the clad layers 14 and 18 are about 2.9 eV at room temperature, and the band gap of the active layer 16 is about 2.4 eV. The Se composition of the contact layer 20 changes from 1 to 0 from the substrate side toward the surface.

【0017】作製した結晶をMBE装置から取り出し、
コンタクト層20の上部に通常のCVD技術によりSi
2膜21を形成した後、フォトリソグラフ技術により
約20μmのストライプ孔を形成し、真空蒸着法により
p電極としてAu/Pt/Ti/Ni電極22を形成し
た。さらに裏面にn電極としてAu/Ge/Ni電極2
3を形成した後、長さ約1mmにへき開した。このよう
にして作製した半導体レーザは、活性層内における欠陥
密度が102cm-2以下に低減されており、室温連続発振
動作での寿命は3000時間以上であった。
The produced crystal was taken out from the MBE apparatus,
Si is formed on the contact layer 20 by an ordinary CVD technique.
After forming the O 2 film 21, a stripe hole of about 20 μm was formed by the photolithography technique, and the Au / Pt / Ti / Ni electrode 22 was formed as the p electrode by the vacuum evaporation method. Further, an Au / Ge / Ni electrode 2 is formed on the back surface as an n electrode.
After forming No. 3, it was cleaved to a length of about 1 mm. The semiconductor laser thus produced has a defect density in the active layer are reduced to 10 2 cm- 2 or less, the life at room temperature continuous oscillation operation was not less than 3000 hours.

【0018】上記実施例では、GaAs基板上に直接I
I−VI族化合物半導体結晶を成長する場合について述
べたが、GaAs基板上にまずIII−V族化合物半導
体結晶層をバッファ層として形成する場合についても、
そのバッファ層とさらにその上に形成するII−VI族
化合物半導体結晶の界面において上記実施例と同様の欠
陥抑制層を形成してもよい。
In the above embodiment, I was directly formed on the GaAs substrate.
Although the case of growing a group I-VI compound semiconductor crystal has been described, the case where a group III-V compound semiconductor crystal layer is first formed as a buffer layer on a GaAs substrate is also described.
At the interface between the buffer layer and the II-VI group compound semiconductor crystal formed thereon, a defect suppression layer similar to that of the above-mentioned embodiment may be formed.

【0019】[0019]

【発明の効果】以上述べたように、本発明によれば、I
I−VI族化合物半導体結晶における積層欠陥の発生を
抑制出来る。従って、II−VI族化合物半導体結晶を
用いて青色ないし緑色領域の半導体発光素子を作成した
場合、長寿命な半導体発光素子を実現することが可能と
なる。
As described above, according to the present invention, I
Generation of stacking faults in the I-VI group compound semiconductor crystal can be suppressed. Therefore, when a semiconductor light emitting device in the blue to green region is prepared using a II-VI compound semiconductor crystal, it becomes possible to realize a semiconductor light emitting device having a long life.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の実施例による半導体レーザの断面図。FIG. 1 is a sectional view of a semiconductor laser according to an embodiment of the present invention.

【符号の説明】[Explanation of symbols]

11…n型GaAs基板 12…ZnAs欠陥抑制層 13…n型ZnSeバッファ層 14…n型ZnMgSSeクラッド層 15…n型ZnSSe光ガイド層 16…ZnCdSe活性層 17…p型ZnSSe光ガイド層 18…p型ZnMgSSeクラッド層 19…p型ZnSe層 20…p型ZnSeTeコンタクト層 21…SiO2膜 22…Au/Pt/Ti/Ni電極 23…Au/Ge/Ni電極 24…ZnN欠陥抑制層。11 ... n-type GaAs substrate 12 ... ZnAs defect suppression layer 13 ... n-type ZnSe buffer layer 14 ... n-type ZnMgSSe cladding layer 15 ... n-type ZnSSe light guide layer 16 ... ZnCdSe active layer 17 ... p-type ZnSSe light guide layer 18 ... p Type ZnMgSSe clad layer 19 ... p type ZnSe layer 20 ... p type ZnSeTe contact layer 21 ... SiO 2 film 22 ... Au / Pt / Ti / Ni electrode 23 ... Au / Ge / Ni electrode 24 ... ZnN defect suppression layer.

───────────────────────────────────────────────────── フロントページの続き (72)発明者 後藤 順 東京都国分寺市東恋ケ窪1丁目280番地 株式会社日立製作所中央研究所内 (72)発明者 中塚 慎一 東京都国分寺市東恋ケ窪1丁目280番地 株式会社日立製作所中央研究所内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Jun Goto 1-280, Higashi Koikeku, Kokubunji, Tokyo, Central Research Laboratory, Hitachi, Ltd. (72) Shinichi Nakatsuka 1-280, Higashi Koikeku, Kokubunji, Tokyo Hitachi, Ltd. Central Research Center

Claims (6)

【特許請求の範囲】[Claims] 【請求項1】III−V族化合物半導体基板上に形成さ
れたII−VI族化合物半導体からなる半導体発光素子
において、III−V族化合物半導体基板とII−VI
族化合物半導体結晶の界面に、II族元素とV族元素を
有してなる欠陥抑制層が少なくとも1原子層以上形成さ
れていることを特徴とする半導体発光素子。
1. A semiconductor light emitting device comprising a II-VI group compound semiconductor formed on a III-V group compound semiconductor substrate, comprising a III-V group compound semiconductor substrate and a II-VI group.
A semiconductor light emitting device, wherein at least one atomic layer or more of a defect suppressing layer containing a group II element and a group V element is formed at an interface of a group compound semiconductor crystal.
【請求項2】II族元素原料とV族元素原料を同時また
は交互に供給することにより、II族元素とV族元素を
有して欠陥抑制層を形成することを特徴とする請求項1
記載の半導体発光素子の製造方法。
2. A defect suppression layer having a group II element and a group V element by simultaneously or alternately supplying a group II element raw material and a group V element raw material.
The manufacturing method of the semiconductor light emitting device according to the above.
【請求項3】基板温度が100℃以上400℃以下の範
囲で、II族元素とV族元素からなる欠陥抑制層を形成
することを特徴とする請求項1〜2記載の半導体発光素
子の製造方法。
3. A semiconductor light emitting device according to claim 1, wherein the defect suppressing layer made of a group II element and a group V element is formed at a substrate temperature of 100 ° C. or higher and 400 ° C. or lower. Method.
【請求項4】III−V族化合物半導体基板のV族元素
安定化面もしくはV族元素過剰面上に、II族元素およ
びV族元素からなる欠陥抑制層を形成することを特徴と
する請求項1〜3記載の半導体発光素子の製造方法。
4. A defect suppressing layer comprising a group II element and a group V element is formed on a group V element stabilizing surface or a group V element excess surface of a group III-V compound semiconductor substrate. 1. The method for manufacturing a semiconductor light emitting device according to any one of 1 to 3.
【請求項5】請求項2〜4記載の半導体発光素子の製造
方法において、II族元素原料またはV族元素原料の少
なくとも一方と同時に、原子状水素または水素ラジカル
を供給することを特徴とする半導体発光素子の製造方
法。
5. A semiconductor light-emitting device manufacturing method according to claim 2, wherein atomic hydrogen or hydrogen radicals are supplied simultaneously with at least one of the group II element raw material and the group V element raw material. Method for manufacturing light emitting device.
【請求項6】請求項2〜4記載の半導体発光素子の製造
方法において、V族元素原料として窒素ラジカルを供給
することを特徴とする半導体発光素子の製造方法。
6. The method for manufacturing a semiconductor light emitting device according to claim 2, wherein a nitrogen radical is supplied as a group V element raw material.
JP6577096A 1996-03-22 1996-03-22 Semiconductor light emitting element and its manufacture Pending JPH09260786A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6577096A JPH09260786A (en) 1996-03-22 1996-03-22 Semiconductor light emitting element and its manufacture

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6577096A JPH09260786A (en) 1996-03-22 1996-03-22 Semiconductor light emitting element and its manufacture

Publications (1)

Publication Number Publication Date
JPH09260786A true JPH09260786A (en) 1997-10-03

Family

ID=13296602

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6577096A Pending JPH09260786A (en) 1996-03-22 1996-03-22 Semiconductor light emitting element and its manufacture

Country Status (1)

Country Link
JP (1) JPH09260786A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007318164A (en) * 2007-07-17 2007-12-06 Univ Of Tsukuba Semiconductor device, and method of manufacturing the same
US9012334B2 (en) 2001-02-02 2015-04-21 Applied Materials, Inc. Formation of a tantalum-nitride layer
US9587310B2 (en) 2001-03-02 2017-03-07 Applied Materials, Inc. Lid assembly for a processing system to facilitate sequential deposition techniques
CN109638647A (en) * 2018-12-24 2019-04-16 香港中文大学(深圳) A kind of fiber embedded disk lasers part

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9012334B2 (en) 2001-02-02 2015-04-21 Applied Materials, Inc. Formation of a tantalum-nitride layer
US9587310B2 (en) 2001-03-02 2017-03-07 Applied Materials, Inc. Lid assembly for a processing system to facilitate sequential deposition techniques
US10280509B2 (en) 2001-07-16 2019-05-07 Applied Materials, Inc. Lid assembly for a processing system to facilitate sequential deposition techniques
JP2007318164A (en) * 2007-07-17 2007-12-06 Univ Of Tsukuba Semiconductor device, and method of manufacturing the same
CN109638647A (en) * 2018-12-24 2019-04-16 香港中文大学(深圳) A kind of fiber embedded disk lasers part

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