JPH09260621A - Manufacture of soi substrate - Google Patents

Manufacture of soi substrate

Info

Publication number
JPH09260621A
JPH09260621A JP6253596A JP6253596A JPH09260621A JP H09260621 A JPH09260621 A JP H09260621A JP 6253596 A JP6253596 A JP 6253596A JP 6253596 A JP6253596 A JP 6253596A JP H09260621 A JPH09260621 A JP H09260621A
Authority
JP
Japan
Prior art keywords
silicon
substrate
implanted
region
ions
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6253596A
Other languages
Japanese (ja)
Inventor
Masaru Takamatsu
勝 高松
Mitsuru Sudo
充 須藤
Tetsuya Nakai
哲弥 中井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Materials Silicon Corp
Mitsubishi Materials Corp
Original Assignee
Mitsubishi Materials Silicon Corp
Mitsubishi Materials Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Materials Silicon Corp, Mitsubishi Materials Corp filed Critical Mitsubishi Materials Silicon Corp
Priority to JP6253596A priority Critical patent/JPH09260621A/en
Publication of JPH09260621A publication Critical patent/JPH09260621A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To manufacture a high quality SOI substrate, having a high quality buried silicon oxide layer with extremely small Si islands and silicon pipe and an active Si layer on the surface of a substrate containing less silicon oxide deposit. SOLUTION: Oxygen ions in low dose are implanted in the inside of a silicon substrate 11, and then silicon ions are further implanted in a damaged region on the substrate side formed by the oxygen ion implantation from the ion implanted region inside the silicon substrate 11 implanted with the oxygen ions. Later, by burying, the silicon oxide layer 12 is formed in the region at a specific depth from the surface of the silicon substrate 11, so as to form an active Si layer 11a on the surface of the substrate 11.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は絶縁層上にSi層を
形成したSOI(Silicon-On-Insulator)基板の製造方
法に関する。更に詳しくは低ドーズSIMOX(Separa
tion by Implanted Oxygen)技術によるSOI基板の製
造方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing an SOI (Silicon-On-Insulator) substrate in which a Si layer is formed on an insulating layer. More specifically, low dose SIMOX (Separa
The present invention relates to a method of manufacturing an SOI substrate by using the technology of Implanted Oxygen).

【0002】[0002]

【従来の技術】SOI基板は将来のLSIに用いられる
基板として注目されている。このSOI基板の製造方法
には、シリコン基板同士を絶縁膜を介して貼り合わせる
貼り合わせ法、絶縁性基板又は絶縁性薄膜を表面に有す
る基板の上に多結晶シリコン薄膜を堆積させ、多結晶シ
リコン薄膜を再結晶化する方法、SIMOX法などがあ
る。このSIMOX法は、シリコン基板の内部に絶縁層
を埋込む法の1つであって、具体的にはシリコン基板内
部に高濃度の酸素イオンを注入した後、高温でアニール
処理してこのシリコン基板表面から所定の深さの領域に
埋込みシリコン酸化層を形成し、その表面側のSi層を
活性領域とする方法である。このSIMOX法は、上記
貼り合わせ方法のように表面のSi層を研削研磨するこ
となく、均一な厚さの活性なSi層が得られる有力な方
法である。
2. Description of the Related Art SOI substrates are drawing attention as substrates to be used in future LSIs. This SOI substrate manufacturing method includes a bonding method in which silicon substrates are bonded to each other via an insulating film, a polycrystalline silicon thin film is deposited on an insulating substrate or a substrate having an insulating thin film on its surface, and polycrystalline silicon thin film is deposited. There are a method of recrystallizing a thin film, a SIMOX method, and the like. This SIMOX method is one of the methods of burying an insulating layer inside a silicon substrate, and specifically, high-concentration oxygen ions are implanted into the inside of the silicon substrate and then annealed at a high temperature. This is a method in which a buried silicon oxide layer is formed in a region having a predetermined depth from the surface and the Si layer on the surface side is used as an active region. The SIMOX method is a promising method that can obtain an active Si layer having a uniform thickness without grinding and polishing the Si layer on the surface unlike the above-mentioned bonding method.

【0003】近年、この酸素イオンの注入量を低減し、
イオン注入装置の処理時間を短縮してSOI基板の製造
コストを低下させる、低ドーズ技術が実用化し始めてい
る。この低ドーズ技術では、例えば加速エネルギ180
keV、注入量4×1017/cm2で酸素イオン注入し
た後、アルゴンと酸素の混合ガス雰囲気中、又は窒素と
酸素の混合ガス雰囲気中、1350℃でアニール処理し
ている。この低ドーズSIMOX法により、SOI基板
中の埋込みシリコン酸化層を連続化し、かつこの酸化層
中に島状のSi領域(Si島)を形成しないように、酸
素イオン注入量等の注入条件を厳守し、かつアニール処
理を最適化することが極めて重要である。
In recent years, the amount of implantation of oxygen ions has been reduced,
Low-dose technology, which shortens the processing time of the ion implantation apparatus and reduces the manufacturing cost of the SOI substrate, has begun to be put into practical use. With this low dose technique, for example, an acceleration energy of 180
After oxygen ion implantation with keV and an implantation amount of 4 × 10 17 / cm 2 , annealing is performed at 1350 ° C. in a mixed gas atmosphere of argon and oxygen or a mixed gas atmosphere of nitrogen and oxygen. By this low-dose SIMOX method, the buried silicon oxide layer in the SOI substrate is made continuous, and the implantation conditions such as the oxygen ion implantation amount are strictly adhered to so as not to form island-shaped Si regions (Si islands) in this oxide layer. It is extremely important to optimize the annealing process.

【0004】[0004]

【発明が解決しようとする課題】しかし、従来の低ドー
ズSIMOX法で十分に制御した条件で酸素イオン注入
しても、図3(a)に示すように酸素イオン注入領域
(酸素イオンピーク位置B)より基板1の表面側に、酸
素イオン注入に伴う損傷領域(ダメージピーク位置A)
が存在する。酸素イオン注入後にアルゴンと酸素の混合
ガス雰囲気中、又は窒素と酸素の混合ガス雰囲気中、1
300℃以上のアニール処理の中間段階において、この
損傷領域に酸素分子又は酸素原子が入り込み、シリコン
酸化物の析出物が形成される。低ドーズSIMOX法で
は、次式(1)の反応で示されるように、アニール処理
中に損傷領域付近で、シリコン酸化物の析出物が形成さ
れる。 (1+x)Si + 2[O]i → SiO2 + x[Si]i ……(1) しかしながら、損傷領域に形成されるシリコン酸化物の
析出物の大部分は、図3(b)及び(c)に示すように
その後のアニール処理において、上記シリコン酸化物の
析出物と酸素イオンピーク位置B付近のシリコン酸化物
との凝集に起因して、埋込みシリコン酸化層中にSi島
Cや、埋込みシリコン酸化層をSiが貫通するシリコン
パイプDが形成される。またSi島やシリコンパイプに
加えて、従来の低ドーズSIMOX法では、上記シリコ
ン酸化物の析出物の一部がアニール処理中にシリコン基
板1の表面のSi層中に消滅せずに残留してしまう。こ
の種のSi島やシリコンパイプが多くなると、埋込みシ
リコン酸化層2の絶縁層としての機能が劣り、デバイス
間の分離を十分に行うことができない。
However, even if the oxygen ions are implanted under the conditions sufficiently controlled by the conventional low dose SIMOX method, as shown in FIG. 3 (a), the oxygen ion implantation region (oxygen ion peak position B ) From the surface side of the substrate 1 to the damaged area (damage peak position A) due to oxygen ion implantation
Exists. After the oxygen ion implantation, in a mixed gas atmosphere of argon and oxygen, or in a mixed gas atmosphere of nitrogen and oxygen, 1
In the intermediate stage of the annealing process at 300 ° C. or higher, oxygen molecules or oxygen atoms enter this damaged region and a silicon oxide precipitate is formed. In the low-dose SIMOX method, as shown by the reaction of the following equation (1), a silicon oxide precipitate is formed near the damaged region during the annealing process. (1 + x) Si + 2 [O] i → SiO 2 + x [Si] i (1) However, most of the silicon oxide precipitates formed in the damaged region are shown in FIGS. As shown in c), in the subsequent annealing treatment, due to the agglomeration of the above-mentioned silicon oxide precipitate and the silicon oxide near the oxygen ion peak position B, the Si island C or the embedded silicon oxide C is embedded in the embedded silicon oxide layer. A silicon pipe D in which Si penetrates the silicon oxide layer is formed. In addition to Si islands and silicon pipes, in the conventional low-dose SIMOX method, some of the above-mentioned silicon oxide precipitates remain in the Si layer on the surface of the silicon substrate 1 without disappearing during the annealing treatment. I will end up. When the number of Si islands and silicon pipes of this type increases, the function of the buried silicon oxide layer 2 as an insulating layer becomes poor, and the devices cannot be sufficiently separated.

【0005】本発明の目的は、Si島やシリコンパイプ
が極めて少ない高品質の埋込みシリコン酸化層及びシリ
コン酸化物の析出物の少ない基板表面の活性なSi層を
有する高品質なSOI基板の製造方法を提供することに
ある。
An object of the present invention is to provide a method for producing a high-quality SOI substrate having a high-quality buried silicon oxide layer with very few Si islands and silicon pipes and an active Si layer on the surface of a substrate with less silicon oxide deposits. To provide.

【0006】[0006]

【課題を解決するための手段】請求項1に係る発明は、
図1(a)〜(c)に示すように、シリコン基板11内
部に酸素イオンを低ドーズで注入し、この酸素イオン注
入したシリコン基板11内部の酸素イオン注入領域より
基板表面側の酸素イオン注入により形成された損傷領域
にシリコンイオンを注入した後、アニール処理してシリ
コン基板11表面から所定の深さの領域に埋込みシリコ
ン酸化層12を形成し、この基板表面に活性なSi層1
1aを形成することを特徴とするSOI基板の製造方法
である。図1(a)に示すように、酸素イオン注入によ
り酸素イオン注入領域(酸素イオンピーク位置B)と、
この領域より基板表面側に酸素イオン注入に伴う損傷領
域(ダメージピーク位置A)が形成される。図1(b)
に示すように、この状態でシリコンイオンを注入する
と、損傷領域にシリコン原子が入り込み格子間シリコン
となる。この状態でアニール処理すると、損傷領域にお
いて前述した式(1)の反応が起こりにくくなり、シリ
コン酸化物の析出物の形成が抑制される。
The invention according to claim 1 is
As shown in FIGS. 1A to 1C, oxygen ions are implanted into the silicon substrate 11 at a low dose, and the oxygen ions are implanted on the substrate surface side of the oxygen ion implanted region inside the silicon substrate 11 into which the oxygen ions are implanted. After implanting silicon ions into the damaged region formed by, the silicon oxide layer 12 is formed in a region of a predetermined depth from the surface of the silicon substrate 11 by annealing, and the active Si layer 1 is formed on the surface of the substrate.
1a is a method for manufacturing an SOI substrate. As shown in FIG. 1A, an oxygen ion implantation region (oxygen ion peak position B) is formed by oxygen ion implantation,
A damaged region (damage peak position A) due to oxygen ion implantation is formed on the substrate surface side from this region. FIG. 1 (b)
As shown in, when silicon ions are implanted in this state, silicon atoms enter the damaged region and become interstitial silicon. If the annealing treatment is performed in this state, the reaction of the above-described formula (1) is less likely to occur in the damaged region, and the formation of silicon oxide precipitates is suppressed.

【0007】また請求項2に係る発明は、図2(a)〜
(c)に示すように、シリコン基板11内部にシリコン
イオンを注入し、このシリコンイオン注入したシリコン
基板11内部のシリコンイオン注入領域より深い所定の
領域に酸素イオンを低ドーズで注入した後、アニール処
理してシリコン基板11表面から上記所定の領域に埋込
みシリコン酸化層12を形成し、この基板表面に活性な
Si層11aを形成することを特徴とするSOI基板の
製造方法である。図2(a)に示すように、埋込みシリ
コン酸化層となる基板表面から所定の深さの領域より基
板表面側の領域にシリコンイオンを注入する。このシリ
コンイオン注入により上記基板表面側の領域のシリコン
格子間にシリコン原子が注入される(ピーク位置
A’)。その後、酸素イオンをシリコンイオン注入領域
より深い所定の領域に注入すると(酸素イオンピーク位
置B)、この所定の領域にシリコン酸化物の析出物が形
成される一方、この領域より基板表面側の領域には既に
格子間シリコンが存在するため、酸素原子が入り込みに
くくなる。これによりアニール処理時に前述した式
(1)の反応が起こりにくくなり、シリコン酸化物の析
出物の形成が抑制される。
The invention according to claim 2 is based on FIG.
As shown in (c), silicon ions are implanted into the silicon substrate 11, and oxygen ions are implanted at a low dose into a predetermined region deeper than the silicon ion implanted region inside the silicon substrate 11 into which the silicon ions have been implanted, and then annealed. A method for manufacturing an SOI substrate is characterized in that a buried silicon oxide layer 12 is formed in the predetermined region from the surface of the silicon substrate 11 by processing, and an active Si layer 11a is formed on the surface of the substrate. As shown in FIG. 2A, silicon ions are implanted into a region closer to the substrate surface than a region having a predetermined depth from the substrate surface to be a buried silicon oxide layer. By this silicon ion implantation, silicon atoms are implanted between the silicon lattices in the region on the substrate surface side (peak position A ′). After that, when oxygen ions are implanted into a predetermined region deeper than the silicon ion implantation region (oxygen ion peak position B), a precipitate of silicon oxide is formed in this predetermined region, while a region on the substrate surface side from this region is formed. Since interstitial silicon already exists in, it becomes difficult for oxygen atoms to enter. This makes it difficult for the reaction of the above formula (1) to occur during the annealing treatment, and suppresses the formation of silicon oxide precipitates.

【0008】請求項1又は2に係る製造方法では、ピー
ク位置A,A’の領域でシリコン酸化物の析出物が形成
しにくくなる結果、この析出物とピーク位置Bの領域の
シリコン酸化物の析出物との凝集に起因した埋込みシリ
コン酸化層中のSi島が極めて少なくなり、またピーク
位置Bにおけるシリコン酸化物の成長が高まるためシリ
コンパイプも極めて少なくなる。同時に基板表面の活性
なSi層中のシリコン酸化物の析出物がアニール処理に
より埋込みシリコン酸化層12に取り込まれ、このSi
層11aにおいてシリコン酸化物の析出物が減少する。
In the manufacturing method according to the first or second aspect, it becomes difficult to form a silicon oxide precipitate in the regions of the peak positions A and A ', and as a result, the precipitate and the silicon oxide in the region of the peak position B are formed. The number of Si islands in the buried silicon oxide layer due to the agglomeration with the precipitate is extremely small, and the growth of silicon oxide at the peak position B is increased, so that the number of silicon pipes is also extremely small. At the same time, the precipitate of silicon oxide in the active Si layer on the substrate surface is taken into the buried silicon oxide layer 12 by the annealing treatment, and this Si
Silicon oxide deposits are reduced in layer 11a.

【0009】[0009]

【発明の実施の形態】本発明の酸素イオンの注入(dos
e)は低ドーズである。請求項1及び2に係る発明と
も、酸素イオンの注入は、高くとも6×1017/cm2
の注入量で行う。またシリコンイオンの注入は、この注
入によるダメージピーク付近に注入ピーク位置を持つ注
入加速エネルギで注入する。例えば高くとも6×1017
/cm2の注入量で行う。酸素イオンの注入量が6×1
17/cm2を越えるとSi島が増大する。好ましくは
4.5×1017/cm2以下である。シリコンイオンの
注入量が6×1017/cm2を越えると、注入損傷によ
る欠陥が増大する。好ましくは2×1017/cm2以下
である。アニール処理は、アルゴンと酸素の混合ガス雰
囲気中、又は窒素と酸素の混合ガス雰囲気中、1300
℃以上でシリコン融点温度未満の範囲内の温度で行われ
る。
DETAILED DESCRIPTION OF THE INVENTION Oxygen ion implantation (dos) of the present invention
e) has a low dose. In both the inventions according to claims 1 and 2, the implantation of oxygen ions is at most 6 × 10 17 / cm 2.
Injection amount. Further, the implantation of silicon ions is performed with the implantation acceleration energy having the implantation peak position near the damage peak due to this implantation. For example, at most 6 × 10 17
/ Cm 2 injection amount. Oxygen ion implantation amount is 6 × 1
When it exceeds 0 17 / cm 2 , Si islands increase. It is preferably 4.5 × 10 17 / cm 2 or less. If the implantation amount of silicon ions exceeds 6 × 10 17 / cm 2 , defects due to implantation damage increase. It is preferably 2 × 10 17 / cm 2 or less. The annealing treatment is performed in a mixed gas atmosphere of argon and oxygen or a mixed gas atmosphere of nitrogen and oxygen for 1300
It is performed at a temperature in the range of ℃ or more and less than the melting point of silicon.

【0010】[0010]

【実施例】次に、本発明の実施例を比較例とともに図面
に基づいて詳しく説明する。 <実施例1>厚さ625μmのシリコン基板の所定の領
域(例えば、基板表面から約0.46μmの領域)に次
の条件で酸素イオン(O+)を注入した。 加速電圧: 185 keV ドーズ量: 4×1017/cm2 基板加熱温度:600℃ 次いで、シリコン基板の上記領域より基板表面側の領域
(例えば、基板表面から約0.25μmの領域)に次の
条件でシリコンイオン(Si+)を注入した。 加速電圧: 160 keV ドーズ量: 8×1015/cm2 基板加熱温度:600℃ シリコンイオン注入後に、シリコン基板をアルゴン(99
%)と酸素(1%)の混合ガス雰囲気中で800℃に保
持された熱処理炉に入れ、昇温速度5℃/分で1360
℃まで昇温した。この温度で4時間保持してアニール処
理した。
Embodiments of the present invention will now be described in detail with reference to the drawings together with comparative examples. Example 1 Oxygen ions (O + ) were implanted into a predetermined region (for example, a region of about 0.46 μm from the substrate surface) of a 625 μm thick silicon substrate under the following conditions. Accelerating voltage: 185 keV Dose amount: 4 × 10 17 / cm 2 Substrate heating temperature: 600 ° C. Next, in the region on the substrate surface side from the above region of the silicon substrate (for example, a region of about 0.25 μm from the substrate surface), Silicon ions (Si + ) were implanted under the conditions. Accelerating voltage: 160 keV Dose amount: 8 × 10 15 / cm 2 Substrate heating temperature: 600 ° C. After the silicon ion implantation, the silicon substrate is subjected to argon (99)
%) And oxygen (1%) in a heat treatment furnace maintained at 800 ° C in a mixed gas atmosphere, and a temperature rising rate of 5 ° C / min for 1360
The temperature was raised to ° C. This temperature was maintained for 4 hours for annealing treatment.

【0011】<実施例2>実施例1と同一のシリコン基
板を実施例1と同一条件でシリコンイオンを注入した
後、次いで実施例1と同一条件で酸素イオンを注入し
た。酸素イオン注入後に、実施例1と同様にアニール処
理した。
Example 2 After implanting silicon ions into the same silicon substrate as in Example 1 under the same conditions as in Example 1, oxygen ions were subsequently implanted under the same conditions as in Example 1. After the oxygen ion implantation, the annealing treatment was performed in the same manner as in Example 1.

【0012】<比較例1>実施例1と同一のシリコン基
板を同一条件で酸素イオン注入した後、シリコンイオン
を注入することなく、実施例1と同様にアニール処理し
た。
Comparative Example 1 After the same silicon substrate as in Example 1 was implanted with oxygen ions under the same conditions, the same annealing treatment as in Example 1 was performed without implanting silicon ions.

【0013】<比較観察>実施例1,2及び比較例1の
各SOI基板の埋込みシリコン酸化層中のシリコンパイ
プの密度を測定した。このシリコンパイプの密度はSO
I基板の両面を電極で挟んで硫酸銅溶液に浸漬し、通電
した時の硫酸銅の析出量により求めた。その結果を表1
に示す。
<Comparative Observation> The density of the silicon pipe in the buried silicon oxide layer of each SOI substrate of Examples 1 and 2 and Comparative Example 1 was measured. The density of this silicon pipe is SO
I was sandwiched between electrodes on both sides of the I substrate and immersed in a copper sulfate solution. Table 1 shows the results.
Shown in

【0014】[0014]

【表1】 [Table 1]

【0015】表1から明らかなように、比較例1のシリ
コンパイプ密度に比べて、実施例1及び2のシリコンパ
イプ密度は大幅に低減することが判明した。
As is apparent from Table 1, it was found that the silicon pipe densities of Examples 1 and 2 were significantly reduced as compared with the silicon pipe density of Comparative Example 1.

【0016】[0016]

【発明の効果】以上述べたように、本発明のSOI基板
の製造方法によれば、酸素イオンの注入前又は注入後に
シリコンイオンを注入することにより、Si島やシリコ
ンパイプが極めて少ない高品質の埋込みシリコン酸化層
を形成できる。また基板表面の活性なSi層にシリコン
酸化物の析出物を少なくすることができる。
As described above, according to the method for manufacturing an SOI substrate of the present invention, by implanting silicon ions before or after implanting oxygen ions, a high quality of silicon islands and silicon pipes is extremely small. A buried silicon oxide layer can be formed. In addition, silicon oxide precipitates can be reduced in the active Si layer on the substrate surface.

【図面の簡単な説明】[Brief description of drawings]

【図1】請求項1に係る本発明のシリコン基板の断面を
工程順に模式的に示す図。
FIG. 1 is a diagram schematically showing a cross section of a silicon substrate of the present invention according to claim 1 in the order of steps.

【図2】請求項2に係る本発明のシリコン基板の断面を
工程順に模式的に示す図。
FIG. 2 is a view schematically showing the cross section of the silicon substrate of the present invention according to claim 2 in the order of steps.

【図3】従来例のシリコン基板の断面を工程順に模式的
に示す図。
FIG. 3 is a diagram schematically showing a cross section of a conventional silicon substrate in the order of steps.

【符号の説明】[Explanation of symbols]

11 シリコン基板 11a 基板表面のSi層 12 埋込みシリコン酸化層 11 Silicon Substrate 11a Si Layer on Substrate 12 Embedded Silicon Oxide Layer

───────────────────────────────────────────────────── フロントページの続き (72)発明者 中井 哲弥 埼玉県大宮市北袋町1丁目297番地 三菱 マテリアル株式会社総合研究所内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Tetsuya Nakai 1-297, Kitabukuro-cho, Omiya-shi, Saitama Mitsubishi Materials Corporation

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 シリコン基板(11)内部に酸素イオンを低
ドーズで注入し、前記酸素イオン注入したシリコン基板
(11)内部の酸素イオン注入領域より基板表面側の酸素イ
オン注入により形成された損傷領域にシリコンイオンを
注入した後、アニール処理して前記シリコン基板(11)表
面から所定の深さの領域に埋込みシリコン酸化層(12)を
形成し、前記基板表面に活性なSi層(11a)を形成する
ことを特徴とするSOI基板の製造方法。
1. A silicon substrate in which oxygen ions are implanted into a silicon substrate (11) at a low dose, and the oxygen ions are implanted.
(11) After implanting silicon ions into the damaged region formed by oxygen ion implantation on the substrate surface side from the oxygen ion implantation region inside, annealing treatment is performed to a region of a predetermined depth from the silicon substrate (11) surface. A method for manufacturing an SOI substrate, which comprises forming an embedded silicon oxide layer (12) and forming an active Si layer (11a) on the substrate surface.
【請求項2】 シリコン基板(11)内部にシリコンイオン
を注入し、前記シリコンイオン注入したシリコン基板(1
1)内部のシリコンイオン注入領域より深い所定の領域に
酸素イオンを低ドーズで注入した後、アニール処理して
前記シリコン基板(11)表面から前記所定の領域に埋込み
シリコン酸化層(12)を形成し、前記基板表面に活性なS
i層(11a)を形成することを特徴とするSOI基板の製
造方法。
2. A silicon substrate (11) is implanted with silicon ions, and the silicon ions (1) are implanted.
1) After implanting oxygen ions into a predetermined region deeper than the internal silicon ion implantation region at a low dose, an annealing treatment is performed to form a buried silicon oxide layer (12) from the surface of the silicon substrate (11) to the predetermined region. The active S on the substrate surface.
A method for manufacturing an SOI substrate, which comprises forming an i layer (11a).
JP6253596A 1996-03-19 1996-03-19 Manufacture of soi substrate Pending JPH09260621A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6253596A JPH09260621A (en) 1996-03-19 1996-03-19 Manufacture of soi substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6253596A JPH09260621A (en) 1996-03-19 1996-03-19 Manufacture of soi substrate

Publications (1)

Publication Number Publication Date
JPH09260621A true JPH09260621A (en) 1997-10-03

Family

ID=13203011

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6253596A Pending JPH09260621A (en) 1996-03-19 1996-03-19 Manufacture of soi substrate

Country Status (1)

Country Link
JP (1) JPH09260621A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000013214A1 (en) * 1998-08-31 2000-03-09 Nec Corporation Soi substrate and method for manufacturing the same
US6335562B1 (en) * 1999-12-09 2002-01-01 The United States Of America As Represented By The Secretary Of The Navy Method and design for the suppression of single event upset failures in digital circuits made from GaAs and related compounds

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000013214A1 (en) * 1998-08-31 2000-03-09 Nec Corporation Soi substrate and method for manufacturing the same
US6548379B1 (en) 1998-08-31 2003-04-15 Nec Corporation SOI substrate and method for manufacturing the same
US6335562B1 (en) * 1999-12-09 2002-01-01 The United States Of America As Represented By The Secretary Of The Navy Method and design for the suppression of single event upset failures in digital circuits made from GaAs and related compounds

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